xref: /freebsd/sys/contrib/device-tree/Bindings/pinctrl/qcom,ipq4019-pinctrl.yaml (revision b2d2a78ad80ec68d4a17f5aef97d21686cb1e29b)

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,ipq4019-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Technologies, Inc. IPQ4019 TLMM block

maintainers:
  - Bjorn Andersson <bjorn.andersson@linaro.org>

description: |
  Top Level Mode Multiplexer pin controller in Qualcomm IPQ4019 SoC.

allOf:
  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#

properties:
  compatible:
    const: qcom,ipq4019-pinctrl

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  gpio-reserved-ranges: true

patternProperties:
  "-state$":
    oneOf:
      - $ref: "#/$defs/qcom-ipq4019-tlmm-state"
      - patternProperties:
          "-pins$":
            $ref: "#/$defs/qcom-ipq4019-tlmm-state"
        additionalProperties: false

  "-hog(-[0-9]+)?$":
    type: object
    required:
      - gpio-hog

$defs:
  qcom-ipq4019-tlmm-state:
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.
    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
    unevaluatedProperties: false

    properties:
      pins:
        description:
          List of gpio pins affected by the properties specified in this
          subnode.
        items:
          pattern: "^gpio([0-9]|[1-9][0-9])$"
        minItems: 1
        maxItems: 36

      function:
        description:
          Specify the alternative function to be configured for the specified
          pins.
        enum: [ aud_pin, audio_pwm, blsp_i2c0, blsp_i2c1, blsp_spi0,
                blsp_spi1, blsp_uart0, blsp_uart1, chip_rst, gpio,
                i2s_rx, i2s_spdif_in, i2s_spdif_out, i2s_td, i2s_tx,
                jtag, led0, led1, led2, led3, led4, led5, led6, led7,
                led8, led9, led10, led11, mdc, mdio, pcie, pmu,
                prng_rosc, qpic, rgmii, rmii, sdio, smart0, smart1,
                smart2, smart3, tm, wifi0, wifi1 ]

    required:
      - pins

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    tlmm: pinctrl@1000000 {
        compatible = "qcom,ipq4019-pinctrl";
        reg = <0x01000000 0x300000>;

        gpio-controller;
        #gpio-cells = <2>;
        gpio-ranges = <&tlmm 0 0 100>;
        interrupt-controller;
        #interrupt-cells = <2>;
        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;

        uart-state {
            pins = "gpio16", "gpio17";
            function = "blsp_uart0";
            bias-disable;
        };
    };