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12

/linux/drivers/net/ipa/
H A Dipa_uc.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2024 Linaro Ltd.
12 #include "ipa.h"
19 * DOC: The IPA embedded microcontroller
21 * The IPA incorporates a microcontroller that is able to do some additional
31 * A 128 byte block of structured memory within the IPA SRAM is used together
33 * AP and the IPA microcontroller. Each side writes data to the shared area
35 * to the interrupt. Some information found in the shared area is currently
36 * unused. All remaining space in the shared area is reserved, and must not
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H A Dipa_mem.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2024 Linaro Ltd.
7 #include <linux/dma-mapping.h>
16 #include "ipa.h"
29 const struct ipa_mem *ipa_mem_find(struct ipa *ipa, enum ipa_mem_id mem_id) in ipa_mem_find() argument
33 for (i = 0; i < ipa->mem_count; i++) { in ipa_mem_find()
34 const struct ipa_mem *mem = &ipa->mem[i]; in ipa_mem_find()
36 if (mem->id == mem_id) in ipa_mem_find()
47 struct ipa *ipa = container_of(trans->gsi, struct ipa, gsi); in ipa_mem_zero_region_add() local
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H A Dipa_mem.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2024 Linaro Ltd.
13 struct ipa;
17 * DOC: IPA Local Memory
19 * The IPA has a block of shared memory, divided into regions used for
22 * The regions within the shared block are bounded by an offset (relative to
23 * the "ipa-shared" memory range) and size found in the IPA_SHARED_MEM_SIZE
26 * Each region is optionally preceded by one or more 32-bit "canary" values.
27 * These are meant to detect out-of-range writes (if they become corrupted).
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H A Dipa_qmi_msg.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2018-2024 Linaro Ltd.
15 /* Request/response/indication QMI message ids used for IPA. Receiving
18 #define IPA_QMI_INDICATION_REGISTER 0x20 /* modem -> AP request */
19 #define IPA_QMI_INIT_DRIVER 0x21 /* AP -> modem request */
20 #define IPA_QMI_INIT_COMPLETE 0x22 /* AP -> modem indication */
21 #define IPA_QMI_DRIVER_INIT_COMPLETE 0x35 /* modem -> AP request */
28 #define IPA_QMI_INDICATION_REGISTER_REQ_SZ 20 /* -> server handle */
29 #define IPA_QMI_INDICATION_REGISTER_RSP_SZ 7 /* <- server handle */
30 #define IPA_QMI_INIT_DRIVER_REQ_SZ 162 /* client handle -> */
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H A Dipa_cmd.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2024 Linaro Ltd.
13 struct ipa;
17 * enum ipa_cmd_opcode: IPA immediate commands
23 * @IPA_CMD_HDR_INIT_LOCAL: Initialize IPA-local header memory
24 * @IPA_CMD_REGISTER_WRITE: Register write performed by IPA
26 * @IPA_CMD_DMA_SHARED_MEM: DMA command performed by IPA
46 * ipa_cmd_table_init_valid() - Validate a memory region holding a table
47 * @ipa: - IPA pointer
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H A Dipa_table.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2024 Linaro Ltd.
10 #include <linux/dma-mapping.h>
16 #include "ipa.h"
25 * DOC: IPA Filter and Route Tables
27 * The IPA has tables defined in its local (IPA-resident) memory that define
29 * endian 64-bit "slot" that holds the address of a rule definition. (The
35 * by all IPA hardware (IPA v4.2 doesn't support hashed tables).
38 * an object (such as a route or filter table) in IPA-resident memory must
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/linux/Documentation/devicetree/bindings/net/
H A Dqcom,ipa.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/qcom,ipa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm IP Accelerator (IPA)
10 - Alex Elder <elder@kernel.org>
13 This binding describes the Qualcomm IPA. The IPA is capable of offloading
17 The IPA sits between multiple independent "execution environments,"
18 including the Application Processor (AP) and the modem. The IPA presents
20 The GSI is an integral part of the IPA, but it is logically isolated
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/linux/arch/arm64/boot/dts/qcom/
H A Dqcs8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
8 /delete-node/ &reserved_memory;
11 reserved_memory: reserved-memory {
12 #address-cells = <2>;
13 #size-cells = <2>;
18 * 1. Firmware related regions which aren't shared with kernel.
27 * 2. Firmware related memory regions which are shared with Kernel
29 * that indicate fimware-related shared information. A label name
30 * is suggested because this type of shared information needs to
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H A Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
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H A Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
15 #include <dt-bindings/interconnect/qcom,icc.h>
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H A Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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H A Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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H A Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
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H A Dmsm8998-oneplus-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * OnePlus 5(T) (cheeseburger / dumpling) common device tree source based on msm8998-mtp.dtsi
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
20 qcom,msm-id = <292 0x20001>; /* 8998 v2.1 */
23 #address-cells = <2>;
24 #size-cells = <2>;
29 compatible = "simple-framebuffer";
47 power-domains = <&mmcc MDSS_GDSC>;
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H A Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
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H A Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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H A Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,smp2p.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Shared Memory Point 2 Point
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 The Shared Memory Point to Point (SMP2P) protocol facilitates communication
16 of a single 32-bit value between two processors. Each value has a single
35 $ref: /schemas/types.yaml#/definitions/phandle-array
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sdx55.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
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H A Dqcom-sdx65.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
15 #include <dt-bindings/interconnect/qcom,sdx65.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
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/linux/arch/arm64/kvm/
H A Dreset.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012,2013 - ARM Ltd
7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
81 vcpu->arch.sve_max_vl = kvm_sve_max_vl; in kvm_vcpu_enable_sve()
93 * vcpu->arch.sve_state as necessary.
102 vl = vcpu->arch.sve_max_vl; in kvm_vcpu_finalize_sve()
105 * Responsibility for these properties is shared between in kvm_vcpu_finalize_sve()
107 * set_sve_vls(). Double-check here just to be sure: in kvm_vcpu_finalize_sve()
111 return -EIO; in kvm_vcpu_finalize_sve()
116 return -ENOMEM; in kvm_vcpu_finalize_sve()
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/linux/drivers/tee/optee/
H A Doptee_msg.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
3 * Copyright (c) 2015-2021, Linaro Limited
12 * This file defines the OP-TEE message protocol (ABI) used to communicate
13 * with an instance of OP-TEE running in secure world.
21 * Part 1 - formatting of messages
49 * Pointer to a list of pages used to register user-defined SHM buffer.
52 * list of page addresses. OP-TEE core can reconstruct contiguous buffer from
64 * uint64_t pages_array[OPTEE_MSG_NONCONTIG_PAGE_SIZE/sizeof(uint64_t) - 1];
98 * Page size used in non-contiguous buffer entries
105 * struct optee_msg_param_tmem - temporary memory reference parameter
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/linux/Documentation/virt/kvm/arm/
H A Dhypercalls.rst1 .. SPDX-License-Identifier: GPL-2.0
4 KVM/arm64-specific hypercalls exposed to guests
7 This file documents the KVM/arm64-specific hypercalls which may be
14 All KVM/arm64-specific hypercalls are allocated within the "Vendor
16 ``28b46fb6-2ec5-11e9-a9ca-4b564d003a74``. This UID should be queried by the
18 order to determine that the KVM/arm64-specific hypercalls are available.
21 ---------------------------------------------
25 +---------------------+-------------------------------------------------------------+
27 +---------------------+-------------------------------------------------------------+
29 +---------------------+----------+--------------------------------------------------+
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/linux/arch/arm64/include/asm/
H A Dkvm_pgtable.h1 // SPDX-License-Identifier: GPL-2.0-only
14 #define KVM_PGTABLE_FIRST_LEVEL -1
18 * The largest supported block sizes for KVM (no 52-bit PA support):
19 * - 4K (level 1): 1GB
20 * - 16K (level 2): 32MB
21 * - 64K (level 2): 512MB
60 #define KVM_PHYS_INVALID (-1ULL)
99 * Used to indicate a pte for which a 'break-before-make' sequence is in
184 * struct kvm_pgtable_mm_ops - Memory management callbacks.
226 * enum kvm_pgtable_stage2_flags - Stage-2 page-table flags.
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