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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_irq.c30 * DOC: Interrupt Handling
32 * Interrupts generated within GPU hardware raise interrupt requests that are
34 * type of the interrupt and dispatching matching handlers. If handling an
35 * interrupt requires calling kernel functions that may sleep processing is
41 * For GPU interrupt sources that may be driven by another driver, IRQ domain
118 * amdgpu_irq_disable_all - disable *all* interrupts
130 spin_lock_irqsave(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
132 if (!adev->irq.client[i].sources) in amdgpu_irq_disable_all()
136 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_disable_all()
138 if (!src || !src->funcs->set || !src->num_types) in amdgpu_irq_disable_all()
[all …]
/linux/Documentation/core-api/
H A Dgenericirq.rst7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
13 The generic interrupt handling layer is designed to provide a complete
14 abstraction of interrupt handling for device drivers. It is able to
15 handle all the different types of interrupt controller hardware. Device
17 interrupts. The drivers do not have to know anything about interrupt
22 interrupt subsystem based for their architecture, with the help of the
28 The original implementation of interrupt handling in Linux uses the
29 __do_IRQ() super-handler, which is able to deal with every type of
30 interrupt logic.
[all …]
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dsrio-rmu.txt5 node is composed of three types of sub-nodes ("fsl-srio-msg-unit",
6 "fsl-srio-dbell-unit" and "fsl-srio-port-write-unit").
10 - compatible
12 Value type: <string>
13 Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu".
18 - reg
20 Value type: <prop-encoded-array>
25 - fsl,liodn
26 Usage: optional-but-recommended (for devices with PAMU)
27 Value type: <prop-encoded-array>
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dxlnx,intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/xlnx,intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Interrupt Controller
10 - Michal Simek <michal.simek@amd.com>
14 number of interrupts and the type of each interrupt. These details cannot
19 const: xlnx,xps-intc-1.00.a
27 power-domains:
33 "#interrupt-cells":
[all …]
H A Darm,gic-v3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Generic Interrupt Controller, version 3
10 - Marc Zyngier <maz@kernel.org>
15 Software Generated Interrupts (SGI), and Locality-specific Peripheral
19 - $ref: /schemas/interrupt-controller.yaml#
24 - items:
25 - enum:
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/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044-cpus.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #address-cells = <2>;
8 #size-cells = <2>;
11 #address-cells = <1>;
12 #size-cells = <0>;
13 timebase-frequency = <50000000>;
18 i-cache-block-size = <64>;
19 i-cache-size = <65536>;
20 i-cache-sets = <512>;
21 d-cache-block-size = <64>;
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/linux/drivers/net/ethernet/intel/e1000e/
H A Dparam.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
15 #define OPTION_UNSET -1
36 /* Transmit Interrupt Delay in units of 1.024 microseconds
37 * Tx interrupt delay needs to typically be set to something non-zero
39 * Valid Range: 0-65535
41 E1000_PARAM(TxIntDelay, "Transmit Interrupt Delay");
46 /* Transmit Absolute Interrupt Delay in units of 1.024 microseconds
48 * Valid Range: 0-65535
50 E1000_PARAM(TxAbsIntDelay, "Transmit Absolute Interrupt Delay");
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt6795-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 - Sean Wang <sean.wang@kernel.org>
18 const: mediatek,mt6795-pinctrl
20 gpio-controller: true
22 '#gpio-cells':
29 gpio-ranges:
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H A Dmediatek,mt6893-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6893-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
17 const: mediatek,mt6893-pinctrl
21 - description: pin controller base
22 - description: rm group IO
23 - description: bm group IO
24 - description: lm group IO
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H A Dmediatek,mt8188-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hui Liu <hui.liu@mediatek.com>
17 const: mediatek,mt8188-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
25 are defined in <dt-bindings/gpio/gpio.h>.
28 gpio-ranges:
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H A Dmediatek,mt8186-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8186-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
31 gpio-line-names: true
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H A Dmediatek,mt8195-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8195-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
32 gpio-line-names: true
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H A Dmediatek,mt8196-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8196-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lei Xue <lei.xue@mediatek.com>
11 - Cathy Xu <ot_cathy.xu@mediatek.com>
18 const: mediatek,mt8196-pinctrl
22 - description: gpio base
23 - description: rt group IO
24 - description: rm1 group IO
[all …]
H A Dmediatek,mt8189-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8189-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lei Xue <lei.xue@mediatek.com>
11 - Cathy Xu <ot_cathy.xu@mediatek.com>
18 const: mediatek,mt8189-pinctrl
22 - description: gpio base
23 - description: lm group IO
24 - description: rb0 group IO
[all …]
H A Dmediatek,mt8192-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
32 gpio-line-names: true
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/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pic.c3 * Programmable Interrupt Controller functions for the Freescale MPC52xx.
20 * This is the device driver for the MPC5200 interrupt controller.
23 * -----------------
24 * The MPC5200 interrupt controller groups the all interrupt sources into
29 * remaining irq sources from all of the on-chip peripherals (PSCs, Ethernet,
33 * -----
36 * systems can have multiple interrupt controllers, the virtual IRQ (virq)
37 * infrastructure lets each interrupt controller to define a local set
48 * For example, the TMR0 interrupt is irq 9 in the main group. The
52 * interrupt group called 'bestcomm'. The bestcomm group isn't physically
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,wcd934x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9340/WCD9341 Codec is a standalone Hi-Fi audio codec IC.
14 It has in-built Soundwire controller, pin controller, interrupt mux and
27 reset-gpios:
31 slim-ifc-dev:
38 clock-names:
41 vdd-buck-supply:
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/linux/drivers/irqchip/
H A Dirq-ixp4xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * irqchip for the IXP4xx interrupt controller
6 * Based on arch/arm/mach-ixp4xx/common.c
8 * Copyright 2003-2004 (C) MontaVista, Software, Inc.
26 #define IXP4XX_ICPR 0x00 /* Interrupt Status */
27 #define IXP4XX_ICMR 0x04 /* Interrupt Enable */
28 #define IXP4XX_ICLR 0x08 /* Interrupt IRQ/FIQ Select */
31 #define IXP4XX_ICHR 0x14 /* Interrupt Priority */
35 /* IXP43x and IXP46x-only */
36 #define IXP4XX_ICPR2 0x20 /* Interrupt Status 2 */
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H A Dirq-ti-sci-intr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments' K3 Interrupt Router irqchip driver
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
21 * struct ti_sci_intr_irq_domain - Structure representing a TISCI based
22 * Interrupt Router IRQ domain.
26 * @ti_sci_id: TI-SCI device identifier
27 * @type: Specifies the trigger type supported by this Interrupt Router
34 u32 type; member
48 * ti_sci_intr_irq_domain_translate() - Retrieve hwirq and type from
53 * @type: IRQ type
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/linux/Documentation/devicetree/bindings/mfd/
H A Dqcom,spmi-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SPMI PMICs multi-function device
13 16-bit SPMI peripheral address space into 256 smaller fixed-size regions, 256 bytes
14 each. A function can consume one or more of these fixed-size register regions.
21 specifically used for interrupt handling.
24 - Stephen Boyd <sboyd@kernel.org>
29 - pattern: '^pmic@.*$'
[all …]
/linux/kernel/irq/
H A Dirqdomain.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/interrupt.h>
36 unsigned int type; member
53 return fwid->name; in irqchip_fwnode_get_name()
62 * __irq_domain_alloc_fwnode - Allocate a fwnode_handle suitable for
64 * @type: Type of irqchip_fwnode. See linux/irqdomain.h
67 * @pa: Optional user-provided physical address
77 struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id, in __irq_domain_alloc_fwnode() argument
86 switch (type) { in __irq_domain_alloc_fwnode()
91 n = kasprintf(GFP_KERNEL, "%s-%d", name, id); in __irq_domain_alloc_fwnode()
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H A Dresend.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner
6 * This file contains the IRQ-resend code
8 * If the interrupt is waiting to be processed, we try to re-run it.
10 * interrupt-protected region. Not all irq controller chips can
18 #include <linux/interrupt.h>
38 hlist_del_init(&desc->resend_node); in resend_irqs()
41 desc->handle_irq(desc); in resend_irqs()
52 * Validate whether this interrupt can be safely injected from in irq_sw_resend()
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/linux/arch/arm64/boot/dts/qcom/
H A Dpm8550vs.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/spmi/spmi.h>
10 thermal-zones {
11 pm8550vs-c-thermal {
12 polling-delay-passive = <100>;
14 thermal-sensors = <&pm8550vs_c_temp_alarm>;
20 type = "passive";
26 type = "hot";
31 pm8550vs-d-thermal {
[all …]
/linux/Documentation/devicetree/bindings/input/
H A Dgpio-keys.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/input/gpio-keys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 - gpio-keys
16 - gpio-keys-polled
23 poll-interval: true
26 …"^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switc…
35 - items:
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/linux/Documentation/devicetree/bindings/arm/
H A Darm,cci-400.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 ARM multi-cluster systems maintain intra-cluster coherency through a cache
24 pattern: "^cci(@[0-9a-f]+)?$"
28 - arm,cci-400
29 - arm,cci-500
30 - arm,cci-550
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