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/illumos-gate/usr/src/uts/common/os/
H A Dclock.c84 * clock() is called straight from the clock cyclic; see clock_init().
87 * reprime clock
95 extern int idleswtch; /* flag set while idle in pswtch() */
99 * high-precision avenrun values. These are needed to make the
103 int avenrun[3]; /* FSCALED average run queue lengths */
104 time_t time; /* time in seconds since 1970 - for compatibility only */
108 * Phase/frequency-lock loop (PLL/FLL) definitions
113 * time_state shows the state of the system clock, with values defined
116 * time_status shows the status of the system clock, with bits defined
125 * CPU clock oscillator and is a property of the architecture; however,
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/illumos-gate/usr/src/uts/common/io/1394/adapters/
H A Dhci1394_ohci.c61 static int hci1394_ohci_selfid_init(hci1394_ohci_handle_t ohci_hdl);
62 static int hci1394_ohci_cfgrom_init(hci1394_ohci_handle_t ohci_hdl);
63 static int hci1394_ohci_chip_init(hci1394_ohci_handle_t ohci_hdl);
64 static int hci1394_ohci_phy_resume(hci1394_ohci_handle_t ohci_hdl);
65 static int hci1394_ohci_1394a_init(hci1394_ohci_handle_t ohci_hdl);
66 static int hci1394_ohci_1394a_resume(hci1394_ohci_handle_t ohci_hdl);
67 static int hci1394_ohci_phy_read_no_lock(hci1394_ohci_handle_t ohci_hdl,
69 static int hci1394_ohci_phy_write_no_lock(hci1394_ohci_handle_t ohci_hdl,
77 int
81 int status; in hci1394_ohci_init()
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/illumos-gate/usr/src/uts/common/fs/nfs/
H A Dnfs4_vnops.c126 nfs4_open_stream_t *, int *, int *, nfs4_close_type_t,
127 nfs4_error_t *, int *);
128 static int nfs4_rdwrlbn(vnode_t *, page_t *, u_offset_t, size_t, int,
130 static int nfs4write(vnode_t *, caddr_t, u_offset_t, int, cred_t *,
132 static int nfs4read(vnode_t *, caddr_t, offset_t, int, size_t *,
134 static int nfs4setattr(vnode_t *, struct vattr *, int, cred_t *,
136 static int nfs4openattr(vnode_t *, vnode_t **, int, cred_t *);
137 static int nfs4lookup(vnode_t *, char *, vnode_t **, cred_t *, int);
138 static int nfs4lookup_xattr(vnode_t *, char *, vnode_t **, int, cred_t *);
139 static int nfs4lookupvalidate_otw(vnode_t *, char *, vnode_t **, cred_t *);
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/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A Dreg_addr_ah_compile15.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
85 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
87 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
96 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
98 … has_mem_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
144 …_SYS_ERR (0x1<<30) // Fatal or Non-Fatal Error Message s…
148 …:0x20 This is the PCIE compliant status/command register (bits 31-16: status, bits 15-0: command)…
149 …:0x20 This is the PCIE compliant status/command register (bits 31-16: status, bits 15-0: command)…
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H A Dreg_addr_bb.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
84- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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H A Dreg_addr_k2.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
84- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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H A Dreg_addr_e5.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
84- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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H A Dreg_addr.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
85- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
86 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
87 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
88 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
90 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
92 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
100 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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/illumos-gate/usr/src/data/terminfo/
H A Dtermcap.src7 # bug-ncurses@gnu.org
19 # under the ncurses MIT-style license. That was the effect of the agreement
33 # some portions of the data are derivative work under a compatible MIT-style
36 #------------------------------------------------------------------------------
44 # Please e-mail changes to terminfo@thyrsus.com; the old termcap@berkeley.edu
50 # This file describes the capabilities of various character-cell terminals,
51 # as needed by software such as screen-oriented editors.
57 # termcap file, but also large numbers of vendor-maintained termcap and
66 # This file uses only the US-ASCII character set (no ISO8859 characters).
68 # This file assumes a US-ASCII character set. If you need to fix this, start
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H A Dterminfo.src7 # bug-ncurses@gnu.org
19 # under the ncurses MIT-style license. That was the effect of the agreement
33 # some portions of the data are derivative work under a compatible MIT-style
36 #------------------------------------------------------------------------------
44 # Please e-mail changes to terminfo@thyrsus.com; the old termcap@berkeley.edu
50 # This file describes the capabilities of various character-cell terminals,
51 # as needed by software such as screen-oriented editors.
57 # termcap file, but also large numbers of vendor-maintained termcap and
66 # This file uses only the US-ASCII character set (no ISO8859 characters).
68 # This file assumes a US-ASCII character set. If you need to fix this, start
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