| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7988a.dtsi | 83 infracfg: clock-controller@10001000 { label
84 compatible = "mediatek,mt7988-infracfg", "syscon";
111 clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
112 <&infracfg CLK_INFRA_66M_PWM_HCK>,
113 <&infracfg CLK_INFRA_66M_PWM_CK1>,
114 <&infracfg CLK_INFRA_66M_PWM_CK2>,
115 <&infracfg CLK_INFRA_66M_PWM_CK3>,
116 <&infracfg CLK_INFRA_66M_PWM_CK4>,
117 <&infracfg CLK_INFRA_66M_PWM_CK5>,
118 <&infracfg CLK_INFRA_66M_PWM_CK6>,
[all …]
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| H A D | mt7986a.dtsi | 143 infracfg: infracfg@10001000 { label
144 compatible = "mediatek,mt7986-infracfg", "syscon";
203 <&infracfg CLK_INFRA_PWM_STA>,
204 <&infracfg CLK_INFRA_PWM1_CK>,
205 <&infracfg CLK_INFRA_PWM2_CK>;
228 clocks = <&infracfg CLK_INFRA_TRNG_CK>;
241 clocks = <&infracfg CLK_INFRA_EIP97_CK>;
252 clocks = <&infracfg CLK_INFRA_UART0_SEL>,
253 <&infracfg CLK_INFRA_UART0_CK>;
256 <&infracfg CLK_INFRA_UART0_SEL>;
[all …]
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| H A D | mt8167.dtsi | 26 infracfg: infracfg@10001000 { label
27 compatible = "mediatek,mt8167-infracfg", "syscon";
54 mediatek,infracfg = <&infracfg>;
80 mediatek,infracfg = <&infracfg>;
91 mediatek,infracfg = <&infracfg>;
99 mediatek,infracfg = <&infracfg>;
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| H A D | mt8192.dtsi | 459 infracfg: syscon@10001000 { label
460 compatible = "mediatek,mt8192-infracfg", "syscon";
512 <&infracfg CLK_INFRA_AUDIO_26M_B>,
513 <&infracfg CLK_INFRA_AUDIO>;
515 mediatek,infracfg = <&infracfg>;
521 clocks = <&infracfg CLK_INFRA_PMIC_CONN>;
523 mediatek,infracfg = <&infracfg>;
538 mediatek,infracfg = <&infracfg>;
579 mediatek,infracfg = <&infracfg>;
593 mediatek,infracfg = <&infracfg>;
[all …]
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| H A D | mt8173.dtsi | 159 clocks = <&infracfg CLK_INFRA_CA53SEL>,
174 clocks = <&infracfg CLK_INFRA_CA53SEL>,
189 clocks = <&infracfg CLK_INFRA_CA72SEL>,
204 clocks = <&infracfg CLK_INFRA_CA72SEL>,
355 infracfg: power-controller@10001000 { label
356 compatible = "mediatek,mt8173-infracfg", "syscon";
481 mediatek,infracfg = <&infracfg>;
515 mediatek,infracfg = <&infracfg>;
533 clocks = <&infracfg CLK_INFRA_CLK_13M>,
542 resets = <&infracfg MT8173_INFRA_PMIC_WRAP_RST>;
[all …]
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| H A D | mt7622.dtsi | 75 clocks = <&infracfg CLK_INFRA_MUX1_SEL>,
90 clocks = <&infracfg CLK_INFRA_MUX1_SEL>,
213 infracfg: infracfg@10000000 { label
214 compatible = "mediatek,mt7622-infracfg",
225 clocks = <&infracfg CLK_INFRA_PMIC_PD>, <&pwrap_clk>;
227 resets = <&infracfg MT7622_INFRA_PMIC_WRAP_RST>;
250 infracfg = <&infracfg>;
259 clocks = <&infracfg CLK_INFRA_IRRX_PD>,
302 clocks = <&infracfg CLK_INFRA_TRNG>;
621 clocks = <&infracfg CLK_INFRA_AUDIO_PD>,
[all …]
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| H A D | mt8516.dtsi | 57 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
70 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
83 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
96 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
188 infracfg: infracfg@10001000 { label
189 compatible = "mediatek,mt8516-infracfg", "syscon";
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| H A D | mt2712e.dtsi | 252 infracfg: clock-controller@10001000 { label
253 compatible = "mediatek,mt2712-infracfg", "syscon";
293 infracfg = <&infracfg>;
319 clocks = <&infracfg CLK_INFRA_AO_SPI1>;
330 clocks = <&infracfg CLK_INFRA_M4U>;
332 mediatek,infracfg = <&infracfg>;
348 clocks = <&infracfg CLK_INFRA_M4U>;
350 mediatek,infracfg = <&infracfg>;
663 <&infracfg CLK_INFRA_AO_SPI0>;
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| /linux/drivers/soc/mediatek/ |
| H A D | mtk-infracfg.c | 10 #include <linux/soc/mediatek/infracfg.h>
18 * @infracfg: The infracfg regmap
28 int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, in mtk_infracfg_set_bus_protection() argument
35 regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, in mtk_infracfg_set_bus_protection()
38 regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask); in mtk_infracfg_set_bus_protection()
40 ret = regmap_read_poll_timeout(infracfg, INFRA_TOPAXI_PROTECTSTA1, in mtk_infracfg_set_bus_protection()
49 * @infracfg: The infracfg regmap
59 int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, in mtk_infracfg_clear_bus_protection() argument
66 regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0); in mtk_infracfg_clear_bus_protection()
68 regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_CLR, mask); in mtk_infracfg_clear_bus_protection()
[all …]
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| H A D | Kconfig | 30 bool "MediaTek INFRACFG Support"
33 Say yes here to add support for the MediaTek INFRACFG controller. The
34 INFRACFG controller contains various infrastructure registers not
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | mt8192-afe-pcm.yaml | 30 mediatek,infracfg:
32 description: The phandle of the mediatek infracfg controller
63 - mediatek,infracfg
85 mediatek,infracfg = <&infracfg>;
91 <&infracfg CLK_INFRA_AUDIO>,
92 <&infracfg CLK_INFRA_AUDIO_26M_B>;
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| H A D | mt8186-afe-pcm.yaml | 32 mediatek,infracfg:
34 description: The phandle of the mediatek infracfg controller
102 - mediatek,infracfg
121 mediatek,infracfg = <&infracfg>;
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| H A D | mediatek,mt8188-afe.yaml | 38 mediatek,infracfg:
40 description: The phandle of the mediatek infracfg controller
167 - mediatek,infracfg
187 mediatek,infracfg = <&infracfg_ao>;
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| H A D | mtk-btcvsd-snd.txt | 7 - mediatek,infracfg: the phandles of INFRASYS
22 mediatek,infracfg = <&infrasys>;
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| /linux/drivers/net/wireless/mediatek/mt76/mt7615/ |
| H A D | soc.c | 23 dev->infracfg = syscon_regmap_lookup_by_phandle(np, "mediatek,infracfg"); in mt7622_wmac_init()
24 if (IS_ERR(dev->infracfg)) { in mt7622_wmac_init()
25 dev_err(dev->mt76.dev, "Cannot find infracfg controller\n"); in mt7622_wmac_init()
26 return PTR_ERR(dev->infracfg); in mt7622_wmac_init()
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | mediatek,power-controller.yaml | 116 mediatek,infracfg:
118 description: phandle to the device containing the INFRACFG register range.
120 mediatek,infracfg-nao:
122 description: phandle to the device containing the INFRACFG-NAO register range.
180 mediatek,infracfg = <&infracfg>;
214 mediatek,infracfg = <&infracfg>;
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| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | mediatek,iommu.yaml | 109 mediatek,infracfg:
111 description: The phandle to the mediatek infracfg syscon
198 - mediatek,infracfg
224 clocks = <&infracfg CLK_INFRA_M4U>;
226 mediatek,infracfg = <&infracfg>;
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| /linux/Documentation/devicetree/bindings/soc/mediatek/ |
| H A D | scpsys.txt | 32 - infracfg: must contain a phandle to the infracfg controller
65 infracfg = <&infracfg>;
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| /linux/Documentation/devicetree/bindings/cpufreq/ |
| H A D | cpufreq-mediatek.txt | 70 clocks = <&infracfg CLK_INFRA_CPUSEL>,
192 clocks = <&infracfg CLK_INFRA_CA53SEL>,
204 clocks = <&infracfg CLK_INFRA_CA53SEL>,
216 clocks = <&infracfg CLK_INFRA_CA72SEL>,
228 clocks = <&infracfg CLK_INFRA_CA72SEL>,
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| /linux/arch/arm/boot/dts/mediatek/ |
| H A D | mt7623.dtsi | 80 clocks = <&infracfg CLK_INFRA_CPUSEL>,
92 clocks = <&infracfg CLK_INFRA_CPUSEL>,
104 clocks = <&infracfg CLK_INFRA_CPUSEL>,
116 clocks = <&infracfg CLK_INFRA_CPUSEL>,
234 infracfg: syscon@10001000 { label
235 compatible = "mediatek,mt7623-infracfg",
236 "mediatek,mt2701-infracfg",
276 infracfg = <&infracfg>;
304 resets = <&infracfg MT2701_INFRA_PMIC_WRAP_RST>;
306 clocks = <&infracfg CLK_INFRA_PMICSPI>,
[all …]
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| H A D | mt7629.dtsi | 81 infracfg: syscon@10000000 { label
82 compatible = "mediatek,mt7629-infracfg", "syscon";
102 infracfg = <&infracfg>;
133 clocks = <&infracfg CLK_INFRA_TRNG_PD>;
473 mediatek,infracfg = <&infracfg>;
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| H A D | mt8135.dtsi | 133 infracfg: infracfg@10001000 { label
136 compatible = "mediatek,mt8135-infracfg", "syscon";
184 resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
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| /linux/drivers/clk/mediatek/ |
| H A D | Makefile | 21 obj-$(CONFIG_COMMON_CLK_MT6795) += clk-mt6795-apmixedsys.o clk-mt6795-infracfg.o \
50 clk-mt7622-infracfg.o
59 obj-$(CONFIG_COMMON_CLK_MT7981) += clk-mt7981-infracfg.o
63 obj-$(CONFIG_COMMON_CLK_MT7986) += clk-mt7986-infracfg.o
67 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-infracfg.o
77 obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173-apmixedsys.o clk-mt8173-infracfg.o \
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | mediatek,net.yaml | 70 mediatek,infracfg:
149 mediatek,infracfg: false
178 mediatek,infracfg: false
213 mediatek,infracfg: false
299 mediatek,infracfg: false
337 mediatek,infracfg: false
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| /linux/Documentation/devicetree/bindings/spmi/ |
| H A D | mtk,spmi-mtk-pmif.yaml | 72 clocks = <&infracfg CLK_INFRA_PMIC_AP>,
73 <&infracfg CLK_INFRA_PMIC_TMR>,
|