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/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A Duncore-cache.json3 … "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state",
8 … "PublicDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
13 "BriefDescription": "L3 Lookup any request that access cache and found line in I-state",
18 "PublicDescription": "L3 Lookup any request that access cache and found line in I-state.",
23 "BriefDescription": "L3 Lookup any request that access cache and found line in M-state",
28 "PublicDescription": "L3 Lookup any request that access cache and found line in M-state.",
33 "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state",
38 … "PublicDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
43 … "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state",
48 … "PublicDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
[all …]
/linux/tools/perf/pmu-events/arch/x86/skylake/
H A Duncore-cache.json3 … "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state",
8 … "PublicDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
13 "BriefDescription": "L3 Lookup any request that access cache and found line in I-state",
18 "PublicDescription": "L3 Lookup any request that access cache and found line in I-state.",
23 "BriefDescription": "L3 Lookup any request that access cache and found line in M-state",
28 "PublicDescription": "L3 Lookup any request that access cache and found line in M-state.",
33 "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state",
38 … "PublicDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
43 … "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state",
48 … "PublicDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
[all …]
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A Duncore-cache.json3 … "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
12 "BriefDescription": "L3 Lookup any request that access cache and found line in I-state.",
21 "BriefDescription": "L3 Lookup any request that access cache and found line in M-state.",
30 "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
39 …Description": "L3 Lookup external snoop request that access cache and found line in E or S-state.",
48 …BriefDescription": "L3 Lookup external snoop request that access cache and found line in I-state.",
57 …BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.",
66 …efDescription": "L3 Lookup external snoop request that access cache and found line in MESI-state.",
75 … "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
84 "BriefDescription": "L3 Lookup read request that access cache and found line in I-state.",
[all …]
/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A Duncore-cache.json3 … "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
12 "BriefDescription": "L3 Lookup any request that access cache and found line in I-state.",
21 "BriefDescription": "L3 Lookup any request that access cache and found line in M-state.",
30 "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
39 …Description": "L3 Lookup external snoop request that access cache and found line in E or S-state.",
48 …BriefDescription": "L3 Lookup external snoop request that access cache and found line in I-state.",
57 …BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.",
66 …efDescription": "L3 Lookup external snoop request that access cache and found line in MESI-state.",
75 … "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
84 "BriefDescription": "L3 Lookup read request that access cache and found line in I-state.",
[all …]
H A Dcache.json3 "BriefDescription": "Allocated L1D data cache lines in M state.",
11 …"BriefDescription": "Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line rep…
19 "BriefDescription": "L1D data cache lines in M state evicted due to replacement.",
27 "BriefDescription": "L1D data line replacements.",
31 …event counts L1D data line replacements. Replacements occur when a new line is brought into the c…
54 "BriefDescription": "L1D miss outstanding duration in cycles.",
81 "BriefDescription": "Not rejected writebacks from L1D to L2 cache lines in any state.",
89 "BriefDescription": "Not rejected writebacks from L1D to L2 cache lines in E state.",
97 "BriefDescription": "Not rejected writebacks from L1D to L2 cache lines in M state.",
105 "BriefDescription": "Not rejected writebacks from L1D to L2 cache lines in S state.",
[all …]
/linux/tools/perf/pmu-events/arch/x86/haswell/
H A Duncore-cache.json3 … "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
12 "BriefDescription": "L3 Lookup any request that access cache and found line in I-state.",
21 "BriefDescription": "L3 Lookup any request that access cache and found line in M-state.",
30 "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
39 …Description": "L3 Lookup external snoop request that access cache and found line in E or S-state.",
48 …BriefDescription": "L3 Lookup external snoop request that access cache and found line in I-state.",
57 …BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.",
66 …efDescription": "L3 Lookup external snoop request that access cache and found line in MESI-state.",
75 … "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
84 "BriefDescription": "L3 Lookup read request that access cache and found line in I-state.",
[all …]
/linux/Documentation/userspace-api/gpio/
H A Dgpio-v2-get-line-ioctl.rst1 .. SPDX-License-Identifier: GPL-2.0
12 GPIO_V2_GET_LINE_IOCTL - Request a line or lines from the kernel.
34 On success, the requesting process is granted exclusive access to the line
35 value, write access to the line configuration, and may receive events when
36 edges are detected on the line, all of which are described in more detail in
37 :ref:`gpio-v2-line-request`.
39 A number of lines may be requested in the one line request, and request
41 as possible. e.g. gpio-v2-line-get-values-ioctl.rst will read all the
44 The state of a line, including the value of output lines, is guaranteed to
46 file descriptor is closed, the state of the line becomes uncontrolled from
[all …]
H A Dchardev_v1.rst1 .. SPDX-License-Identifier: GPL-2.0
12 in the future. The v2 API is a functional superset of the v1 API so any
18 First added in 4.8.
20 The API is based around three major objects, the :ref:`gpio-v1-chip`, the
21 :ref:`gpio-v1-line-handle`, and the :ref:`gpio-v1-line-event`.
23 Where "line event" is used in this document it refers to the request that can
24 monitor a line for edge events, not the edge events themselves.
26 .. _gpio-v1-chip:
36 ``offset`` in the range from 0 to ``chip.lines - 1``, i.e. `[0,chip.lines)`.
38 Lines are requested from the chip using either gpio-get-linehandle-ioctl.rst
[all …]
H A Dchardev.rst1 .. SPDX-License-Identifier: GPL-2.0
7 This is latest version (v2) of the character device API, as defined in
10 First added in 5.10.
18 Read Documentation/driver-api/gpio/drivers-on-gpio.rst to avoid reinventing
19 kernel wheels in userspace.
21 Similarly, for multi-function lines there may be other subsystems, such as
23 Documentation/driver-api/pwm.rst, Documentation/w1/index.rst etc, that
26 Basic examples using the character device API can be found in ``tools/gpio/*``.
28 The API is based around two major objects, the :ref:`gpio-v2-chip` and the
29 :ref:`gpio-v2-line-request`.
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/
H A Dnv10.c7 * "Software"), to deal in the Software without restriction, including
14 * next paragraph) shall be included in all copies or substantial
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 nv10_gpio_sense(struct nvkm_gpio *gpio, int line) in nv10_gpio_sense() argument
31 struct nvkm_device *device = gpio->subdev.device; in nv10_gpio_sense()
32 if (line < 2) { in nv10_gpio_sense()
33 line = line * 16; in nv10_gpio_sense()
[all …]
/linux/arch/um/drivers/
H A Dchan_kern.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{linux.intel,addtoit}.com)
27 return -ENODEV; in not_configged_open()
40 return -EIO; in not_configged_read()
47 return -EIO; in not_configged_write()
54 return -EIO; in not_configged_console_write()
62 return -ENODEV; in not_configged_window_size()
94 if (chan->opened) in open_one_chan()
97 if (chan->ops->open == NULL) in open_one_chan()
99 else fd = (*chan->ops->open)(chan->input, chan->output, chan->primary, in open_one_chan()
[all …]
/linux/Documentation/admin-guide/
H A Ddynamic-debug-howto.rst9 debug-print code to obtain additional kernel information.
16 * a Catalog of all *prdbgs* in your kernel.
22 - source filename
23 - function name
24 - line number (including ranges of line numbers)
25 - module name
26 - format string
27 - class name (as known/declared by each module)
29 NOTE: To actually get the debug-print output on the console, you may
31 Read about these kernel parameters in
[all …]
/linux/tools/perf/pmu-events/arch/x86/goldmont/
H A Dfrontend.json39 …"BriefDescription": "References per ICache line. This event counts differently than Intel processo…
43in an ICache Line. The event strives to count on a cache line basis, so that multiple fetches to …
48 …"BriefDescription": "References per ICache line that are available in the ICache (hit). This event…
52in an ICache Line and that cache line is in the ICache (hit). The event strives to count on a cac…
57 …"BriefDescription": "References per ICache line that are not available in the ICache (miss). This …
61in an ICache Line and that cache line is not in the ICache (miss). The event strives to count on …
70 … read from the MSROM. The most common case that this counts is when a micro-coded instruction is …
/linux/tools/perf/pmu-events/arch/x86/goldmontplus/
H A Dfrontend.json39 …"BriefDescription": "References per ICache line. This event counts differently than Intel processo…
43in an ICache Line. The event strives to count on a cache line basis, so that multiple fetches to …
48 …"BriefDescription": "References per ICache line that are available in the ICache (hit). This event…
52in an ICache Line and that cache line is in the ICache (hit). The event strives to count on a cac…
57 …"BriefDescription": "References per ICache line that are not available in the ICache (miss). This …
61in an ICache Line and that cache line is not in the ICache (miss). The event strives to count on …
70 … read from the MSROM. The most common case that this counts is when a micro-coded instruction is …
/linux/include/uapi/linux/
H A Dgpio.h1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
3 * <linux/gpio.h> - userspace ABI for the GPIO character devices
21 * Must be a multiple of 8 to ensure 32/64-bit alignment of structs.
26 * struct gpiochip_info - Information about a certain GPIO chip
41 * Must be no greater than 64, as bitmaps are restricted here to 64-bits
42 * for simplicity, and a multiple of 2 to ensure 32/64-bit alignment of
48 * The maximum number of configuration attributes associated with a line
54 * enum gpio_v2_line_flag - &struct gpio_v2_line_attribute.flags values
55 * @GPIO_V2_LINE_FLAG_USED: line is not available for request
56 * @GPIO_V2_LINE_FLAG_ACTIVE_LOW: line active state is physical low
[all …]
/linux/tools/testing/kunit/
H A Dkunit_parser.py1 # SPDX-License-Identifier: GPL-2.0
4 # results with reader-friendly format. Stores and returns test results in a
25 results within a test log are stored in a main Test object as
29 status : TestStatus - status of the test
30 name : str - name of the test
31 expected_count : int - expected number of subtests (0 if single
33 subtests : List[Test] - lis
[all...]
/linux/scripts/
H A Dshow_delta2 # SPDX-License-Identifier: GPL-2.0-only
20 the kernel command line option "time" is specified. When run with no
22 each printk line and the next. When run with the '-b' option, all times
23 are relative to a single (base) point in time.
26 -h Show this usage help.
27 -
44 get_time(line) global() argument
61 convert_line(line, base_time) global() argument
[all...]
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
H A Dl1d_cache.json4 …rations that missed in the level 1 data cache. This event only counts one event per cache line. Th…
8in the CPUs caches (near atomic operations) counts as both a write access and read access. Each ac…
12-backs of dirty data from the L1 data cache to the L2 cache. This occurs when either a dirty cache…
16 …"PublicDescription": "Counts cache line refills into the level 1 data cache from any memory read o…
20 …ache accesses from any load operation. Atomic load operations that resolve in the CPUs caches coun…
24 …ified by virtual address) instruction. Near atomic operations that resolve in the CPUs caches coun…
28 …where the memory read operation misses in the level 1 data cache. This event only counts one event…
32 …here the memory write operation misses in the level 1 data cache. This event only counts one event…
36 …"PublicDescription": "Counts level 1 data cache refills where the cache line data came from caches…
40 …ata cache refills for which the cache line data came from outside the immediate cluster of the cor…
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
H A Dl1d_cache.json4 …rations that missed in the level 1 data cache. This event only counts one event per cache line. Th…
8in the CPUs caches (near atomic operations) counts as both a write access and read access. Each ac…
12-backs of dirty data from the L1 data cache to the L2 cache. This occurs when either a dirty cache…
16 …ache accesses from any load operation. Atomic load operations that resolve in the CPUs caches coun…
20 …ified by virtual address) instruction. Near atomic operations that resolve in the CPUs caches coun…
24 …where the memory read operation misses in the level 1 data cache. This event only counts one event…
28 …here the memory write operation misses in the level 1 data cache. This event only counts one event…
32 …"PublicDescription": "Counts level 1 data cache refills where the cache line data came from caches…
36 …ata cache refills for which the cache line data came from outside the immediate cluster of the cor…
40 …"PublicDescription": "Counts dirty cache line evictions from the level 1 data cache caused by a ne…
[all …]
/linux/tools/verification/rvgen/rvgen/
H A Dltl2k.py2 # SPDX-License-Identifier: GPL-2.0-only
10 def line_len(line: str) -> int:
11 tabs = line.count('\t')
12 return tabs * 7 + len(line)
14 def break_long_line(line: str, indent='') -> list[str]:
16 while line_len(line) > COLUMN_LIMIT:
17 i = line[:COLUMN_LIMIT - line_len(line)].rfind(' ')
18 result.append(line[:i])
19 line = indent + line[i + 1:]
20 if line:
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z14/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …": "A TLB2 miss is in progress for a request made by the data cache. Incremented by one for every …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 …ritten into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyt…
31 "Unit": "CPU-M-CF",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_zec12/
H A Dextended.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z15/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …": "A TLB2 miss is in progress for a request made by the data cache. Incremented by one for every …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 …ritten into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyt…
31 "Unit": "CPU-M-CF",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
14 … Translation Lookaside Buffer 2 (TLB2) and the request was made by the Level-1 Data cache. This is…
17 "Unit": "CPU-M-CF",
21 …A TLB2 miss is in progress for a request made by the Level-1 Data cache. Incremented by one for ev…
24 "Unit": "CPU-M-CF",
28 …ritten into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyt…
31 "Unit": "CPU-M-CF",
[all …]

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