Searched +full:imx8qxp +full:- +full:lpcg (Results 1 – 13 of 13) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | imx8qxp-lpcg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock 10 - Aisheng Dong <aisheng.dong@nxp.com> 13 The Low-Power Clock Gate (LPCG) modules contain a local programming 14 model to control the clock gates for the peripherals. An LPCG module 24 include/dt-bindings/clock/imx8-lpcg.h 29 - const: fsl,imx8qxp-lpcg [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8-ss-dma.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 dma_ipg_clk: clock-dma-ip [all...] |
H A D | imx8-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 lsio_bus_clk: clock-lsio-bu [all...] |
H A D | imx8qm-ss-dma.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 8 uart4_lpcg: clock-controller@5a4a0000 { 9 compatible = "fsl,imx8qxp-lpcg"; 11 #clock-cells = <1>; 14 clock-indice [all...] |
H A D | imx8-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 conn_axi_clk: clock-conn-ax [all...] |
H A D | imx8-ss-audio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 audio_ipg_clk: clock-audio-ip [all...] |
H A D | imx8dxl-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /delete-node/ &enet1_lpcg; 7 /delete-node/ &fec2; 10 conn_enet0_root_clk: clock-conn-enet0-root { 11 compatible = "fixed-clock"; 12 #clock-cell [all...] |
H A D | imx8-ss-img.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2019-2021 NXP 6 img_ipg_clk: clock-img-ipg { 7 compatible = "fixed-clock"; 8 #clock-cells = <0>; 9 clock-frequency = <200000000>; 10 clock-outpu [all...] |
H A D | imx8qxp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2020 NXP 8 #include <dt-bindings/clock/imx8-clock.h> 9 #include <dt-bindings/clock/imx8-lpcg.h> 10 #include <dt-binding [all...] |
H A D | imx8qm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-binding [all...] |
/freebsd/sys/contrib/device-tree/Bindings/bus/ |
H A D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp [all...] |
/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | fsl,imx8qxp-csr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liu Ying <victor.liu@nxp.com> 17 use-case is for some other nodes to acquire a reference to the syscon node 18 by phandle, and the other typical use-case is that the operating system 23 pattern: "^syscon@[0-9a-f]+$" 27 - enum: 28 - fsl,imx8qxp-mipi-lvds-csr [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
H A D | fsl,imx8qxp-pixel-combiner.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liu Ying <victor.liu@nxp.com> 23 - fsl,imx8qm-pixel-combiner 24 - fsl,imx8qxp-pixel-combiner 26 "#address-cells": 29 "#size-cells": 38 clock-names: [all …]
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