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/linux/Documentation/devicetree/bindings/reset/
H A Dfsl,imx7-src.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX7 System Reset Controller
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The system reset controller can be used to reset various set of
14 peripherals. Device nodes that need access to reset lines should
15 specify them as a reset phandle in their corresponding node as
16 specified in reset.txt.
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dnwl-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-nitrogen-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "imx8mq.dtsi"
11 compatible = "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq";
14 stdout-path = &uart1;
17 reg_1p8v: regulator-fixed-1v8 {
18 compatible = "regulator-fixed";
19 regulator-name = "1P8V";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
24 reg_snvs: regulator-fixed-snvs {
[all …]
H A Dimx8mq-tqma8mq-mba8mx.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
6 /dts-v1/;
8 #include "imx8mq-tqma8mq.dtsi"
12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq";
14 chassis-type = "embedded";
24 extcon_usbotg: extcon-usbotg0 {
25 compatible = "linux,extcon-usb-gpio";
26 pinctrl-names = "default";
[all …]
H A Dimx8mq-zii-ultra-rmb3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include "imx8mq-zii-ultra.dtsi"
12 compatible = "zii,imx8mq-ultra-rmb3", "zii,imx8mq-ultra", "fsl,imx8mq";
15 compatible = "simple-audio-card";
16 simple-audio-card,name = "front";
17 simple-audio-card,format = "i2s";
18 simple-audio-card,bitclock-master = <&sound1_codec>;
19 simple-audio-card,frame-master = <&sound1_codec>;
20 simple-audio-card,widgets =
[all …]
H A Dimx8mq-phanbell.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
8 #include "imx8mq.dtsi"
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
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H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
H A Dimx8mq-nitrogen.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "imx8mq.dtsi"
13 compatible = "boundary,imx8mq-nitrogen8m", "fsl,imx8mq";
16 stdout-path = "serial0:115200n8";
24 gpio-keys {
25 compatible = "gpio-keys";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_gpio_keys>;
[all …]
H A Dimx8mq-thor96.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mq.dtsi"
13 compatible = "einfochips,imx8mq-thor96", "fsl,imx8mq";
16 stdout-path = &uart1;
25 compatible = "gpio-leds";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_leds>;
29 user-led1 {
32 linux,default-trigger = "heartbeat";
[all …]
H A Dimx8mq-mnt-reform2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2021 MNT Research GmbH
8 /dts-v1/;
10 #include "imx8mq-nitrogen-som.dtsi"
14 compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq";
15 chassis-type = "laptop";
18 compatible = "pwm-backlight";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_backlight>;
22 power-supply = <&reg_main_usb>;
[all …]
H A Dimx8mq-hummingboard-pulse.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
6 /dts-v1/;
8 #include "dt-bindings/usb/pd.h"
9 #include "imx8mq-sr-som.dtsi"
13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
16 stdout-path = &uart1;
19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
20 compatible = "regulator-fixed";
21 pinctrl-names = "default";
[all …]
H A Dimx8mq-tqma8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
6 #include "imx8mq.dtsi"
9 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ";
10 compatible = "tq,imx8mq-tqma8mq", "fsl,imx8mq";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MX_VCC1V8";
22 regulator-min-microvolt = <1800000>;
[all …]
H A Dimx8mq-kontron-pitx-imx8m.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree File for the Kontron pitx-imx8m board.
8 /dts-v1/;
10 #include "imx8mq.dtsi"
11 #include <dt-bindings/net/ti-dp83867.h>
14 model = "Kontron pITX-imx8m";
15 compatible = "kontron,pitx-imx8m", "fsl,imx8mq";
31 stdout-path = "serial2:115200n8";
34 pcie0_refclk: pcie0-clock {
35 compatible = "fixed-clock";
[all …]
H A Dimx8mq-pico-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
11 #include "imx8mq.dtsi"
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
[all …]
H A Dimx8mq-sr-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
6 #include "imx8mq.dtsi"
9 reg_vdd_3v3: regulator-vdd-3v3 {
10 compatible = "regulator-fixed";
11 regulator-always-on;
12 regulator-name = "vdd_3v3";
13 regulator-min-microvolt = <3300000>;
14 regulator-max-microvolt = <3300000>;
19 pinctrl-names = "default";
[all …]
H A Dimx8mq-librem5-devkit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
13 #include "imx8mq.dtsi"
17 compatible = "purism,librem5-devkit", "fsl,imx8mq";
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/linux/Documentation/devicetree/bindings/watchdog/
H A Dfsl-imx-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
17 - const: fsl,imx21-wdt
18 - items:
19 - enum:
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/linux/Documentation/devicetree/bindings/power/
H A Dfsl,imx-gpcv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
21 IP cores belonging to a power domain should contain a 'power-domains'
27 - fsl,imx7d-gpc
28 - fsl,imx8mn-gpc
29 - fsl,imx8mq-gpc
[all …]
/linux/drivers/pci/controller/dwc/
H A Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
30 #include <linux/reset.h>
37 #include "pcie-designware.h"
82 #define to_imx_pcie(x) dev_get_drvdata((x)->dev)
89 IMX8MQ, enumerator
118 #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
183 /* PCIe Port Logic registers (memory-mapped) */
196 /* PHY registers (not memory-mapped) */
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Zhu <hongxing.zhu@nxp.com>
13 "#phy-cells":
18 - fsl,imx8mm-pcie-phy
19 - fsl,imx8mp-pcie-phy
27 clock-names:
29 - const: ref
[all …]
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8mq-usb.c1 // SPDX-License-Identifier: GPL-2.0+
133 struct tca_blk *tca = imx_phy->tca; in tca_blk_typec_switch_set()
136 if (tca->orientation == orientation) in tca_blk_typec_switch_set()
139 ret = clk_prepare_enable(imx_phy->clk); in tca_blk_typec_switch_set()
144 clk_disable_unprepare(imx_phy->clk); in tca_blk_typec_switch_set()
152 struct device *dev = &pdev->dev; in tca_blk_get_typec_switch()
157 sw_desc.fwnode = dev->fwnode; in tca_blk_get_typec_switch()
193 mutex_lock(&tca->mutex); in tca_blk_orientation_set()
201 writel(val, tca->base + TCA_GCFG); in tca_blk_orientation_set()
204 writel(val, tca->base + TCA_TCPC); in tca_blk_orientation_set()
[all …]
/linux/drivers/reset/
H A Dreset-imx7.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * i.MX7 System Reset Controller (SRC) driver
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/reset/imx7-reset.h>
17 #include <dt-bindings/reset/imx8mq-reset.h>
18 #include <dt-bindings/reset/imx8mp-reset.h>
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
53 return regmap_update_bits(imx7src->regmap, in imx7_reset_update()
54 signal->offset, signal->bit, value); in imx7_reset_update()
95 const unsigned int bit = imx7src->signals[id].bit; in imx7_reset_set()
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
[all …]
/linux/drivers/pmdomain/imx/
H A Dimx8m-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <dt-bindings/power/imx8mm-power.h>
20 #include <dt-bindings/power/imx8mn-power.h>
21 #include <dt-bindings/power/imx8mp-power.h>
22 #include <dt-bindings/power/imx8mq-power.h>
51 * which is used to control the reset for the MIPI Phy.
53 * an if-statement should be used before setting and clearing this
88 const struct imx8m_blk_ctrl_domain_data *data = domain->data; in imx8m_blk_ctrl_power_on()
89 struct imx8m_blk_ctrl *bc = domain->bc; in imx8m_blk_ctrl_power_on()
93 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
[all …]
/linux/drivers/watchdog/
H A Dimx2_wdt.c1 // SPDX-License-Identifier: GPL-2.0
14 * ---- -----
15 * Registers: 32-bit 16-bit
34 #define DRIVER_NAME "imx2-wdt"
37 #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
38 #define IMX2_WDT_WCR_WDW BIT(7) /* -> Watchdog disable for WAIT */
39 #define IMX2_WDT_WCR_WDA BIT(5) /* -> External Reset WDOG_B */
40 #define IMX2_WDT_WCR_SRS BIT(4) /* -> Software Reset Signal */
41 #define IMX2_WDT_WCR_WRE BIT(3) /* -> WDOG Reset Enable */
42 #define IMX2_WDT_WCR_WDE BIT(2) /* -> Watchdog Enable */
[all …]

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