Lines Matching +full:imx8mq +full:- +full:reset
1 // SPDX-License-Identifier: GPL-2.0
9 * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/videobuf2-core.h>
25 #include <media/videobuf2-vmalloc.h>
31 #define DRIVER_NAME "hantro-vpu"
36 "Debug level - higher value produces more verbose messages");
42 ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, id); in hantro_get_ctrl()
43 return ctrl ? ctrl->p_cur.p : NULL; in hantro_get_ctrl()
48 struct vb2_queue *q = v4l2_m2m_get_dst_vq(ctx->fh.m2m_ctx); in hantro_get_ref()
67 src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); in hantro_job_finish_no_pm()
68 dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); in hantro_job_finish_no_pm()
75 src->sequence = ctx->sequence_out++; in hantro_job_finish_no_pm()
76 dst->sequence = ctx->sequence_cap++; in hantro_job_finish_no_pm()
78 if (v4l2_m2m_is_last_draining_src_buf(ctx->fh.m2m_ctx, src)) { in hantro_job_finish_no_pm()
79 dst->flags |= V4L2_BUF_FLAG_LAST; in hantro_job_finish_no_pm()
80 v4l2_event_queue_fh(&ctx->fh, &hantro_eos_event); in hantro_job_finish_no_pm()
81 v4l2_m2m_mark_stopped(ctx->fh.m2m_ctx); in hantro_job_finish_no_pm()
84 v4l2_m2m_buf_done_and_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx, in hantro_job_finish_no_pm()
92 pm_runtime_mark_last_busy(vpu->dev); in hantro_job_finish()
93 pm_runtime_put_autosuspend(vpu->dev); in hantro_job_finish()
95 clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks); in hantro_job_finish()
104 v4l2_m2m_get_curr_priv(vpu->m2m_dev); in hantro_irq_done()
111 if (cancel_delayed_work(&vpu->watchdog_work)) { in hantro_irq_done()
112 if (result == VB2_BUF_STATE_DONE && ctx->codec_ops->done) in hantro_irq_done()
113 ctx->codec_ops->done(ctx); in hantro_irq_done()
125 ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev); in hantro_watchdog()
128 if (ctx->codec_ops->reset) in hantro_watchdog()
129 ctx->codec_ops->reset(ctx); in hantro_watchdog()
139 v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req, in hantro_start_prepare_run()
140 &ctx->ctrl_handler); in hantro_start_prepare_run()
142 if (!ctx->is_encoder && !ctx->dev->variant->late_postproc) { in hantro_start_prepare_run()
143 if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) in hantro_start_prepare_run()
154 if (!ctx->is_encoder && ctx->dev->variant->late_postproc) { in hantro_end_prepare_run()
155 if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) in hantro_end_prepare_run()
162 v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req, in hantro_end_prepare_run()
163 &ctx->ctrl_handler); in hantro_end_prepare_run()
166 schedule_delayed_work(&ctx->dev->watchdog_work, in hantro_end_prepare_run()
179 ret = pm_runtime_resume_and_get(ctx->dev->dev); in device_run()
183 ret = clk_bulk_enable(ctx->dev->variant->num_clocks, ctx->dev->clocks); in device_run()
189 if (ctx->codec_ops->run(ctx)) in device_run()
195 hantro_job_finish_no_pm(ctx->dev, ctx, VB2_BUF_STATE_ERROR); in device_run()
208 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; in queue_init()
209 src_vq->io_modes = VB2_MMAP | VB2_DMABUF; in queue_init()
210 src_vq->drv_priv = ctx; in queue_init()
211 src_vq->ops = &hantro_queue_ops; in queue_init()
212 src_vq->mem_ops = &vb2_dma_contig_memops; in queue_init()
219 src_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES | in queue_init()
221 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); in queue_init()
222 src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; in queue_init()
223 src_vq->lock = &ctx->dev->vpu_mutex; in queue_init()
224 src_vq->dev = ctx->dev->v4l2_dev.dev; in queue_init()
225 src_vq->supports_requests = true; in queue_init()
231 dst_vq->bidirectional = true; in queue_init()
232 dst_vq->mem_ops = &vb2_dma_contig_memops; in queue_init()
233 dst_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES; in queue_init()
238 if (!ctx->is_encoder) { in queue_init()
239 dst_vq->dma_attrs |= DMA_ATTR_NO_KERNEL_MAPPING; in queue_init()
240 dst_vq->max_num_buffers = MAX_POSTPROC_BUFFERS; in queue_init()
243 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; in queue_init()
244 dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; in queue_init()
245 dst_vq->drv_priv = ctx; in queue_init()
246 dst_vq->ops = &hantro_queue_ops; in queue_init()
247 dst_vq->buf_struct_size = sizeof(struct hantro_decoded_buffer); in queue_init()
248 dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; in queue_init()
249 dst_vq->lock = &ctx->dev->vpu_mutex; in queue_init()
250 dst_vq->dev = ctx->dev->v4l2_dev.dev; in queue_init()
257 if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) { in hantro_try_ctrl()
258 const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; in hantro_try_ctrl()
260 if (sps->chroma_format_idc > 1) in hantro_try_ctrl()
262 return -EINVAL; in hantro_try_ctrl()
263 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) in hantro_try_ctrl()
265 return -EINVAL; in hantro_try_ctrl()
266 if (sps->bit_depth_luma_minus8 != 0) in hantro_try_ctrl()
267 /* Only 8-bit is supported */ in hantro_try_ctrl()
268 return -EINVAL; in hantro_try_ctrl()
269 } else if (ctrl->id == V4L2_CID_STATELESS_HEVC_SPS) { in hantro_try_ctrl()
270 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in hantro_try_ctrl()
272 if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) in hantro_try_ctrl()
273 /* Only 8-bit and 10-bit are supported */ in hantro_try_ctrl()
274 return -EINVAL; in hantro_try_ctrl()
275 } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { in hantro_try_ctrl()
276 const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; in hantro_try_ctrl()
279 if (dec_params->profile != 0) in hantro_try_ctrl()
280 return -EINVAL; in hantro_try_ctrl()
281 } else if (ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE) { in hantro_try_ctrl()
282 const struct v4l2_ctrl_av1_sequence *sequence = ctrl->p_new.p_av1_sequence; in hantro_try_ctrl()
284 if (sequence->bit_depth != 8 && sequence->bit_depth != 10) in hantro_try_ctrl()
285 return -EINVAL; in hantro_try_ctrl()
295 ctx = container_of(ctrl->handler, in hantro_jpeg_s_ctrl()
298 vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val); in hantro_jpeg_s_ctrl()
300 switch (ctrl->id) { in hantro_jpeg_s_ctrl()
302 ctx->jpeg_quality = ctrl->val; in hantro_jpeg_s_ctrl()
305 return -EINVAL; in hantro_jpeg_s_ctrl()
315 ctx = container_of(ctrl->handler, in hantro_vp9_s_ctrl()
318 switch (ctrl->id) { in hantro_vp9_s_ctrl()
320 int bit_depth = ctrl->p_new.p_vp9_frame->bit_depth; in hantro_vp9_s_ctrl()
322 if (ctx->bit_depth == bit_depth) in hantro_vp9_s_ctrl()
328 return -EINVAL; in hantro_vp9_s_ctrl()
338 ctx = container_of(ctrl->handler, in hantro_hevc_s_ctrl()
341 switch (ctrl->id) { in hantro_hevc_s_ctrl()
343 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in hantro_hevc_s_ctrl()
344 int bit_depth = sps->bit_depth_luma_minus8 + 8; in hantro_hevc_s_ctrl()
346 if (ctx->bit_depth == bit_depth) in hantro_hevc_s_ctrl()
352 return -EINVAL; in hantro_hevc_s_ctrl()
362 ctx = container_of(ctrl->handler, in hantro_av1_s_ctrl()
365 switch (ctrl->id) { in hantro_av1_s_ctrl()
368 int bit_depth = ctrl->p_new.p_av1_sequence->bit_depth; in hantro_av1_s_ctrl()
371 if (ctrl->p_new.p_av1_sequence->flags in hantro_av1_s_ctrl()
375 if (ctx->bit_depth == bit_depth && in hantro_av1_s_ctrl()
376 ctx->need_postproc == need_postproc) in hantro_av1_s_ctrl()
382 return -EINVAL; in hantro_av1_s_ctrl()
603 v4l2_ctrl_handler_init(&ctx->ctrl_handler, num_ctrls); in hantro_ctrls_setup()
609 v4l2_ctrl_new_custom(&ctx->ctrl_handler, in hantro_ctrls_setup()
611 if (ctx->ctrl_handler.error) { in hantro_ctrls_setup()
614 ctx->ctrl_handler.error); in hantro_ctrls_setup()
615 v4l2_ctrl_handler_free(&ctx->ctrl_handler); in hantro_ctrls_setup()
616 return ctx->ctrl_handler.error; in hantro_ctrls_setup()
619 return v4l2_ctrl_handler_setup(&ctx->ctrl_handler); in hantro_ctrls_setup()
639 * as vdev and ctx->fh), which have proper locking done in respective in hantro_open()
645 return -ENOMEM; in hantro_open()
647 ctx->dev = vpu; in hantro_open()
648 if (func->id == MEDIA_ENT_F_PROC_VIDEO_ENCODER) { in hantro_open()
649 allowed_codecs = vpu->variant->codec & HANTRO_ENCODERS; in hantro_open()
650 ctx->is_encoder = true; in hantro_open()
651 } else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) { in hantro_open()
652 allowed_codecs = vpu->variant->codec & HANTRO_DECODERS; in hantro_open()
653 ctx->is_encoder = false; in hantro_open()
655 ret = -ENODEV; in hantro_open()
659 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx, queue_init); in hantro_open()
660 if (IS_ERR(ctx->fh.m2m_ctx)) { in hantro_open()
661 ret = PTR_ERR(ctx->fh.m2m_ctx); in hantro_open()
665 v4l2_fh_init(&ctx->fh, vdev); in hantro_open()
666 filp->private_data = &ctx->fh; in hantro_open()
667 v4l2_fh_add(&ctx->fh); in hantro_open()
676 ctx->fh.ctrl_handler = &ctx->ctrl_handler; in hantro_open()
681 v4l2_fh_del(&ctx->fh); in hantro_open()
682 v4l2_fh_exit(&ctx->fh); in hantro_open()
691 container_of(filp->private_data, struct hantro_ctx, fh); in hantro_release()
697 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); in hantro_release()
698 v4l2_fh_del(&ctx->fh); in hantro_release()
699 v4l2_fh_exit(&ctx->fh); in hantro_release()
700 v4l2_ctrl_handler_free(&ctx->ctrl_handler); in hantro_release()
717 { .compatible = "rockchip,px30-vpu", .data = &px30_vpu_variant, },
718 { .compatible = "rockchip,rk3036-vpu", .data = &rk3036_vpu_variant, },
719 { .compatible = "rockchip,rk3066-vpu", .data = &rk3066_vpu_variant, },
720 { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
721 { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
722 { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
723 { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, },
724 { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
725 { .compatible = "rockchip,rk3588-vepu121", .data = &rk3568_vepu_variant, },
726 { .compatible = "rockchip,rk3588-av1-vpu", .data = &rk3588_vpu981_variant, },
729 { .compatible = "nxp,imx8mm-vpu-g1", .data = &imx8mm_vpu_g1_variant, },
730 { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
731 { .compatible = "nxp,imx8mq-vpu-g1", .data = &imx8mq_vpu_g1_variant },
732 { .compatible = "nxp,imx8mq-vpu-g2", .data = &imx8mq_vpu_g2_variant },
735 { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
738 { .compatible = "allwinner,sun50i-h6-vpu-g2", .data = &sunxi_vpu_variant, },
741 { .compatible = "st,stm32mp25-vdec", .data = &stm32mp25_vdec_variant, },
742 { .compatible = "st,stm32mp25-venc", .data = &stm32mp25_venc_variant, },
757 entity->obj_type = MEDIA_ENTITY_TYPE_BASE; in hantro_register_entity()
759 entity->info.dev.major = VIDEO_MAJOR; in hantro_register_entity()
760 entity->info.dev.minor = vdev->minor; in hantro_register_entity()
763 name = devm_kasprintf(mdev->dev, GFP_KERNEL, "%s-%s", vdev->name, in hantro_register_entity()
766 return -ENOMEM; in hantro_register_entity()
768 entity->name = name; in hantro_register_entity()
769 entity->function = function; in hantro_register_entity()
785 struct media_device *mdev = &vpu->mdev; in hantro_attach_func()
790 func->source_pad.flags = MEDIA_PAD_FL_SOURCE; in hantro_attach_func()
791 ret = hantro_register_entity(mdev, &func->vdev.entity, "source", in hantro_attach_func()
792 &func->source_pad, 1, MEDIA_ENT_F_IO_V4L, in hantro_attach_func()
793 &func->vdev); in hantro_attach_func()
797 func->proc_pads[0].flags = MEDIA_PAD_FL_SINK; in hantro_attach_func()
798 func->proc_pads[1].flags = MEDIA_PAD_FL_SOURCE; in hantro_attach_func()
799 ret = hantro_register_entity(mdev, &func->proc, "proc", in hantro_attach_func()
800 func->proc_pads, 2, func->id, in hantro_attach_func()
801 &func->vdev); in hantro_attach_func()
805 func->sink_pad.flags = MEDIA_PAD_FL_SINK; in hantro_attach_func()
806 ret = hantro_register_entity(mdev, &func->sink, "sink", in hantro_attach_func()
807 &func->sink_pad, 1, MEDIA_ENT_F_IO_V4L, in hantro_attach_func()
808 &func->vdev); in hantro_attach_func()
813 ret = media_create_pad_link(&func->vdev.entity, 0, &func->proc, 0, in hantro_attach_func()
819 ret = media_create_pad_link(&func->proc, 1, &func->sink, 0, in hantro_attach_func()
826 func->intf_devnode = media_devnode_create(mdev, MEDIA_INTF_T_V4L_VIDEO, in hantro_attach_func()
828 func->vdev.minor); in hantro_attach_func()
829 if (!func->intf_devnode) { in hantro_attach_func()
830 ret = -ENOMEM; in hantro_attach_func()
835 link = media_create_intf_link(&func->vdev.entity, in hantro_attach_func()
836 &func->intf_devnode->intf, in hantro_attach_func()
840 ret = -ENOMEM; in hantro_attach_func()
844 link = media_create_intf_link(&func->sink, &func->intf_devnode->intf, in hantro_attach_func()
848 ret = -ENOMEM; in hantro_attach_func()
854 media_devnode_remove(func->intf_devnode); in hantro_attach_func()
857 media_entity_remove_links(&func->sink); in hantro_attach_func()
860 media_entity_remove_links(&func->proc); in hantro_attach_func()
861 media_entity_remove_links(&func->vdev.entity); in hantro_attach_func()
864 media_device_unregister_entity(&func->sink); in hantro_attach_func()
867 media_device_unregister_entity(&func->proc); in hantro_attach_func()
870 media_device_unregister_entity(&func->vdev.entity); in hantro_attach_func()
876 media_devnode_remove(func->intf_devnode); in hantro_detach_func()
877 media_entity_remove_links(&func->sink); in hantro_detach_func()
878 media_entity_remove_links(&func->proc); in hantro_detach_func()
879 media_entity_remove_links(&func->vdev.entity); in hantro_detach_func()
880 media_device_unregister_entity(&func->sink); in hantro_detach_func()
881 media_device_unregister_entity(&func->proc); in hantro_detach_func()
882 media_device_unregister_entity(&func->vdev.entity); in hantro_detach_func()
892 match = of_match_node(of_hantro_match, vpu->dev->of_node); in hantro_add_func()
893 func = devm_kzalloc(vpu->dev, sizeof(*func), GFP_KERNEL); in hantro_add_func()
895 v4l2_err(&vpu->v4l2_dev, "Failed to allocate video device\n"); in hantro_add_func()
896 return -ENOMEM; in hantro_add_func()
899 func->id = funcid; in hantro_add_func()
901 vfd = &func->vdev; in hantro_add_func()
902 vfd->fops = &hantro_fops; in hantro_add_func()
903 vfd->release = video_device_release_empty; in hantro_add_func()
904 vfd->lock = &vpu->vpu_mutex; in hantro_add_func()
905 vfd->v4l2_dev = &vpu->v4l2_dev; in hantro_add_func()
906 vfd->vfl_dir = VFL_DIR_M2M; in hantro_add_func()
907 vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_M2M_MPLANE; in hantro_add_func()
908 vfd->ioctl_ops = &hantro_ioctl_ops; in hantro_add_func()
909 strscpy(vfd->name, match->compatible, sizeof(vfd->name)); in hantro_add_func()
910 strlcat(vfd->name, funcid == MEDIA_ENT_F_PROC_VIDEO_ENCODER ? in hantro_add_func()
911 "-enc" : "-dec", sizeof(vfd->name)); in hantro_add_func()
914 vpu->encoder = func; in hantro_add_func()
918 vpu->decoder = func; in hantro_add_func()
925 ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1); in hantro_add_func()
927 v4l2_err(&vpu->v4l2_dev, "Failed to register video device\n"); in hantro_add_func()
933 v4l2_err(&vpu->v4l2_dev, in hantro_add_func()
938 v4l2_info(&vpu->v4l2_dev, "registered %s as /dev/video%d\n", vfd->name, in hantro_add_func()
939 vfd->num); in hantro_add_func()
950 if (!vpu->variant->enc_fmts) in hantro_add_enc_func()
958 if (!vpu->variant->dec_fmts) in hantro_add_dec_func()
970 func = vpu->encoder; in hantro_remove_func()
972 func = vpu->decoder; in hantro_remove_func()
978 video_unregister_device(&func->vdev); in hantro_remove_func()
998 * kernel is currently missing support for multi-core handling. Exposing
1002 * cores. Once the driver gains multi-core support, the same technique
1013 ret = of_property_read_string(vpu->dev->of_node, "compatible", &compatible); in hantro_disable_multicore()
1025 return -EINVAL; in hantro_disable_multicore()
1027 is_main_core = (vpu->dev->of_node == node); in hantro_disable_multicore()
1032 dev_info(vpu->dev, "missing multi-core support, ignoring this instance\n"); in hantro_disable_multicore()
1033 return -ENODEV; in hantro_disable_multicore()
1046 vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL); in hantro_probe()
1048 return -ENOMEM; in hantro_probe()
1050 vpu->dev = &pdev->dev; in hantro_probe()
1051 vpu->pdev = pdev; in hantro_probe()
1052 mutex_init(&vpu->vpu_mutex); in hantro_probe()
1053 spin_lock_init(&vpu->irqlock); in hantro_probe()
1055 match = of_match_node(of_hantro_match, pdev->dev.of_node); in hantro_probe()
1056 vpu->variant = match->data; in hantro_probe()
1063 * Support for nxp,imx8mq-vpu is kept for backwards compatibility in hantro_probe()
1065 * nxp,imx8mq-vpu-g1 or nxp,imx8mq-vpu-g2 instead. in hantro_probe()
1067 if (of_device_is_compatible(pdev->dev.of_node, "nxp,imx8mq-vpu")) in hantro_probe()
1068 dev_warn(&pdev->dev, "%s compatible is deprecated\n", in hantro_probe()
1069 match->compatible); in hantro_probe()
1071 INIT_DELAYED_WORK(&vpu->watchdog_work, hantro_watchdog); in hantro_probe()
1073 vpu->clocks = devm_kcalloc(&pdev->dev, vpu->variant->num_clocks, in hantro_probe()
1074 sizeof(*vpu->clocks), GFP_KERNEL); in hantro_probe()
1075 if (!vpu->clocks) in hantro_probe()
1076 return -ENOMEM; in hantro_probe()
1078 if (vpu->variant->num_clocks > 1) { in hantro_probe()
1079 for (i = 0; i < vpu->variant->num_clocks; i++) in hantro_probe()
1080 vpu->clocks[i].id = vpu->variant->clk_names[i]; in hantro_probe()
1082 ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks, in hantro_probe()
1083 vpu->clocks); in hantro_probe()
1091 vpu->clocks[0].clk = devm_clk_get(&pdev->dev, NULL); in hantro_probe()
1092 if (IS_ERR(vpu->clocks[0].clk)) in hantro_probe()
1093 return PTR_ERR(vpu->clocks[0].clk); in hantro_probe()
1096 vpu->resets = devm_reset_control_array_get_optional_exclusive(&pdev->dev); in hantro_probe()
1097 if (IS_ERR(vpu->resets)) in hantro_probe()
1098 return PTR_ERR(vpu->resets); in hantro_probe()
1100 num_bases = vpu->variant->num_regs ?: 1; in hantro_probe()
1101 vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases, in hantro_probe()
1102 sizeof(*vpu->reg_bases), GFP_KERNEL); in hantro_probe()
1103 if (!vpu->reg_bases) in hantro_probe()
1104 return -ENOMEM; in hantro_probe()
1107 vpu->reg_bases[i] = vpu->variant->reg_names ? in hantro_probe()
1108 devm_platform_ioremap_resource_byname(pdev, vpu->variant->reg_names[i]) : in hantro_probe()
1110 if (IS_ERR(vpu->reg_bases[i])) in hantro_probe()
1111 return PTR_ERR(vpu->reg_bases[i]); in hantro_probe()
1113 vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; in hantro_probe()
1114 vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; in hantro_probe()
1117 * TODO: Eventually allow taking advantage of full 64-bit address space. in hantro_probe()
1121 ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32)); in hantro_probe()
1123 dev_err(vpu->dev, "Could not set DMA coherent mask.\n"); in hantro_probe()
1126 vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); in hantro_probe()
1128 for (i = 0; i < vpu->variant->num_irqs; i++) { in hantro_probe()
1132 if (!vpu->variant->irqs[i].handler) in hantro_probe()
1135 if (vpu->variant->num_irqs > 1) { in hantro_probe()
1136 irq_name = vpu->variant->irqs[i].name; in hantro_probe()
1137 irq = platform_get_irq_byname(vpu->pdev, irq_name); in hantro_probe()
1144 irq = platform_get_irq(vpu->pdev, 0); in hantro_probe()
1149 ret = devm_request_irq(vpu->dev, irq, in hantro_probe()
1150 vpu->variant->irqs[i].handler, 0, in hantro_probe()
1151 dev_name(vpu->dev), vpu); in hantro_probe()
1153 dev_err(vpu->dev, "Could not request %s IRQ.\n", in hantro_probe()
1159 if (vpu->variant->init) { in hantro_probe()
1160 ret = vpu->variant->init(vpu); in hantro_probe()
1162 dev_err(&pdev->dev, "Failed to init VPU hardware\n"); in hantro_probe()
1167 pm_runtime_set_autosuspend_delay(vpu->dev, 100); in hantro_probe()
1168 pm_runtime_use_autosuspend(vpu->dev); in hantro_probe()
1169 pm_runtime_enable(vpu->dev); in hantro_probe()
1171 ret = reset_control_deassert(vpu->resets); in hantro_probe()
1173 dev_err(&pdev->dev, "Failed to deassert resets\n"); in hantro_probe()
1177 ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks); in hantro_probe()
1179 dev_err(&pdev->dev, "Failed to prepare clocks\n"); in hantro_probe()
1183 ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev); in hantro_probe()
1185 dev_err(&pdev->dev, "Failed to register v4l2 device\n"); in hantro_probe()
1190 vpu->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops); in hantro_probe()
1191 if (IS_ERR(vpu->m2m_dev)) { in hantro_probe()
1192 v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem device\n"); in hantro_probe()
1193 ret = PTR_ERR(vpu->m2m_dev); in hantro_probe()
1197 vpu->mdev.dev = vpu->dev; in hantro_probe()
1198 strscpy(vpu->mdev.model, DRIVER_NAME, sizeof(vpu->mdev.model)); in hantro_probe()
1199 media_device_init(&vpu->mdev); in hantro_probe()
1200 vpu->mdev.ops = &hantro_m2m_media_ops; in hantro_probe()
1201 vpu->v4l2_dev.mdev = &vpu->mdev; in hantro_probe()
1205 dev_err(&pdev->dev, "Failed to register encoder\n"); in hantro_probe()
1211 dev_err(&pdev->dev, "Failed to register decoder\n"); in hantro_probe()
1215 ret = media_device_register(&vpu->mdev); in hantro_probe()
1217 v4l2_err(&vpu->v4l2_dev, "Failed to register mem2mem media device\n"); in hantro_probe()
1228 media_device_cleanup(&vpu->mdev); in hantro_probe()
1229 v4l2_m2m_release(vpu->m2m_dev); in hantro_probe()
1231 v4l2_device_unregister(&vpu->v4l2_dev); in hantro_probe()
1233 clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); in hantro_probe()
1235 reset_control_assert(vpu->resets); in hantro_probe()
1237 pm_runtime_dont_use_autosuspend(vpu->dev); in hantro_probe()
1238 pm_runtime_disable(vpu->dev); in hantro_probe()
1246 v4l2_info(&vpu->v4l2_dev, "Removing %s\n", pdev->name); in hantro_remove()
1248 media_device_unregister(&vpu->mdev); in hantro_remove()
1251 media_device_cleanup(&vpu->mdev); in hantro_remove()
1252 v4l2_m2m_release(vpu->m2m_dev); in hantro_remove()
1253 v4l2_device_unregister(&vpu->v4l2_dev); in hantro_remove()
1254 clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); in hantro_remove()
1255 reset_control_assert(vpu->resets); in hantro_remove()
1256 pm_runtime_dont_use_autosuspend(vpu->dev); in hantro_remove()
1257 pm_runtime_disable(vpu->dev); in hantro_remove()
1265 if (vpu->variant->runtime_resume) in hantro_runtime_resume()
1266 return vpu->variant->runtime_resume(vpu); in hantro_runtime_resume()
1290 MODULE_AUTHOR("Alpha Lin <Alpha.Lin@Rock-Chips.com>");