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/linux/Documentation/devicetree/bindings/i2c/
H A Dsnps,designware-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
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H A Dhisilicon,ascend910-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/hisilicon,ascend910-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HiSilicon common I2C controller
10 - Yicong Yang <yangyicong@hisilicon.com>
13 The HiSilicon common I2C controller can be used for many different
17 - $ref: /schemas/i2c/i2c-controller.yaml#
21 const: hisilicon,ascend910-i2c
32 clock-frequency:
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H A Datmel,at91sam-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: I2C for Atmel/Microchip platforms
11 - Alexandre Belloni <alexandre.belloni@bootlin.com>
16 - items:
17 - enum:
18 - atmel,at91rm9200-i2c
19 - atmel,at91sam9261-i2c
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/linux/arch/arc/boot/dts/
H A Dabilis_tb100_dvk.dts1 // SPDX-License-Identifier: GPL-2.0-only
10 /dts-v1/;
29 pinctrl-names = "default";
30 pinctrl-0 = <&pctl_uart0>;
33 phy-mode = "rgmii";
36 i2c0: i2c@ff120000 {
37 i2c-sda-hold-time-ns = <432>;
39 i2c1: i2c@ff121000 {
40 i2c-sda-hold-time-ns = <432>;
42 i2c2: i2c@ff122000 {
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H A Dabilis_tb101_dvk.dts1 // SPDX-License-Identifier: GPL-2.0-only
10 /dts-v1/;
29 pinctrl-names = "default";
30 pinctrl-0 = <&pctl_uart0>;
33 phy-mode = "rgmii";
36 i2c0: i2c@ff120000 {
37 i2c-sda-hold-time-ns = <432>;
39 i2c1: i2c@ff121000 {
40 i2c-sda-hold-time-ns = <432>;
42 i2c2: i2c@ff122000 {
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/linux/drivers/mfd/
H A Dintel-lpss-acpi.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #include "intel-lpss.h"
28 PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_SPT_SSP),
42 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
56 PROPERTY_ENTRY_U32("reg-io-width", 4),
57 PROPERTY_ENTRY_U32("reg-shift", 2),
58 PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
73 PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_BXT_SSP),
87 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
88 PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
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/linux/arch/riscv/boot/dts/starfive/
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-path = "serial0:115200n8";
25 timebase-frequency = <6250000>;
34 compatible = "gpio-leds";
36 led-ack {
40 linux,default-trigger = "heartbeat";
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/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d2_xplained.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
8 /dts-v1/;
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/mfd/atmel-flexcom.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h>
18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
28 stdout-path = "serial0:115200n8";
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H A Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
29 i2c-mux {
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/linux/arch/mips/boot/dts/mscc/
H A Djaguar2_common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 stdout-path = "serial0:115200n8";
24 i2c-sda-hold-time-ns = <300>;
H A Dluton_pcb091.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "mscc,luton-pcb091", "mscc,luton";
19 stdout-path = "serial0:115200n8";
29 i2c-sda-hold-time-ns = <300>;
H A Docelot_pcb123.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
9 compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
12 stdout-path = "serial0:115200n8";
33 compatible = "macronix,mx25l25635f", "jedec,spi-nor";
34 spi-max-frequency = <20000000>;
39 &i2c {
40 clock-frequency = <100000>;
41 i2c-sda-hold-time-ns = <300>;
51 phy-handle = <&phy0>;
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H A Dserval_common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
20 stdout-path = "serial0:115200n8";
23 i2c0_imux: i2c0-imux {
24 compatible = "i2c-mux-pinctrl";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 i2c-parent = <&i2c0>;
28 pinctrl-names =
31 pinctrl-0 = <&i2cmux_0>;
32 pinctrl-1 = <&i2cmux_1>;
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/linux/include/linux/
H A Di2c.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * i2c.h - definitions for the Linux i2c bus interface
4 * Copyright (C) 1995-2000 Simon G. Vogl
5 * Copyright (C) 2013-2019 Wolfram Sang <wsa@kernel.org>
24 #include <uapi/linux/i2c.h>
30 /* --- General options ------------------------------------------------ */
43 /* I2C Frequency Modes */
61 * transmit one message at a time, a more complex version can be used to
69 * i2c_master_recv - issue a single I2C message in master receive mode
83 * i2c_master_recv_dmasafe - issue a single I2C message in master receive mode
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/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
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/linux/drivers/i2c/busses/
H A Di2c-axxia.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This driver implements I2C master functionality using the LSI API2C
7 * maximum 255 bytes at a time. If a larger transfer is attempted, error code
8 * (-EINVAL) is returned.
14 #include <linux/i2c.h>
84 #define SLV_ADDR_DEC_SA1M BIT(3) /* 10-bit addressing for addr_1 enabled */
86 #define SLV_ADDR_DEC_SA2M BIT(5) /* 10-bit addressing for addr_2 enabled */
121 * struct axxia_i2c_dev - I2C device context
130 * @adapter: core i2c abstraction
131 * @i2c_clk: clock reference for i2c input clock
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/linux/arch/arm64/boot/dts/amd/
H A Delba.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Copyright 2020-2022 Advanced Micro Devices, Inc.
6 #include <dt-bindings/gpio/gpio.h>
7 #include "dt-bindings/interrupt-controller/arm-gic.h"
11 compatible = "amd,pensando-elba";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 dma-coherent;
19 compatible = "fixed-clock";
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_phy.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
29 * ixgbe_out_i2c_byte_ack - Send I2C byte with ack
46 * ixgbe_in_i2c_byte_ack - Receive an I2C byte and send ack
64 * ixgbe_ones_comp_byte_add - Perform one's complement addition
68 * Returns one's complement 8-bit sum.
79 * ixgbe_read_i2c_combined_generic_int - Perform I2C read combined operation
81 * @addr: I2C bus address to read from
82 * @reg: I2C device register to read from
91 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
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/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 #address-cells = <1>;
14 #size-cells = <1>;
18 frame-number = <1>;
30 #mbox-cells = <1>;
32 clock-names = "apb_pclk";
36 compatible = "arm,mmu-400", "arm,smmu-v1";
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/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.c2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
52 /*-----------------------------------------------------------------------------
54 ----------------------------------------------------------------------------*/
75 #define DRX39XX_MAIN_FIRMWARE "dvb-fe-drxj-mc-1.0.8.fw"
201 /*-----------------------------------------------------------------------------
203 ----------------------------------------------------------------------------*/
205 /*-----------------------------------------------------------------------------
207 ----------------------------------------------------------------------------*/
209 #define DRXJ_WAKE_UP_KEY (demod->my_i2c_dev_addr->i2c_addr)
214 * \brief Default I2C address of a demodulator instance.
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