| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | ibm-power9-dual.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
7 #address-cells = <1>;
8 #size-cells = <1>;
9 chip-id = <0>;
16 i2c@1800 {
17 compatible = "ibm,fsi-i2c-master";
19 #address-cells = <1>;
20 #size-cells = <0>;
22 cfam0_i2c0: i2c-bus@0 {
26 cfam0_i2c1: i2c-bus@1 {
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| H A D | aspeed-bmc-opp-tacoma.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
15 stdout-path = &uart5;
24 reserved-memory {
25 #address-cells = <1>;
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c.txt | 1 Generic device tree bindings for I2C busses
4 This document describes generic bindings which can be used to describe I2C
7 Required properties (per bus)
8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
17 The cells properties above define that an address of children of an I2C bus
20 Optional properties (per bus)
21 -----------------------------
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| H A D | i2c-demux-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-demux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Demultiplexer
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
13 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
14 route the I2C signals, and represents the pin multiplexing configuration
15 using the pinctrl device tree bindings. This may be used to select one I2C
17 another I2C IP core on the SoC. The most simple example is to fall back to
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| H A D | i2c-mux-gpmux.txt | 1 General Purpose I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a mux controller
4 from the mux subsystem to route the I2C signals.
6 .-----. .-----.
8 .------------. '-----' '-----'
10 | | .--------+--------'
11 | .------. | .------+ child bus A, on MUX value set to 0
12 | | I2C |-|--| Mux |
13 | '------' | '--+---+ child bus B, on MUX value set to 1
14 | .------. | | '----------+--------+--------.
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| H A D | i2c-mux-pinctrl.txt | 1 Pinctrl-based I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses pin multiplexing to
4 route the I2C signals, and represents the pin multiplexing configuration
7 +-----+ +-----+
9 +------------------------+ +-----+ +-----+
11 | /----|------+--------+
12 | +---+ +------+ | child bus A, on first set of pins
13 | |I2C|---|Pinmux| |
14 | +---+ +------+ | child bus B, on second set of pins
15 | \----|------+--------+--------+
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| H A D | i2c-arb-gpio-challenge.txt | 1 GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
4 the master of an I2C bus in a multimaster situation.
7 the standard I2C multi-master rules. Using GPIOs is generally useful in
8 the case where there is a device on the bus that has errata and/or bugs
12 * It is nonstandard (not using standard I2C multimaster)
13 * Having two masters on a bus in general makes it relatively hard to debug
14 problems (hard to tell if i2c issues were caused by one master, another, or
15 some device on the bus).
20 All masters on the bus have a 'bus claim' line which is an output that the
21 others can see. These are all active low with pull-ups enabled. We'll
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| H A D | i2c-mux-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
17 +-----+ +-----+
19 +------------------------+ +-----+ +-----+
21 | /----|------+--------+
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|
| H A D | i2c-mux.txt | 1 Common i2c bus multiplexer/switch properties.
3 An i2c bus multiplexer/switch will have several child busses that are
4 numbered uniquely in a device dependent manner. The nodes for an i2c bus
5 multiplexer/switch will have one child node for each child bus.
8 - #address-cells = <1>;
9 This property is required if the i2c-mux child node does not exist.
11 - #size-cells = <0>;
12 This property is required if the i2c-mux child node does not exist.
14 - i2c-mux
15 For i2c multiplexers/switches that have child nodes that are a mixture
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| H A D | i2c-demux-pinctrl.txt | 1 Pinctrl-based I2C Bus DeMux
3 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
4 route the I2C signals, and represents the pin multiplexing configuration using
5 the pinctrl device tree bindings. This may be used to select one I2C IP core at
6 runtime which may have a better feature set for a given task than another I2C
10 +-------------------------------+
12 | | +-----+ +-----+
13 | +------------+ | | dev | | dev |
14 | |I2C IP Core1|--\ | +-----+ +-----+
15 | +------------+ \-------+ | | |
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| H A D | i2c-mux-gpio.txt | 1 GPIO-based I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses GPIOs to
4 route the I2C signals.
6 +-----+ +-----+
8 +------------+ +-----+ +-----+
10 | | /--------+--------+
11 | +------+ | +------+ child bus A, on GPIO value set to 0
12 | | I2C |-|--| Mux |
13 | +------+ | +--+---+ child bus B, on GPIO value set to 1
14 | | | \----------+--------+--------+
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| H A D | i2c-mux-gpmux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: General Purpose I2C Bus Mux
10 - Peter Rosin <peda@axentia.se>
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
16 .-----. .-----.
18 .------------. '-----' '-----'
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| H A D | aspeed,i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
10 - Rayn Chen <rayn_chen@aspeedtech.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - aspeed,ast2400-i2c-bus
19 - aspeed,ast2500-i2c-bus
20 - aspeed,ast2600-i2c-bus
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| H A D | i2c-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses GPIOs to route the I2C signals.
15 +-----+ +-----+
17 +------------+ +-----+ +-----+
19 | | /--------+--------+
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| H A D | i2c-ocores.txt | 1 Device tree configuration for i2c-ocores
4 - compatible : "opencores,i2c-ocores"
6 "sifive,fu540-c000-i2c", "sifive,i2c0"
7 For Opencore based I2C IP block reimplemented in
8 FU540-C000 SoC.
9 "sifive,fu740-c000-i2c", "sifive,i2c0"
10 For Opencore based I2C IP block reimplemented in
11 FU740-C000 SoC.
12 Please refer to sifive-blocks-ip-versioning.txt for
14 - reg : bus address start and address range size of device
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| H A D | nvidia,tegra186-bpmp-i2c.txt | 1 NVIDIA Tegra186 BPMP I2C controller
4 devices, such as the I2C controller for the power management I2C bus. Software
6 transactions on that I2C bus. This binding describes an I2C bus that is
9 The BPMP I2C node must be located directly inside the main BPMP node. See
10 ../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding.
12 This node represents an I2C controller. See ../i2c/i2c.txt for details of the
13 core I2C binding.
16 - compatible:
19 - "nvidia,tegra186-bpmp-i2c".
20 - #address-cells: Address cells for I2C device address.
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| H A D | i2c-aspeed.txt | 1 Device tree configuration for the I2C busses on the AST24XX, AST25XX, and AST26XX SoCs.
4 - #address-cells : should be 1
5 - #size-cells : should be 0
6 - reg : address offset and range of bus
7 - compatible : should be "aspeed,ast2400-i2c-bus"
8 or "aspeed,ast2500-i2c-bus"
9 or "aspeed,ast2600-i2c-bus"
10 - clocks : root clock of bus, should reference the APB
12 - resets : phandle to reset controller with the reset number in
14 - interrupts : interrupt number
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| H A D | i2c-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common i2c bus multiplexer/switch properties.
10 - Peter Rosin <peda@axentia.se>
13 An i2c bus multiplexer/switch will have several child busses that are numbered
14 uniquely in a device dependent manner. The nodes for an i2c bus
15 multiplexer/switch will have one child node for each child bus.
17 For i2c multiplexers/switches that have child nodes that are a mixture of both
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| H A D | nvidia,tegra186-bpmp-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) BPMP I2C controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 owns certain HW devices, such as the I2C controller for the power
16 management I2C bus. Software running on other CPUs must perform IPC to
17 the BPMP in order to execute transactions on that I2C bus. This
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| H A D | samsung,s3c2410-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC I2C Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - enum:
16 - samsung,s3c2410-i2c
17 - samsung,s3c2440-i2c
18 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
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| /freebsd/share/man/man4/ |
| H A D | iicbus.4 | 30 .Nd I2C bus system
41 system provides a uniform, modular and architecture-independent
42 system for the implementation of drivers to control various I2C devices
43 and to utilize different I2C controllers.
44 .Sh I2C
45 I2C is an acronym for Inter Integrated Circuit bus.
46 The I2C bus was developed
49 easy way to connect a CPU to peripheral chips in a TV-set.
51 The BUS physically consists of 2 active wires and a ground connection.
56 Every component hooked up to the bus has its own unique address whether it
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| H A D | iicmux.4 | 1 .\"-
2 .\" SPDX-License-Identifier: BSD-2-Clause
32 .Nd I2C bus mulitiplexer framework
37 .Bd -ragged -offset indent
44 .Bd -literal -offset indent
55 I2C bus multiplexer (mux) hardware.
61 This manual page provides an overview of the I2C mux framework and its
64 Generally speaking, an I2C mux is connected to an upstream I2C bus, and to
65 one or more downstream I2C buses, and it can be commanded to connect
66 any one of the downstream buses to the upstream bus.
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| /freebsd/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | trivial-rtc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/rtc/trivial-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
18 - $ref: rtc.yaml#
23 # AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
24 - abracon,abb5zes3
25 # AB-RTCMC-32.768kHz-EOZ9: Real Time Clock/Calendar Module with I2C Interface
26 - abracon,abeoz9
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| /freebsd/usr.sbin/i2c/ |
| H A D | i2c.8 | 2 .\" Copyright (C) 2008-2009 Semihalf, Michal Hajduk and Bartlomiej Sieka
30 .Nm i2c
31 .Nd test I2C bus and slave devices
34 .Cm -a Ar address
44 .Cm -h
46 .Cm -i
49 .Op Ar -
51 .Cm -r
55 .Cm -s
63 on an I2C bus.
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| /freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/cpm/ |
| H A D | i2c.txt | 1 * I2C
3 The I2C controller is expressed as a bus under the CPM node.
6 - compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
7 - reg : On CPM2 devices, the second resource doesn't specify the I2C
10 - #address-cells : Should be one. The cell is the i2c device address with
12 - #size-cells : Should be zero.
13 - clock-frequency : Can be used to set the i2c clock frequency. If
16 i2c drivers to find the bus to probe:
17 - linux,i2c-index : Can be used to hard code an i2c bus number. By default,
18 the bus number is dynamically assigned by the i2c core.
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