Lines Matching +full:i2c +full:- +full:bus
1 Device tree configuration for the I2C busses on the AST24XX, AST25XX, and AST26XX SoCs.
4 - #address-cells : should be 1
5 - #size-cells : should be 0
6 - reg : address offset and range of bus
7 - compatible : should be "aspeed,ast2400-i2c-bus"
8 or "aspeed,ast2500-i2c-bus"
9 or "aspeed,ast2600-i2c-bus"
10 - clocks : root clock of bus, should reference the APB
12 - resets : phandle to reset controller with the reset number in
14 - interrupts : interrupt number
17 - bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not
19 - multi-master : states that there is another master active on this bus.
23 i2c {
24 compatible = "simple-bus";
25 #address-cells = <1>;
26 #size-cells = <1>;
29 i2c_ic: interrupt-controller@0 {
30 #interrupt-cells = <1>;
31 compatible = "aspeed,ast2400-i2c-ic";
34 interrupt-controller;
37 i2c0: i2c-bus@40 {
38 #address-cells = <1>;
39 #size-cells = <0>;
40 #interrupt-cells = <1>;
42 compatible = "aspeed,ast2400-i2c-bus";
45 bus-frequency = <100000>;
47 interrupt-parent = <&i2c_ic>;