| /freebsd/sys/contrib/device-tree/Bindings/iio/filter/ |
| H A D | adi,admv8818.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ADMV8818 Digitally Tunable, High-Pass and Low-Pass Filter 10 - Antoniu Miclaus <antoniu.miclaus@analog.com> 14 features a digitally selectable frequency of operation. 15 The device features four independently controlled high-pass 16 filters (HPFs) and four independently controlled low-pass filters 17 (LPFs) that span the 2 GHz to 18 GHz frequency range. 24 - adi,admv8818 [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-exynos5.txt | 1 * Samsung's High Speed I2C controller 3 The Samsung's High Speed I2C controller is used to interface with I2C devices 7 - compatible: value should be. 8 -> "samsung,exynos5-hsi2c", (DEPRECATED) 11 -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available 13 -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available 15 -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available 18 - reg: physical base address of the controller and length of memory mapped 20 - interrupts: interrupt number to the cpu. 21 - #address-cells: always 1 (for i2c addresses) [all …]
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| H A D | i2c-exynos5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung's High Speed I2C controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 The Samsung's High Speed I2C controller is used to interface with I2C devices 19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details. 24 - enum: 25 - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/frequency/ |
| H A D | adi,adf4377.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/frequency/adi,adf4377.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Antoniu Miclaus <antoniu.miclaus@analog.com> 11 - Dragos Bogdan <dragos.bogdan@analog.com> 14 The ADF4377 is a high performance, ultralow jitter, dual output integer-N 25 - adi,adf4377 26 - adi,adf4378 31 spi-max-frequency: [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Brown <broonie@kernel.org> 20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$" 22 "#address-cells": 25 "#size-cells": 28 cs-gpios: 32 increased automatically with max(cs-gpios, hardware chip selects). [all …]
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| /freebsd/sys/dts/arm/ |
| H A D | annapurna-alpine.dts | 1 /*- 28 /dts-v1/; 32 #address-cells = <1>; 33 #size-cells = <1>; 40 #address-cells = <1>; 41 #size-cells = <0>; 45 compatible = "arm,cortex-a15"; 47 d-cache-line-size = <64>; // 64 bytes 48 i-cache-line-size = <64>; // 64 bytes 49 d-cache-size = <0x8000>; // L1, 32K [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | adi,ad4000.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marcelo Schmitt <marcelo.schmitt@analog.com> 15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4000-4004-4008.pdf 16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4001-4005.pdf 17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4002-4006-4010.pdf 18 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4003-4007-4011.pdf 19 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4020-4021-4022.pdf 20 https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4001.pdf [all …]
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| H A D | adi,ad7944.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Hennerich <Michael.Hennerich@analog.com> 11 - Nuno Sá <nuno.sa@analog.com> 14 A family of pin-compatible single channel differential analog to digital 21 $ref: /schemas/spi/spi-peripheral-props.yaml# 26 - adi,ad7944 27 - adi,ad7985 28 - adi,ad7986 [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra30-cardhu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 5 #include "tegra30-cpu-opp.dtsi" 6 #include "tegra30-cpu-opp-microvol [all...] |
| H A D | tegra124-nyan.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 14 stdout-path = "serial0:115200n8"; 20 * missing a unit-address. However, the bootloader on these Chromebook 22 * Adding the unit-address causes the bootloader to create a /memory 34 /delete-node/ memory@80000000; 40 vdd-supply = <&vdd_3v3_hdmi>; 41 pll-supply = <&vdd_hdmi_pll>; 42 hdmi-supply = <&vdd_5v0_hdmi>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/ |
| H A D | lpc3250-phy3250.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * PHYTEC phyCORE-LPC3250 board 5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com> 9 /dts-v1/; 13 model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250"; 22 compatible = "gpio-leds"; 25 gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */ 26 default-state = "off"; 30 gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */ 31 linux,default-trigger = "heartbeat"; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | allwinner,sun55i-a523-ccu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/allwinner,sun55i-a523-ccu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andre Przywara <andre.przywara@arm.com> 13 "#clock-cells": 16 "#reset-cells": 21 - allwinner,sun55i-a523-ccu 22 - allwinner,sun55i-a523-r-ccu 31 clock-names: [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
| H A D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 model = "ZynqMP zc1751-xm015-dc1 RevA"; [all …]
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| H A D | zynqmp-sck-kv-g-revB.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 15 /dts-v1/; 18 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 19 #address-cells = <1>; 20 #size-cells = <0>; [all …]
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| H A D | zynqmp-sck-kv-g-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 8 * "A" – A01 board un-modified (NXP) 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/net/ti-dp83867.h> 17 #include <dt-bindings/phy/phy.h> 18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 /dts-v1/; 23 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 24 #address-cells = <1>; [all …]
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| H A D | zynqmp-sck-kv-g-revB.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 /dts-v1/; 20 compatible = "xlnx,zynqmp-sk-kv260-rev2", 21 "xlnx,zynqmp-sk-kv260-rev1", [all …]
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| /freebsd/share/man/man4/ |
| H A D | spigen.4 | 36 .Bd -ragged -offset indent 45 .Bd -literal -offset indent 54 device is associated with a single chip-select 56 with that chip-select line asserted. 58 SPI data transfers are inherently bi-directional; there are no separate 75 .Bl -tag -width indent 83 .Bd -literal 91 The buffers for the transfer are a previously-mmap'd region. 100 is non-zero, the data appears in the memory region immediately 104 .Bd -literal [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | ovti,ov02a10.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Dongchu [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | maxim-ds1302.txt | 1 * Maxim/Dallas Semiconductor DS-1302 RTC 5 The device uses the standard MicroWire half-duplex transfer timing. 12 - compatible : Should be "maxim,ds1302" 16 - reg : Should be address of the device chip select within 19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V, 22 - spi-3wire : The device has a shared signal IN/OUT line. 24 - spi-lsb-first : DS-1302 requires least significant bit first 27 - spi-cs-high: DS-1302 has active high chip select line. This is 33 #address-cells = <1>; 34 #size-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/dac/ |
| H A D | adi,ad8460.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Mariel Tinaco <mariel.tinaco@analog.com> 14 Analog Devices AD8460 110 V High Voltage, 1 A High Current, 15 Arbitrary Waveform Generator with Integrated 14-Bit High Speed DAC 16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad8460.pdf 21 - adi,ad8460 32 dma-names: 34 - const: tx [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | mmc-controller-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 14 possible slots or ports for multi-slot controllers. 17 "#address-cells": 22 "#size-cells": 29 broken-cd: 34 cd-gpios: [all …]
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| /freebsd/usr.bin/morse/ |
| H A D | morse.6 | 41 .Op Fl f Ar frequency 50 .Bl -tag -width indent 78 .It Fl f Ar frequency 79 Set the sidetone frequency to something other than the default 600 Hz. 156 characters with the high-order bit set 159 .Bl -tag -width ".Li ISO8859-15" -compact 160 .It Li ISO8859-1 161 .It Li ISO8859-15 162 Interpret characters with the high-order bit set as Western European characters. 164 .It Li KOI8-R [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/misc/ |
| H A D | eeprom-93xx46.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/misc/eeprom-93xx46.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Cory Tusar <cory.tusar@pid1solutions.com> 15 - atmel,at93c46 16 - atmel,at93c46d 17 - atmel,at93c56 18 - atmel,at93c66 19 - eeprom-93xx46 [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-ast2600-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 /dts-v1/; 6 #include "aspeed-g6.dtsi" 7 #include <dt-bindings/gpio/aspeed-gpio.h> 11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600"; 26 reserved-memory { 27 #address-cells = <1>; 28 #size-cells = <1>; 34 compatible = "shared-dma-pool"; 41 compatible = "shared-dma-pool"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/xilinx/ |
| H A D | zynq-zc706.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2011 - 2014 Xilinx 6 /dts-v1/; 7 #include "zynq-7000.dtsi" 11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; 30 stdout-path = "serial0:115200n8"; 34 compatible = "usb-nop-xceiv"; 35 #phy-cells = <0>; 40 ps-clk-frequency = <33333333>; 45 phy-mode = "rgmii-id"; [all …]
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