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/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
19 - nvidia,tegra264-pmc
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/linux/include/sound/
H A Dhda_verbs.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * HD-audio codec verbs
59 /* f10-f1a: GPIO */
162 #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
163 #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
164 #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
242 * (for DP1.2 MST)
245 #define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */
246 #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
263 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
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/linux/sound/hda/codecs/hdmi/
H A Dtegrahdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Nvidia Tegra HDMI codec support
23 * accessed using vendor-defined verbs. These registers can be used for
24 * interoperability between the HDA and HDMI drivers.
31 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
33 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
38 * +---------+-------+--------+--------+
40 * +-----------------------------------|
45 * trigger to hdmi.
64 * the format is invalidated so that the HDMI codec can be disabled.
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H A Dintelhdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Intel HDMI codec support
19 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
40 struct hdmi_spec *spec = codec->spec; in intel_haswell_enable_all_pins()
42 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_enable_all_pins()
44 if (vendor_param == - in intel_haswell_enable_all_pins()
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H A Dhdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * hdmi.c - routines for HDMI/DisplayPort codecs
6 * Copyright(c) 2008-2010 Intel Corporation
53 struct hdmi_spec *spec = codec->spec; in snd_hda_hdmi_pin_id_to_pin_index()
58 * (dev_id == -1) means it is NON-MST pin in snd_hda_hdmi_pin_id_to_pin_index()
61 if (dev_id == -1) in snd_hda_hdmi_pin_id_to_pin_index()
64 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in snd_hda_hdmi_pin_id_to_pin_index()
66 if ((per_pin->pin_nid == pin_nid) && in snd_hda_hdmi_pin_id_to_pin_index()
67 (per_pin->dev_id == dev_id)) in snd_hda_hdmi_pin_id_to_pin_index()
71 codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid); in snd_hda_hdmi_pin_id_to_pin_index()
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/linux/drivers/gpu/drm/amd/display/include/
H A Ddpcd_defs.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
62 DOWNSTREAM_DVI_HDMI_DP_PLUS_PLUS,/* DVI, HDMI, DP++ */
95 PHY_TEST_PATTERN_80BIT_CUSTOM,/* For DP1.2 only */
/linux/drivers/gpu/drm/amd/include/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
538 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-rock-5-itx.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/soc/rockchip,vop2.h>
15 #include "dt-bindings/usb/pd.h"
20 compatible = "radxa,rock-5-itx", "rockchip,rk3588";
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H A Drk3588-firefly-itx-3588j.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include <dt-bindings/soc/rockchip,vop2.h>
11 #include "dt-bindings/usb/pd.h"
13 #include "rk3588-firefly-core-3588j.dtsi"
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H A Drk3588-base-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 auddsm_pins: auddsm-pins {
30 /omit-if-no-ref/
31 bt1120_pins: bt1120-pins {
71 /omit-if-no-ref/
72 can0m0_pins: can0m0-pins {
80 /omit-if-no-ref/
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/linux/sound/soc/codecs/
H A Dhdac_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * hdac_hdmi.c - ASoc HDA-HDMI codec driver for Intel platforms
5 * Copyright (C) 2014-2015 Intel Corp
17 #include <linux/hdmi.h>
107 unsigned char chmap[8]; /* ALSA API channel-ma
143 hdac_hdmi_get_pcm_from_cvt(struct hdac_hdmi_priv * hdmi,struct hdac_hdmi_cvt * cvt) hdac_hdmi_get_pcm_from_cvt() argument
281 get_hdmi_pcm_from_id(struct hdac_hdmi_priv * hdmi,int pcm_idx) get_hdmi_pcm_from_id() argument
362 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_setup_audio_infoframe() local
441 struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai); hdac_hdmi_set_stream() local
467 struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai); hdac_hdmi_set_hw_params() local
527 hdac_hdmi_get_port_from_cvt(struct hdac_device * hdev,struct hdac_hdmi_priv * hdmi,struct hdac_hdmi_cvt * cvt) hdac_hdmi_get_port_from_cvt() argument
566 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_verify_connect_sel_all_pins() local
591 struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai); hdac_hdmi_pcm_open() local
634 struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai); hdac_hdmi_pcm_close() local
658 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_query_cvt_params() local
721 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_get_pcm() local
818 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_cvt_output_widget_event() local
908 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_set_pin_port_mux() local
966 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_create_pin_port_muxs() local
1033 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_add_pinmux_cvt_route() local
1076 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); create_fill_widget_route_map() local
1177 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_init_dai_map() local
1204 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_add_cvt() local
1256 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_present_sense() local
1367 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_add_pin() local
1399 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_skl_enable_all_pins() local
1417 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_skl_enable_dp12() local
1447 hdac_hdmi_create_dais(struct hdac_device * hdev,struct snd_soc_dai_driver ** dais,struct hdac_hdmi_priv * hdmi,int num_dais) hdac_hdmi_create_dais() argument
1519 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_parse_and_map_nid() local
1586 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_eld_notify_cb() local
1642 hdac_hdmi_present_sense_all_pins(struct hdac_device * hdev,struct hdac_hdmi_priv * hdmi,bool detect_pin_caps) hdac_hdmi_present_sense_all_pins() argument
1667 struct hdac_hdmi_priv *hdmi = snd_soc_component_get_drvdata(component); hdmi_codec_probe() local
1727 struct hdac_hdmi_priv *hdmi = snd_soc_component_get_drvdata(component); hdmi_codec_remove() local
1742 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdmi_codec_resume() local
1772 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_get_chmap() local
1781 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_set_chmap() local
1802 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); is_hdac_hdmi_pcm_attached() local
1816 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_get_spk_alloc() local
1913 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); clear_dapm_works() local
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/linux/drivers/gpu/drm/radeon/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
707 // =3: HDMI encoder
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/linux/drivers/soc/tegra/
H A Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
37 #include <linux/pinctrl/pinconf-generic.h>
57 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
59 #include <dt-bindings/gpio/tegra186-gpio.h>
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.h1 /* SPDX-License-Identifier: MIT */
3 * Copyright (C) 2015-2020 Advanced Micro Devices, Inc. All rights reserved.
101 * struct dm_compressor_info - Buffer info used by frame buffer compression
115 * struct dmub_hpd_work - Handle time consuming work in low priority outbox IRQ
128 * struct vblank_control_work - Work data for vblank control
144 * struct idle_workqueue - Work data for periodic action in idle
158 * struct vupdate_offload_work - Work data for offloading task from vupdate handler
174 * struct amdgpu_dm_luminance_data - Custom luminance data
176 * @input_signal: Input signal in range 0-255
184 * struct amdgpu_dm_backlight_caps - Information about backlight
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194-p2972-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra194-p2888.dtsi"
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
24 #address-cells = <1>;
25 #size-cells = <0>;
31 remote-endpoint = <&xbar_i2s1_ep>;
39 dai-format = "i2s";
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_cx0_phy.c1 // SPDX-License-Identifier: MIT
40 if (display->platform.pantherlake) { in intel_encoder_is_c10phy()
41 if (display->platform.pantherlake_wildcatlake) in intel_encoder_is_c10phy()
47 if ((display->platform.lunarlake || display->platform.meteorlake) && phy < PHY_C) in intel_encoder_is_c10phy()
70 * In DP-alt with pin assignment D, only PHY lane 0 is owned in intel_cx0_get_owned_lane_mask()
83 drm_WARN_ON(display->drm, !enabled); in assert_dc_off()
93 XELPDP_PORT_MSGBUS_TIMER(display, encoder->port, lane), in intel_cx0_program_msgbus_timer()
135 XELPDP_PORT_P2M_MSGBUS_STATUS(display, encoder->por in intel_clear_response_ready_flag()
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/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c31 * TODO - The reason link owns stream's dpms programming sequence is
83 for (i = 0; i < dc->link_count; i++) { in link_blank_all_dp_displays()
84 if ((dc->links[i]->connector_signal != SIGNAL_TYPE_DISPLAY_PORT) || in link_blank_all_dp_displays()
85 (dc->links[i]->priv == NULL) || (dc->links[i]->local_sink == NULL)) in link_blank_all_dp_displays()
89 dp_retrieve_lttpr_cap(dc->links[i]); in link_blank_all_dp_displays()
91 status = core_link_read_dpcd(dc->links[i], DP_SET_POWER, in link_blank_all_dp_displays()
95 link_blank_dp_stream(dc->links[i], true); in link_blank_all_dp_displays()
106 for (i = 0; i < dc->link_count; i++) { in link_blank_all_edp_displays()
107 if ((dc->links[i]->connector_signal != SIGNAL_TYPE_EDP) || in link_blank_all_edp_displays()
108 (!dc->links[i]->edp_sink_present)) in link_blank_all_edp_displays()
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/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_capability.c57 link->ctx->logger
109 return (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_VGA_CONVERTER) && in is_dp_active_dongle()
110 (link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_CONVERTER); in is_dp_active_dongle()
115 return link->dpcd_caps.is_branch_dev; in is_dp_branch_device()
133 return -1; in translate_dpcd_max_bpc()
166 return DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE * (lttpr_count - 1); in dp_get_closest_lttpr_offset()
195 link_rate = LINK_RATE_LOW; // Rate_1 (RBR) - 1.62 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
198 link_rate = LINK_RATE_RATE_2; // Rate_2 - 2.16 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
201 link_rate = LINK_RATE_RATE_3; // Rate_3 - 2.43 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
204 link_rate = LINK_RATE_HIGH; // Rate_4 (HBR) - 2.70 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
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