Lines Matching +full:hdmi +full:- +full:dp1
1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/clock/exynos5420.h>
12 #include <linux/clk-provider.h>
19 #include "clk-cpu.h"
20 #include "clk-exynos5-subcmu.h"
898 /* Audio - I2S */
905 /* SPI Pre-Ratio */
1228 GATE(CLK_DP1, "dp1", "aclk200_disp1", GATE_IP_DISP1, 4, 0, 0),
1230 GATE(CLK_HDMI, "hdmi", "aclk200_disp1", GATE_IP_DISP1, 6, 0, 0),
1439 PLL_36XX_RATE(24 * MHZ, 393216003U, 197, 3, 2, -25690),
1442 PLL_36XX_RATE(24 * MHZ, 196608001U, 197, 3, 3, -25690),
1449 PLL_36XX_RATE(24 * MHZ, 49152000U, 197, 3, 5, -25690),
1573 { .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, },
1595 hws = ctx->clk_data.hws;
1672 clk_prepare_enable(hws[CLK_MOUT_SW_ACLK_G3D]->clk);
1677 clk_prepare_enable(hws[CLK_MOUT_BPLL]->clk);
1686 CLK_OF_DECLARE_DRIVER(exynos5420_clk, "samsung,exynos5420-clock",
1693 CLK_OF_DECLARE_DRIVER(exynos5800_clk, "samsung,exynos5800-clock",