| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | arm,vexpress-juno.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | sprd,spi-adi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
16 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
20 ADI controller has 50 channels including 2 software read/write channels and
[all …]
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| H A D | spi-sprd-adi.txt | 3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
4 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
8 ADI controller has 50 channels including 2 software read/write channels and
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
19 the analog chip address where user want to access by hardware components.
[all …]
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| H A D | brcm,bcm63xx-hsspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - William Zhang <william.zhang@broadcom.com>
11 - Kursad Oney <kursad.oney@broadcom.com>
12 - Jonas Gorski <jonas.gorski@gmail.com>
18 BCM4908 and BCM6858. The old MIPS based chip should continue to use the
19 brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to
20 use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | jedec,spi-nor.txt | 4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
6 - compatible : May include a device-specific string consisting of the
7 manufacturer and name of the chip. A list of supported chip
9 Must also include "jedec,spi-nor" for any SPI NOR flash that can
10 be identified by the JEDEC READ ID opcode (0x9F).
12 Supported chip names:
50 The following chip names have been used historically to
52 JEDEC READ ID opcode (0x9F):
53 m25p05-nonjedec
54 m25p10-nonjedec
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| H A D | mtd-physmap.txt | 1 CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
6 - compatible : should contain the specific model of mtd chip(s)
7 used, if known, followed by either "cfi-flash", "jedec-flash",
8 "mtd-ram" or "mtd-rom".
9 - reg : Address range(s) of the mtd chip(s)
11 non-identical chips can be described in one node.
12 - bank-width : Width (in bytes) of the bank. Equal to the
14 - device-width : (optional) Width of a single mtd chip. If
15 omitted, assumed to be equal to 'bank-width'.
16 - #address-cells, #size-cells : Must be present if the device has
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| H A D | raw-nand-chip.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Raw NAND Chip Common Properties
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
19 {size} bytes for a particular raw NAND chip.
21 The interpretation of these parameters is implementation-defined, so
28 pattern: "^nand@[a-f0-9]$"
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| /freebsd/sys/contrib/device-tree/Bindings/mips/ |
| H A D | mscc.txt | 7 - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"
12 o CPU chip regs:
14 The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous
15 functionalities: chip ID, general purpose register for software use, reset
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
20 - reg : Should contain registers location and length
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
30 The SoC has a few registers (HSIO) handling miscellaneous functionalities:
35 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
36 - reg : Should contain registers location and length
[all …]
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| /freebsd/sys/dev/bhnd/ |
| H A D | bhnd_ids.h | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 1999-2015, Broadcom Corporation
9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's
30 * JEDEC JEP-106 Core Vendor IDs
32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's
33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell
38 * will need to convert bus-specific vendor IDs to their BHND_MFGID
39 * JEP-106 equivalents.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/timestamp/ |
| H A D | nvidia,tegra194-hte.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra on chip generic hardware timestamping engine (HTE) provider
10 - Dipen Patel <dipenp@nvidia.com>
13 Tegra SoC has two instances of generic hardware timestamping engines (GTE)
14 known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip
16 timestamp (taken from system counter) in its internal hardware FIFO. It has
24 - nvidia,tegra194-gte-aon
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| /freebsd/share/man/man9/ |
| H A D | bhnd.9 | 1 .\" Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
334 .Fa "const struct bhnd_chipid *chip" "const struct bhnd_chip_match *desc"
375 .Fa "chip" "hwrev" "flags"
390 .Fa "chip" "pkg" "flags"
392 .Bd -literal
398 .Bd -literal
406 .Bd -literal
414 .Bd -literal
417 .Bd -literal
427 .Bd -literal
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| /freebsd/sys/contrib/device-tree/Bindings/arm/amlogic/ |
| H A D | amlogic,meson-gx-ao-secure.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
22 const: amlogic,meson-gx-ao-secure
24 - compatible
29 - items:
30 - const: amlogic,meson-gx-ao-secure
31 - const: syscon
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| /freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | mediatek,gce-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Houlong Wei <houlong.wei@mediatek.com>
13 The Global Command Engine (GCE) is an instruction based, multi-threaded,
14 single-core command dispatcher for MediaTek hardware. The Command Queue
18 We use mediatek,gce-mailbox.yaml to define the properties for CMDQ mailbox
28 mediatek,gce-events:
30 GCE has an event table in SRAM, consisting of 1024 event IDs (0~1023).
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| /freebsd/share/man/man4/ |
| H A D | hifn.4 | 37 .Bd -ragged -offset indent
46 .Bd -literal -offset indent
59 SHA1, and SHA1-HMAC operations for
79 .Bl -tag -width namenamenamena -offset indent
87 .It XL-Crypt
88 Only board based on 7811 (which is faster than 7751 and has
118 The Hifn 9751 shares the same PCI ID.
119 This chip is basically a 7751, but with the cryptographic functions missing.
122 compression, the 9751-based cards are not useful.
127 The 7751 chip starts out at initialization by only supporting compression.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/devfreq/event/ |
| H A D | samsung,exynos-nocp.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-nocp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos NoC (Network on Chip) Probe
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 The Samsung Exynos542x SoC has a NoC (Network on Chip) Probe for NoC bus.
16 that the Network on Chip (NoC) probes detects are transported over the
19 traffic debug or statistic collectors. Exynos542x bus has multiple NoC probes
[all …]
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| /freebsd/sys/dev/pci/ |
| H A D | pci_user.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
70 u_int16_t pc_subvendor; /* card vendor ID */
71 u_int16_t pc_subdevice; /* card device ID, assigned by
73 u_int16_t pc_vendor; /* chip vendor ID */
74 u_int16_t pc_device; /* chip device ID, assigned by
75 chip vendor */
76 u_int8_t pc_class; /* chip PCI class */
77 u_int8_t pc_subclass; /* chip PCI subclass */
78 u_int8_t pc_progif; /* chip PCI programming interface */
[all …]
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| /freebsd/contrib/ntp/html/ |
| H A D | clock.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
12 <!-- #BeginDate format:En2m -->4-Aug-2011 23:40<!-- #EndDate -->
24 <h4 id="intro">General Overview</h4>
27 <h4 id="panic">Panic Threshold</h4>
28 …-of-year (TOY) chip to maintain the time when the power is off. When the computer is restarted, t…
29 <h4 id="step"> Step and Stepout Thresholds</h4>
31 …has been extremely rare and almost always the result of a hardware failure or operator error. The…
33 …idered before using these options. The slew rate is fixed at 500 parts-per-million (PPM) by th…
34 <h4 id="hold">Hold Timer</h4>
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| /freebsd/sys/dev/aic7xxx/ |
| H A D | aic7xxx_pci.c | 1 /*-
6 * SPDX-License-Identifier: BSD-3-Clause
8 * Copyright (c) 1994-2001 Justin T. Gibbs.
9 * Copyright (c) 2000-2001 Adaptec Inc.
23 * 3. Neither the names of the above-listed copyright holders nor the names
44 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_pci.c#78 $
54 uint64_t id;
61 uint64_t id; ahc_compose_id() local
151 DEVID_9005_TYPE(id) global() argument
157 DEVID_9005_MAXRATE(id) global() argument
163 DEVID_9005_MFUNC(id) global() argument
165 DEVID_9005_CLASS(id) global() argument
168 SUBID_9005_TYPE(id) global() argument
174 SUBID_9005_TYPE_KNOWN(id) global() argument
180 SUBID_9005_MAXRATE(id) global() argument
186 SUBID_9005_SEEPTYPE(id) global() argument
194 SUBID_9005_AUTOTERM(id) global() argument
199 SUBID_9005_NUMCHAN(id) global() argument
204 SUBID_9005_LEGACYCONN(id) global() argument
209 SUBID_9005_MFUNCENB(id) global() argument
1060 u_int chip; ahc_ext_scbram_present() local
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| /freebsd/sys/contrib/device-tree/Bindings/pwm/ |
| H A D | pwm-sifive.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Walmsley <paul.walmsley@sifive.com>
16 run at the same period. The period also has significant restrictions on
19 numbers can be found here -
21 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
24 - $ref: pwm.yaml#
29 - enum:
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| /freebsd/sys/contrib/device-tree/Bindings/fsi/ |
| H A D | fsi.txt | 4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
13 the fsi-master-* binding specifications.
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
26 fsi-slave-engine@<addr> {
32 fsi-slave-engine@<addr> {
39 Note that since the bus is probe-able, some (or all) of the topology may
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | qcom,ebi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ebi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 external memory (such as NAND or other memory-mapped peripherals) whereas
17 NOR flash memories), WE (write enable). This on top of 6 different chip selects
20 Apparently this bus is clocked at 64MHz. It has dedicated pins on the package
25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
27 The chip selects have the following memory range assignments. This region of
28 memory is referred to as "Chip Peripheral SS FPB0" and is 168MB big.
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: i2c-gpio
20 sda-gpios:
24 from <dt-bindings/gpio/gpio.h> since the signal is by definition
28 scl-gpios:
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| /freebsd/sys/contrib/device-tree/Bindings/thermal/ |
| H A D | nvidia,tegra30-tsensor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra30-tsensor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
16 and voltage of the chip. Sensors are placed across the die to gauge the
17 temperature of the whole chip. The TSENSOR module:
26 levels to reset the chip and sets a flag in the PMC.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | sifive,fu540-c000-pdma.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
5 $schema: http://devicetree.org/meta-schema
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| /freebsd/sys/dev/iicbus/rtc/ |
| H A D | ds13rtc.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * Driver for Dallas/Maxim DS13xx real-time clock/calendar chips:
32 * - DS1307 = Original/basic rtc + 56 bytes ram; 5v only.
33 * - DS1308 = Updated 1307, available in 1.8v-5v variations.
34 * - DS1337 = Like 1308, integrated xtal, 32khz output on at powerup.
35 * - DS1338 = Like 1308, integrated xtal.
36 * - DS1339 = Like 1337, integrated xtal, integrated trickle charger.
37 * - DS1340 = Like 1338, ST M41T00 compatible.
38 * - DS1341 = Like 1338, can slave-sync osc to external clock signal.
[all …]
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