| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments GPMC Bus Child Nodes
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
15 represents any device connected to the GPMC bus. It may be a Flash chip,
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
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| H A D | omap-gpmc.txt | 7 - compatible: Should be set to one of the following:
9 ti,omap2420-gpmc (omap2420)
10 ti,omap2430-gpmc (omap2430)
11 ti,omap3430-gpmc (omap3430 & omap3630)
12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x)
13 ti,am3352-gpmc (am335x devices)
15 - reg: A resource specifier for the register space
17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is
19 - #address-cells: Must be set to 2 to allow memory address translation
20 - #size-cells: Must be set to 1 to allow CS address passing
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| H A D | synopsys.txt | 3 The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and 32-bit
4 bus width configurations.
6 The Zynq DDR ECC controller has an optional ECC support in half-bus width
7 (16-bit) configuration.
13 - compatible: One of:
14 - 'xlnx,zynq-ddrc-a05' : Zynq DDR ECC controller
15 - 'xlnx,zynqmp-ddrc-2.40a' : ZynqMP DDR ECC controller
16 - reg: Should contain DDR controller registers location and length.
18 Required properties for "xlnx,zynqmp-ddrc-2.40a":
19 - interrupts: Property with a value describing the interrupt number.
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| H A D | intel,ixp4xx-expansion-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral properties for Intel IXP4xx Expansion Bus
10 The IXP4xx expansion bus controller handles access to devices on the
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
18 intel,ixp4xx-eb-t1:
23 intel,ixp4xx-eb-t2:
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| H A D | synopsys,ddrc-ecc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/synopsys,ddrc-ecc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Manish Narani <manish.narani@xilinx.com>
12 - Michal Simek <michal.simek@xilinx.com>
15 The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and
16 32-bit bus width configurations.
18 The Zynq DDR ECC controller has an optional ECC support in half-bus width
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| /freebsd/share/man/man4/ |
| H A D | vr.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
60 The VIA Rhine chips use bus master DMA and have a descriptor layout
71 physical layer devices via an MII bus.
73 10 and 100Mbps speeds in either full or half duplex.
78 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
90 .Ar full-duplex
92 .Ar half-duplex
99 .Ar full-duplex
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| H A D | sk.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
36 .Nd "SysKonnect SK-984x and SK-982x PCI Gigabit Ethernet adapter driver"
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
55 driver provides support for the SysKonnect SK-984x and SK-982x series PCI
62 provides an interface to the PCI bus, DMA support, packet buffering
65 allowing dual-port NIC configurations.
67 The SK-982x 1000baseT adapters also include a Broadcom BCM5400 1000baseTX
85 The XaQti XMAC II supports full and half duplex operation with
98 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
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| H A D | xl.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
57 and "tornado" bus-master Etherlink XL chips.
59 The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
60 transceivers as well as an MII bus for externally attached PHY
63 NS 83840A 10/100 PHY for 10/100 Mbps support in full or half-duplex.
64 The 3c905B adapters have built-in autonegotiation logic mapped onto
67 adapters such as the 3c905-TX and 3c905B-TX are capable of 10 or
68 100Mbps data rates in either full or half duplex and can be manually
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| H A D | rl.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 The RealTek 8129/8139 series controllers use bus master DMA but do not use a
60 descriptor-based data transfer mechanism.
72 whereas the 8129 uses an external PHY via an MII bus.
74 supports both 10 and 100Mbps speeds in either full or half duplex.
85 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
100 .Ar full-duplex
102 .Ar half-duplex
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| H A D | re.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
67 features, and use a descriptor-based DMA mechanism.
71 The 8139C+ is a single-chip solution combining both a 10/100 MAC and PHY.
73 The 816xS, 811xS, 8168 and 8111 are single-chip devices containing both a
76 in both 32-bit PCI and 64-bit PCI models.
78 embedded LAN-on-motherboard applications.
90 .Bl -tag -width ".Cm 10baseT/UTP"
102 .Cm full-duplex
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| H A D | nge.4 | 16 .\" 4. Neither the name of the author nor the names of any co-contributors
42 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
63 VLAN tagging/insertion as well as a 2048-bit multicast hash filter
68 full or half duplex.
81 .Bl -tag -width 10baseTXUTP
93 .Cm full-duplex
95 .Cm half-duplex
103 .Cm full-duplex
105 .Cm half-duplex
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| H A D | ste.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 The Sundance ST201 uses bus master DMA and is designed to be a
64 The ST201 has a 64-bit multicast hash filter
66 It supports both 10 and 100Mbps speeds in either full or half duplex
72 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
84 .Ar full-duplex
86 .Ar half-duplex
93 .Ar full-duplex
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| H A D | vge.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 The VT6120/VT6122 is a 33/66MHz 64-bit PCI device which combines a tri-speed
65 as well as VLAN filtering, a 64-entry CAM filter and a 64-entry VLAN filter,
66 64-bit multicast hash filter, 4 separate transmit DMA queues, flow control
93 .Bl -tag -width ".Cm 10baseT/UTP"
105 .Cm full-duplex
107 .Cm half-duplex
115 .Cm full-duplex
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| H A D | bge.4 | 16 .\" 4. Neither the name of the author nor the names of any co-contributors
42 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
61 copper cable, except for the SysKonnect SK-9D41 which supports only
64 It has two R4000 CPU cores and is PCI v2.2 and PCI-X v1.0 compliant.
67 multiple RX and TX DMA rings for QoS applications, rules-based
69 a 256-bit multicast hash filter.
71 provided via value-add firmware updates.
78 Most BCM5700-based cards also use the Broadcom BCM5401 or BCM5411 10/100/1000
81 full or half duplex.
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| H A D | lge.4 | 16 .\" 4. Neither the name of the author nor the names of any co-contributors
42 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
64 VLAN-based filtering as well as a 64-bit multicast hash filter.
76 .Bl -tag -width ".Cm 1000baseSX"
85 .Cm full-duplex
87 .Cm half-duplex
94 .Bl -tag -width ".Cm full-duplex"
95 .It Cm full-duplex
97 .It Cm half-duplex
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| H A D | em.4 | 1 .\"-
2 .\" SPDX-License-Identifier: BSD-3-Clause
4 .\" Copyright (c) 2001-2003, Intel Corporation
47 .Bd -ragged -offset indent
55 .Bd -literal -offset indent
61 driver provides support for PCI/PCI-X Gigabit Ethernet adapters based on
86 on all but 82542-based adapters.
114 .Bl -tag -width ".Cm 10baseT/UTP"
116 Enables auto-negotiation for speed and duplex.
122 .Cm full-duplex
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| H A D | ti.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
63 Either chip can be used in either a 32-bit or 64-bit PCI
66 and bus master DMA.
118 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
130 .Ar full-duplex
132 .Ar half-duplex
139 .Ar full-duplex
141 .Ar half-duplex
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| H A D | sis.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
63 The SiS 900 is a 100Mbps Ethernet MAC and MII-compliant transceiver
65 It uses a bus master DMA and a scatter/gather
70 The SiS 900 and SiS 7016 both have a 128-bit multicast hash filter
81 .Bl -tag -width 10baseTXUTP
93 .Sq full-duplex
95 .Sq half-duplex
103 .Sq full-duplex
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| H A D | igc.4 | 1 .\"-
4 .\" SPDX-License-Identifier: BSD-3-Clause
16 .Bd -ragged -offset indent
24 .Bd -literal -offset indent
33 MSI/MSI-X, TSO, and RSS.
49 .Bl -tag -width ".Cm 10baseT/UTP"
51 Enables auto-negotiation for speed and duplex.
57 .Cm half-duplex
64 .Cm half-duplex
69 .Cm full-duplex
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| H A D | mouse.4 | 3 .\" Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
42 Currently there are specific device drivers for bus, InPort, PS/2, and USB mice.
54 Movement and button states are usually encoded in fixed-length data packets.
58 The mouse drivers may have ``non-blocking'' attribute which will make
74 .Bl -tag -width Byte_1 -compact
76 .Bl -tag -width bit_7 -compact
91 The first half of horizontal movement count in two's complement;
92 -128 through 127.
94 The first half of vertical movement count in two's complement;
95 -128 through 127.
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| /freebsd/sys/contrib/device-tree/Bindings/i3c/ |
| H A D | i3c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I3C bus
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
16 may, during the life of the bus, request mastership.
20 pattern: "^i3c@[0-9a-f]+$"
22 "#address-cells":
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| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duple
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| /freebsd/sys/dev/etherswitch/arswitch/ |
| H A D | arswitch_reg.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2011-2012 Stefan Bethke.
30 #include <sys/bus.h>
46 #include <machine/bus.h>
75 if (sc->page != page) { in arswitch_split_setpage()
78 sc->page = page; in arswitch_split_setpage()
83 * Read half a register. Some of the registers define control bits, and
84 * the sequence of half-word accesses matters. The register addresses
85 * are word-even (mod 4).
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| /freebsd/lib/libpmc/pmu-events/arch/arm64/ |
| H A D | common-and-microarch.json | 129 "PublicDescription": "Attributable Level 1 data cache write-back",
132 "BriefDescription": "Attributable Level 1 data cache write-back"
147 "PublicDescription": "Attributable Level 2 data cache write-back",
150 "BriefDescription": "Attributable Level 2 data cache write-back"
153 "PublicDescription": "Attributable Bus access",
156 "BriefDescription": "Attributable Bus access"
177 "PublicDescription": "Bus cycle",
180 "BriefDescription": "Bus cycle"
273 "PublicDescription": "Access to another socket in a multi-socket system",
276 "BriefDescription": "Access to another socket in a multi-socket system"
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| /freebsd/share/doc/smm/05.fastfs/ |
| H A D | 4.t | 68 The systems were running multi-user but were otherwise quiescent.
86 File System Bus Measured Speed Bandwidth % CPU
95 Table 2a \- Reading rates of the old and new UNIX file systems.
101 File System Bus Measured Speed Bandwidth % CPU
110 Table 2b \- Writing rates of the old and new UNIX file systems.
122 to about half the rates given in Table 2 when the file
133 able to use about 3\-5% of the disk bandwidth,
172 non-optimal seek order in which they are requested.
217 block on any platter is between a sixth and a half a revolution.
219 contiguous blocks uses only half of the bandwidth of any given track.
|