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/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Df16cintrin.h1 /*===---- f16cintrin.h - F16C intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
23 /* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
28 /// Converts a 16-bit half-precision float value into a 32-bit float
36 /// A 16-bit half-precision float value.
37 /// \returns The converted 32-bit float value.
46 /// Converts a 32-bit single-precision float value to a 16-bit
47 /// half-precision float value.
58 /// A 32-bit single-precision float value to be converted to a 16-bit
[all …]
H A Davxneconvertintrin.h1 /*===-------------- avxneconvertintrin.h - AVXNECONVERT --------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
28 /// Convert scalar BF16 (16-bit) floating-point element
30 /// single-precision (32-bit) floating-point, broadcast it to packed
31 /// single-precision (32-bit) floating-point elements, and store the results in
43 /// A pointer to a 16-bit memory location. The address of the memory
46 /// A 128-bit vector of [4 x float].
61 /// Convert scalar BF16 (16-bit) floating-point element
63 /// single-precision (32-bit) floating-point, broadcast it to packed
[all …]
H A Dbmi2intrin.h1 /*===---- bmi2intrin.h - BMI2 intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Copies the unsigned 32-bit integer \a __X and zeroes the upper bits
21 /// starting at bit number \a __Y.
36 /// The 32-bit source value to copy.
38 /// The lower 8 bits specify the bit number of the lowest bit to zero.
39 /// \returns The partially zeroed 32-bit value.
46 /// Deposit (scatter) low-order bits from the unsigned 32-bit integer \a __X
47 /// into the 32-bit result, according to the mask in the unsigned 32-bit
[all …]
/freebsd/share/man/man4/
H A Dnge.416 .\" 4. Neither the name of the author nor the names of any co-contributors
42 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
59 The DP83820 supports TBI (ten bit interface) and GMII
63 VLAN tagging/insertion as well as a 2048-bit multicast hash filter
68 full or half duplex.
81 .Bl -tag -width 10baseTXUTP
93 .Cm full-duplex
95 .Cm half-duplex
103 .Cm full-duplex
[all …]
H A Dmouse.43 .\" Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
54 Movement and button states are usually encoded in fixed-length data packets.
58 The mouse drivers may have ``non-blocking'' attribute which will make
74 .Bl -tag -width Byte_1 -compact
76 .Bl -tag -width bit_7 -compact
77 .It bit 7
79 .It bit 6..3
81 .It bit 2
83 .It bit 1
87 .It bit 0
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H A Dre.415 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
67 features, and use a descriptor-based DMA mechanism.
71 The 8139C+ is a single-chip solution combining both a 10/100 MAC and PHY.
73 The 816xS, 811xS, 8168 and 8111 are single-chip devices containing both a
76 in both 32-bit PCI and 64-bit PCI models.
78 embedded LAN-on-motherboard applications.
90 .Bl -tag -width ".Cm 10baseT/UTP"
102 .Cm full-duplex
[all …]
H A Dvge.415 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 The VT6120/VT6122 is a 33/66MHz 64-bit PCI device which combines a tri-speed
65 as well as VLAN filtering, a 64-entry CAM filter and a 64-entry VLAN filter,
66 64-bit multicast hash filter, 4 separate transmit DMA queues, flow control
93 .Bl -tag -width ".Cm 10baseT/UTP"
105 .Cm full-duplex
107 .Cm half-duplex
115 .Cm full-duplex
[all …]
H A Dstge.440 .Bd -ragged -offset indent
48 .Bd -literal -offset indent
57 The Sundance/Tamarack TC9021 is found on the D-Link DGE-550T
59 It uses an external PHY or an external 10-bit interface.
65 receive interrupt moderation mechanism as well as a 64-bit
67 The Sundance/Tamarack TC9021 supports TBI (ten bit interface)
80 .Bl -tag -width ".Cm 10baseT/UTP"
92 .Cm full-duplex
94 .Cm half-duplex
102 .Cm full-duplex
[all …]
H A Dsysmouse.41 .\" Copyright 1997 John-Mark Gurney. All rights reserved.
12 .\" THIS SOFTWARE IS PROVIDED BY John-Mark Gurney AND CONTRIBUTORS ``AS IS'' AND
72 .Bl -tag -width Byte_1 -compact
74 .Bl -tag -width bit_7 -compact
75 .It bit 7
77 .It bit 6..3
79 .It bit 2
81 .It bit 1
85 .It bit 0
89 The first half of horizontal movement count in two's complement;
[all …]
H A Dxl.415 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
57 and "tornado" bus-master Etherlink XL chips.
59 The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
63 NS 83840A 10/100 PHY for 10/100 Mbps support in full or half-duplex.
64 The 3c905B adapters have built-in autonegotiation logic mapped onto
67 adapters such as the 3c905-TX and 3c905B-TX are capable of 10 or
68 100Mbps data rates in either full or half duplex and can be manually
75 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
[all …]
H A Dmsk.435 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
56 features and an interrupt moderation mechanism as well as a 64-bit
58 The Yukon II supports TBI (ten bit interface) and GMII
71 .Bl -tag -width ".Cm 10baseT/UTP"
83 .Cm full-duplex
85 .Cm half-duplex
93 .Cm full-duplex
95 .Cm half-duplex
103 .Cm full-duplex
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/
H A Dfp_div_impl.inc1 //===-- fp_div_impl.inc - Floating point division -----------------*- C -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements soft-float division with the IEEE-754 default
12 //===----------------------------------------------------------------------===//
16 // The __divXf3__ function implements Newton-Raphson floating point division.
19 // every iteration, the two modes are supported: N full-width iterations (as
20 // it is done for float32 by default) and (N-1) half-width iteration plus one
21 // final full-width iteration. It is expected that half-width integer
26 // Half the bit-size of rep_t
[all …]
/illumos-gate/usr/src/man/man7/
H A Dieee802.3.747 .Sy show-linkprop
51 .Sy set-linkprop
55 .Sy show-ether
61 Note that some statistics are available in both 32- and 64-bit counters,
62 in which case the name of the 64 bit statistic will be the same as the
63 32-bit, but with
68 is the 64-bit version of the
75 .Bl -tag -width tx_late_collisions
77 Advertises 10 Mbps half-duplex support.
79 Advertises 10 Mbps full-duplex support.
[all …]
/illumos-gate/usr/src/cmd/sgs/libelf/common/
H A DREADME.LFS28 Why 32-bit libelf is not Large File Aware
29 -----------------------------------------
31 The ELF format uses unsigned 32-bit integers for offsets, so the
32 theoretical limit on a 32-bit ELF object is 4GB. However, libelf
34 link-editor and related tools are all based on libelf, so the
35 32-bit version of the link-editor also has a 2GB limit, despite
38 Large file support (LFS) is a half step between the 32 and 64-bit
39 worlds, in which an otherwise 32-bit limited process is allowed to
41 of a signed 32-bit integer, as represented by the system type off_t).
44 if the program needs to access a large amount of data at once --- having
[all …]
/freebsd/sys/contrib/ncsw/Peripherals/FM/MACSEC/
H A Dfm_macsec_master.h2 * Copyright 2008-2015 Freescale Semiconductor Inc.
168 volatile uint32_t rxsci1h; /**< RX Secure Channel Identifier first half */
169 volatile uint32_t rxsci2h; /**< RX Secure Channel Identifier second half */
171 volatile uint32_t ifio1hs; /**< ifInOctets first half Statistic */
172 volatile uint32_t ifio2hs; /**< ifInOctets second half Statistic */
180 volatile uint32_t inov1hs; /**< InOctetsValidated first half Statistic */
181 volatile uint32_t inov2hs; /**< InOctetsValidated second half Statistic */
182 volatile uint32_t inod1hs; /**< InOctetsDecrypted first half Statistic */
183 volatile uint32_t inod2hs; /**< InOctetsDecrypted second half Statistic */
188 volatile uint32_t rxaninuss[MAX_NUM_OF_SA_PER_SC]; /**< RX AN 0-3 InNotUsingSA Statistic */
[all …]
/illumos-gate/usr/src/man/man4d/
H A Dbge.4d8 bge \- SUNW,bge Gigabit Ethernet driver for Broadcom BCM57xx
18 The \fBbge\fR Gigabit Ethernet driver is a multi-threaded, loadable, clonable,
19 GLD-based STREAMS driver supporting the Data Link Provider Interface,
24 PHY functions and provide three-speed (copper) Ethernet operation on the RJ-45
34 The \fBbge\fR driver and hardware support auto-negotiation, a protocol
35 specified by the 1000 Base-T standard. Auto-negotiation allows each device to
46 The cloning character-special device, \fB/dev/bge\fR, is used to access all
61 initialized on first attach and de-initialized (stopped) at last detach.
94 \fBSAP\fR length value is \fI-2\fR, meaning the physical address component is
95 followed immediately by a 2-byte \fBSAP\fR component within the \fBDLSAP\fR
[all …]
H A Dyge.4d8 yge \- Marvell Yukon 2 Ethernet device driver
32 Enables (default) or disables IEEE 802.3 auto-negotiation of link speed and
45 Enables the 1000 Mbps full-duplex link option.
54 Enables the 1000 Mbps half-duplex link option.
74 Enables the 1000 Mbps full-duplex link option.
83 Enables the 1000 Mbps half-duplex link option.
92 Enables the 10 Base-T full-duplex link option.
101 Enables the 10 Base-T half-duplex link option.
130 32-bit driver binary (x86)
139 64-bit driver binary (x86)
[all …]
/illumos-gate/usr/src/lib/libproc/common/
H A Dpr_lseek.c23 * Copyright (c) 1998-2000 by Sun Microsystems, Inc.
33 offset_t full; /* full 64 bit offset value */
34 uint32_t half[2]; /* two 32-bit halves */ member
38 * lseek() system call -- executed by subject process.
55 adp->arg_value = filedes; in pr_lseek()
56 adp->arg_object = NULL; in pr_lseek()
57 adp->arg_type = AT_BYVAL; in pr_lseek()
58 adp->arg_inout = AI_INPUT; in pr_lseek()
59 adp->arg_size = 0; in pr_lseek()
62 if (Pstatus(Pr)->pr_dmodel == PR_MODEL_NATIVE) { in pr_lseek()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFeatures.td1 //===-- RISCVFeatures.td - RISC-V Features and Extensions --*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
10 // RISC-V subtarget features and instruction predicates.
11 //===----------------------------------------------------------------------===//
13 // Subclass of SubtargetFeature to be used when the feature is also a RISC-V
16 // name - Name of the extension in lower case.
17 // major - Major version of extension.
18 // minor - Minor version of extension.
[all …]
/freebsd/contrib/llvm-project/clang/lib/Headers/hlsl/
H A Dhlsl_basic_types.h1 //===----- hlsl_basic_types.h - HLSL definitions for basic types ----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 // built-in scalar data types:
23 // 16-bit integer.
28 // unsigned 32-bit integer.
31 // 64-bit integer.
35 // built-in vector data types:
61 typedef vector<half, 2> half2;
62 typedef vector<half, 3> half3;
[all …]
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dmii.h2 * linux/mii.h: definitions for MII-compatible transceivers
24 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
47 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
50 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
52 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
54 #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
55 #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
56 #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
57 #define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
63 #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
[all …]
/illumos-gate/usr/src/uts/common/gssapi/mechs/krb5/mech/
H A Dutil_ordering.c30 * $Id: util_ordering.c 19310 2007-03-29 21:36:38Z tlyu $
59 * - the queue is a circular queue. The first element (q->elem[q->start])
63 #define QSIZE(q) (sizeof((q)->elem)/sizeof((q)->elem[0]))
64 #define QELEM(q,i) ((q)->elem[(i)%QSIZE(q)])
67 * mask(max) is 2 ** 64 - 1, and half is 2 ** 63.
68 * |-------------------------------|-----------------------------|
69 * 0 half mask
70 * |-------------------------------|
71 * half range ( 2 ** 63 )
74 * in the "half range", normal integer comparison is enough.
[all …]
/illumos-gate/usr/src/cmd/sgs/ld/common/
H A Dld.c47 typedef int (*ld_main_f)(int, char *[], Half);
134 * not a full ELF header, but only the class-independent prefix that we need.
136 * As this is a raw (non-libelf) read, we are responsible for handling any
144 Half e_type; /* file type */
145 Half e_machine; /* target machine */
160 /* If strings[] element for our error type is non-NULL, issue prefix */ in veprintf()
199 * fd - Open file descriptor for file
200 * elf - libelf ELF descriptor
201 * class_ret, mach_ret - Address of variables to receive ELFCLASS
209 archive(int fd, Elf *elf, uchar_t *class_ret, Half *mach_ret) in archive()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
21 3. A 32bit mask specifying the DMA channel configuration
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
[all …]
/freebsd/sys/contrib/device-tree/Bindings/dma/stm32/
H A Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
21 3. A 32bit mask specifying the DMA channel configuration
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
[all …]

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