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Searched +full:grp0 +full:- +full:pinmux (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Ds32gxxxa-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
11 can0_pins: can0-pins {
12 can0-grp0 {
13 pinmux = <0x2c1>;
14 output-enable;
15 slew-rate = <133>;
18 can0-grp1 {
19 pinmux = <0x2b0>;
20 input-enable;
21 slew-rate = <133>;
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H A Ds32gxxxa-rdb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
11 can0_pins: can0-pins {
12 can0-grp0 {
13 pinmux = <0x112>;
14 output-enable;
15 slew-rate = <133>;
18 can0-grp1 {
19 pinmux = <0x120>;
20 input-enable;
21 slew-rate = <133>;
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H A Ds32g2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 * Copyright 2017-2021, 2024 NXP
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "arm,scmi-shmem";
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H A Ds32g3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright 2021-2024 NXP
7 * Andra-Teodora Ilie <andra.ilie@nxp.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <0x02>;
16 #size-cells = <0x02>;
19 #address-cells = <1>;
20 #size-cells = <0>;
22 cpu-map {
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2166x-pinctrl.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Common pinmux configrations for BCM2166x (BCM21664/BCM23550).
10 bsc1_pins: bsc1-pins {
11 bsc1clk-grp0 {
16 bsc1dat-grp0 {
23 bsc2_pins: bsc2-pins {
24 bsc2clk-grp0 {
29 bsc2dat-grp0 {
36 bsc3_pins: bsc3-pins {
37 bsc3clk-grp0 {
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dloongson,ls2k-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/loongson,ls2k-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 SoC Pinctrl Controller
10 - zhanghongchen <zhanghongchen@loongson.cn>
11 - Yinbo Zhu <zhuyinbo@loongson.cn>
14 - $ref: pinctrl.yaml#
18 const: loongson,ls2k-pinctrl
24 '-pins$':
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H A Dnxp,s32g2-siul2-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/nxp,s32g2-siul
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/freebsd/sys/contrib/device-tree/src/loongarch/
H A Dloongson-2k1000-ref.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "dt-bindings/thermal/thermal.h"
9 #include "loongson-2k1000.dtsi"
12 compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000";
13 model = "Loongson-2K1000 Reference Board";
20 stdout-path = "serial0:115200n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
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/freebsd/sys/contrib/dev/rtw89/
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
54 #define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI)
111 RTW89_CH_6G_BAND_IDX6, /* Ultra-high */
112 RTW89_CH_6G_BAND_IDX7, /* Ultra-high */
271 * RTW89_ADDR_CAM_SEC_ALL_UNI : 0 - 6 unicast
272 * RTW89_ADDR_CAM_SEC_NORMAL : 0 - 1 unicast, 2 - 4 group, 5 - 6 BIP
273 * RTW89_ADDR_CAM_SEC_4GROUP : 0 - 1 unicast, 2 - 5 group, 6 BIP
771 #define RTW89_MIN_VALID_POWER_CONSTRAINT (-10) /* unit: dBm */
977 /* The follow-up are derived from the above. We must ensure that it
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