xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/s32gxxxa-rdb.dtsi (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa) 
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright 2024 NXP
4 *
5 * Authors: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
6 *          Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
7 *          Larisa Grigore <larisa.grigore@nxp.com>
8 */
9
10&pinctrl {
11	can0_pins: can0-pins {
12		can0-grp0 {
13			pinmux = <0x112>;
14			output-enable;
15			slew-rate = <133>;
16		};
17
18		can0-grp1 {
19			pinmux = <0x120>;
20			input-enable;
21			slew-rate = <133>;
22		};
23
24		can0-grp2 {
25			pinmux = <0x2013>;
26		};
27	};
28
29	can1_pins: can1-pins {
30		can1-grp0 {
31			pinmux = <0x132>;
32			output-enable;
33			slew-rate = <133>;
34		};
35
36		can1-grp1 {
37			pinmux = <0x140>;
38			input-enable;
39			slew-rate = <133>;
40		};
41
42		can1-grp2 {
43			pinmux = <0x2772>;
44		};
45	};
46
47	i2c0_pins: i2c0-pins {
48		i2c0-grp0 {
49			pinmux = <0x1f2>, <0x201>;
50			drive-open-drain;
51			output-enable;
52			input-enable;
53			slew-rate = <133>;
54		};
55
56		i2c0-grp1 {
57			pinmux = <0x2353>, <0x2363>;
58		};
59	};
60
61	i2c0_gpio_pins: i2c0-gpio-pins {
62		i2c0-gpio-grp0 {
63			pinmux = <0x1f0>, <0x200>;
64			drive-open-drain;
65			output-enable;
66			input-enable;
67			slew-rate = <133>;
68		};
69
70		i2c0-gpio-grp1 {
71			pinmux = <0x2350>, <0x2360>;
72		};
73	};
74
75	i2c2_pins: i2c2-pins {
76		i2c2-grp0 {
77			pinmux = <0x151>, <0x161>;
78			drive-open-drain;
79			output-enable;
80			input-enable;
81			slew-rate = <133>;
82		};
83
84		i2c2-grp1 {
85			pinmux = <0x2cf2>, <0x2d02>;
86		};
87	};
88
89	i2c2_gpio_pins: i2c2-gpio-pins {
90		i2c2-gpio-grp0 {
91			pinmux = <0x2cf0>, <0x2d00>;
92		};
93
94		i2c2-gpio-grp1 {
95			pinmux = <0x150>, <0x160>;
96			drive-open-drain;
97			output-enable;
98			input-enable;
99			slew-rate = <133>;
100		};
101	};
102
103	i2c4_pins: i2c4-pins {
104		i2c4-grp0 {
105			pinmux = <0x211>, <0x222>;
106			drive-open-drain;
107			output-enable;
108			input-enable;
109			slew-rate = <133>;
110		};
111
112		i2c4-grp1 {
113			pinmux = <0x2d43>, <0x2d33>;
114		};
115	};
116
117	i2c4_gpio_pins: i2c4-gpio-pins {
118		i2c4-gpio-grp0 {
119			pinmux = <0x210>, <0x220>;
120			drive-open-drain;
121			output-enable;
122			input-enable;
123			slew-rate = <133>;
124		};
125
126		i2c4-gpio-grp1 {
127			pinmux = <0x2d40>, <0x2d30>;
128		};
129	};
130
131	dspi1_pins: dspi1-pins {
132		dspi1-grp0 {
133			pinmux = <0x72>;
134			output-enable;
135			input-enable;
136			slew-rate = <150>;
137			bias-pull-up;
138		};
139
140		dspi1-grp1 {
141			pinmux = <0x62>;
142			output-enable;
143			slew-rate = <150>;
144		};
145
146		dspi1-grp2 {
147			pinmux = <0x83>;
148			output-enable;
149			input-enable;
150			slew-rate = <150>;
151		};
152
153		dspi1-grp3 {
154			pinmux = <0x5F0>;
155			input-enable;
156			slew-rate = <150>;
157			bias-pull-up;
158		};
159
160		dspi1-grp4 {
161			pinmux = <0x3D92>,
162				 <0x3DA2>,
163				 <0x3DB2>;
164		};
165	};
166
167	dspi5_pins: dspi5-pins {
168		dspi5-grp0 {
169			pinmux = <0x93>;
170			output-enable;
171			input-enable;
172			slew-rate = <150>;
173		};
174
175		dspi5-grp1 {
176			pinmux = <0xA0>;
177			input-enable;
178			slew-rate = <150>;
179			bias-pull-up;
180		};
181
182		dspi5-grp2 {
183			pinmux = <0x3ED2>,
184				 <0x3EE2>,
185				 <0x3EF2>;
186		};
187
188		dspi5-grp3 {
189			pinmux = <0xB3>;
190			output-enable;
191			slew-rate = <150>;
192		};
193
194		dspi5-grp4 {
195			pinmux = <0xC3>;
196			output-enable;
197			input-enable;
198			slew-rate = <150>;
199			bias-pull-up;
200		};
201	};
202};
203
204&can0 {
205	pinctrl-names = "default";
206	pinctrl-0 = <&can0_pins>;
207	status = "okay";
208};
209
210&can1 {
211	pinctrl-names = "default";
212	pinctrl-0 = <&can1_pins>;
213	status = "okay";
214};
215
216&i2c0 {
217	pinctrl-names = "default", "gpio";
218	pinctrl-0 = <&i2c0_pins>;
219	pinctrl-1 = <&i2c0_gpio_pins>;
220	status = "okay";
221
222	pcal6524: gpio-expander@22 {
223		compatible = "nxp,pcal6524";
224		reg = <0x22>;
225		gpio-controller;
226		#gpio-cells = <2>;
227	};
228
229	pca85073a: rtc@51 {
230		compatible = "nxp,pca85073a";
231		reg = <0x51>;
232	};
233};
234
235&spi1 {
236	pinctrl-0 = <&dspi1_pins>;
237	pinctrl-names = "default";
238	status = "okay";
239};
240
241&spi5 {
242	pinctrl-0 = <&dspi5_pins>;
243	pinctrl-names = "default";
244	status = "okay";
245};
246
247&i2c2 {
248	pinctrl-names = "default", "gpio";
249	pinctrl-0 = <&i2c2_pins>;
250	pinctrl-1 = <&i2c2_gpio_pins>;
251	status = "okay";
252};
253
254&i2c4 {
255	pinctrl-names = "default", "gpio";
256	pinctrl-0 = <&i2c4_pins>;
257	pinctrl-1 = <&i2c4_gpio_pins>;
258	status = "okay";
259};
260