/linux/Documentation/devicetree/bindings/soc/rockchip/ |
H A D | grf.yaml | 4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml# 7 title: Rockchip General Register Files (GRF) 18 - rockchip,rk3528-ioc-grf 19 - rockchip,rk3528-vo-grf 20 - rockchip,rk3528-vpu-grf 21 - rockchip,rk3562-ioc-grf 22 - rockchip,rk3562-peri-grf 23 - rockchip,rk3562-pipephy-grf 24 - rockchip,rk3562-pmu-grf 25 - rockchip,rk3562-sys-grf [all …]
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/linux/drivers/net/ethernet/stmicro/stmmac/ |
H A D | dwmac-rk.c | 82 struct regmap *grf; member 110 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M); in rk_gmac_integrated_ephy_powerup() 111 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE); in rk_gmac_integrated_ephy_powerup() 113 regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID); in rk_gmac_integrated_ephy_powerup() 114 regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID); in rk_gmac_integrated_ephy_powerup() 118 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); in rk_gmac_integrated_ephy_powerup() 125 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE); in rk_gmac_integrated_ephy_powerup() 132 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); in rk_gmac_integrated_ephy_powerdown() 149 regmap_write(priv->grf, reg, in rk_gmac_integrated_fephy_powerup() 163 regmap_write(priv->grf, reg, RK_FEPHY_SHUTDOWN); in rk_gmac_integrated_fephy_powerdown() [all …]
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/linux/drivers/soc/rockchip/ |
H A D | grf.c | 162 .compatible = "rockchip,rk3036-grf", 165 .compatible = "rockchip,rk3128-grf", 168 .compatible = "rockchip,rk3228-grf", 171 .compatible = "rockchip,rk3288-grf", 174 .compatible = "rockchip,rk3328-grf", 177 .compatible = "rockchip,rk3368-grf", 180 .compatible = "rockchip,rk3399-grf", 183 .compatible = "rockchip,rk3566-pipe-grf", 186 .compatible = "rockchip,rk3576-sys-grf", 189 .compatible = "rockchip,rk3576-ioc-grf", [all …]
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H A D | io-domain.c | 80 struct regmap *grf; member 102 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val0); in rk3568_iodomain_write() 103 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val1); in rk3568_iodomain_write() 117 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL0, val0); in rk3568_iodomain_write() 118 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL1, val1); in rk3568_iodomain_write() 141 ret = regmap_write(iod->grf, iod->soc_data->grf_offset, val); in rockchip_iodomain_write() 143 dev_err(iod->dev, "Couldn't write to GRF\n"); in rockchip_iodomain_write() 212 ret = regmap_write(iod->grf, PX30_IO_VSEL, val); in px30_iodomain_init() 231 ret = regmap_write(iod->grf, RK3288_SOC_CON2, val); in rk3288_iodomain_init() 250 ret = regmap_write(iod->grf, RK3308_SOC_CON0, val); in rk3308_iodomain_init() [all …]
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/linux/drivers/phy/rockchip/ |
H A D | phy-rockchip-usb.c | 55 int (*init_usb_uart)(struct regmap *grf, 323 static int __init rockchip_init_usb_uart_common(struct regmap *grf, in rockchip_init_usb_uart_common() argument 341 ret = regmap_write(grf, regoffs + UOC_CON0, val); in rockchip_init_usb_uart_common() 347 ret = regmap_write(grf, regoffs + UOC_CON2, val); in rockchip_init_usb_uart_common() 358 ret = regmap_write(grf, UOC_CON3, val); in rockchip_init_usb_uart_common() 373 static int __init rk3188_init_usb_uart(struct regmap *grf, in rk3188_init_usb_uart() argument 379 ret = rockchip_init_usb_uart_common(grf, pdata); in rk3188_init_usb_uart() 387 ret = regmap_write(grf, RK3188_UOC0_CON0, val); in rk3188_init_usb_uart() 423 static int __init rk3288_init_usb_uart(struct regmap *grf, in rk3288_init_usb_uart() argument 429 ret = rockchip_init_usb_uart_common(grf, pdata); in rk3288_init_usb_uart() [all …]
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H A D | phy-rockchip-dp.c | 28 struct regmap *grf; member 38 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state() 50 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state() 107 dp->grf = syscon_node_to_regmap(dev->parent->of_node); in rockchip_dp_phy_probe() 108 if (IS_ERR(dp->grf)) { in rockchip_dp_phy_probe() 110 return PTR_ERR(dp->grf); in rockchip_dp_phy_probe() 113 ret = regmap_write(dp->grf, GRF_SOC_CON12, GRF_EDP_REF_CLK_SEL_INTER | in rockchip_dp_phy_probe() 116 dev_err(dp->dev, "Could not config GRF edp ref clk: %d\n", ret); in rockchip_dp_phy_probe()
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H A D | phy-rockchip-inno-usb2.c | 170 * @reg: the address offset of grf for usb-phy config. 230 * @grf: General Register Files regmap. 248 struct regmap *grf; member 266 return rphy->usbgrf == NULL ? rphy->grf : rphy->usbgrf; in get_reg_base() 474 ret = property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true); in rockchip_usb2phy_enable_host_disc_irq() 478 ret = property_enable(rphy->grf, &rport->port_cfg->disfall_en, en); in rockchip_usb2phy_enable_host_disc_irq() 482 ret = property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true); in rockchip_usb2phy_enable_host_disc_irq() 486 return property_enable(rphy->grf, &rport->port_cfg->disrise_en, en); in rockchip_usb2phy_enable_host_disc_irq() 501 ret = property_enable(rphy->grf, in rockchip_usb2phy_init() 507 ret = property_enable(rphy->grf, in rockchip_usb2phy_init() [all …]
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | phy-rockchip-naneng-combphy.yaml | 69 rockchip,pipe-grf: 72 Some additional phy settings are accessed through GRF regs. 74 rockchip,pipe-phy-grf: 77 Some additional pipe settings are accessed through GRF regs. 88 - rockchip,pipe-grf 89 - rockchip,pipe-phy-grf 125 compatible = "rockchip,rk3568-pipe-grf", "syscon"; 130 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; 144 rockchip,pipe-grf = <&pipegrf>; 145 rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
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H A D | phy-rockchip-usbdp.yaml | 70 rockchip,u2phy-grf: 75 rockchip,usb-grf: 80 rockchip,usbdpphy-grf: 85 rockchip,vo-grf: 148 rockchip,u2phy-grf = <&usb2phy0_grf>; 149 rockchip,usb-grf = <&usb_grf>; 150 rockchip,usbdpphy-grf = <&usbdpphy0_grf>; 151 rockchip,vo-grf = <&vo0_grf>;
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H A D | rockchip-inno-csi-dphy.yaml | 49 rockchip,grf: 52 Some additional phy settings are access through GRF regs. 63 - rockchip,grf 79 rockchip,grf = <&grf>;
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H A D | rockchip-mipi-dphy-rx0.yaml | 31 - const: grf 54 * should be a child of the GRF. 56 * grf: syscon@ff770000 { 57 * compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; 70 clock-names = "dphy-ref", "dphy-cfg", "grf";
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/linux/Documentation/devicetree/bindings/display/rockchip/ |
H A D | rockchip,rk3399-cdn-dp.yaml | 30 - description: GRF clock 37 - const: grf 96 rockchip,grf: 99 Phandle to GRF register to control HPD. 114 - rockchip,grf 136 clock-names = "core-clk", "pclk", "spdif", "grf"; 142 rockchip,grf = <&grf>;
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H A D | rockchip,dw-hdmi.yaml | 51 - description: Power for GRF IO 62 - grf 66 - grf 115 rockchip,grf: 118 phandle to the GRF to mux vopl/vopb. 131 - rockchip,grf 151 rockchip,grf = <&grf>;
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H A D | rockchip,dw-mipi-dsi.yaml | 39 - const: grf 42 rockchip,grf: 45 This SoC uses GRF regs to switch between vopl/vopb. 71 - rockchip,grf 141 rockchip,grf = <&grf>;
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | rockchip,rk3328-grf-gpio.yaml | 4 $id: http://devicetree.org/schemas/gpio/rockchip,rk3328-grf-gpio.yaml# 10 The Rockchip RK3328 General Register File (GRF) outputs only the 14 The GPIO node should be declared as the child of the GRF node. 30 const: rockchip,rk3328-grf-gpio 47 compatible = "rockchip,rk3328-grf-gpio";
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/linux/Documentation/devicetree/bindings/net/ |
H A D | rockchip-dwmac.yaml | 96 rockchip,grf: 100 rockchip,php-grf: 126 - rockchip,grf 140 - rockchip,php-grf 143 rockchip,php-grf: false 180 rockchip,grf = <&grf>;
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H A D | rockchip,emac.yaml | 39 rockchip,grf: 42 Phandle to the syscon GRF used to control speed and mode for the EMAC. 58 - rockchip,grf 100 rockchip,grf = <&grf>;
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | rockchip,px30-cru.yaml | 57 rockchip,grf: 60 Phandle to the syscon managing the "general register files" (GRF), 106 rockchip,grf = <&grf>; 116 rockchip,grf = <&grf>;
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H A D | rockchip,rv1126-cru.yaml | 39 rockchip,grf: 42 Phandle to the syscon managing the "general register files" (GRF), 59 rockchip,grf = <&grf>;
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/linux/Documentation/devicetree/bindings/sound/ |
H A D | rockchip,rk3328-codec.yaml | 32 rockchip,grf: 35 The phandle of the syscon node for the GRF register. 56 - rockchip,grf 70 rockchip,grf = <&grf>;
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H A D | rockchip,rk3308-codec.yaml | 34 rockchip,grf: 37 Phandle to the General Register Files (GRF) 78 - rockchip,grf 92 rockchip,grf = <&grf>;
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3588-extra.dtsi | 71 compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon"; 76 compatible = "rockchip,rk3588-pipe-phy-grf", "syscon"; 81 compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; 86 compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; 111 compatible = "rockchip,rk3588-hdptxphy-grf", "syscon"; 236 rockchip,grf = <&sys_grf>; 237 rockchip,vo-grf = <&vo1_grf>; 266 rockchip,grf = <&vo1_grf>; 309 rockchip,grf = <&sys_grf>; 310 rockchip,vo1-grf = <&vo1_grf>; [all …]
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3xxx.dtsi | 204 rockchip,grf = <&grf>; 273 grf: grf@20008000 { label 310 rockchip,grf = <&grf>; 325 rockchip,grf = <&grf>; 380 rockchip,grf = <&grf>; 395 rockchip,grf = <&grf>; 410 rockchip,grf = <&grf>;
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | i2c-rk3x.yaml | 72 rockchip,grf: 76 the general register file (GRF) 78 (bit offset in the GRF) is also required. 125 - rockchip,grf 140 rockchip,grf = <&grf>;
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/linux/drivers/clk/rockchip/ |
H A D | clk-mmc-phase.c | 18 struct regmap *grf; member 60 if (mmc_clock->grf) in rockchip_mmc_get_phase() 61 regmap_read(mmc_clock->grf, mmc_clock->grf_reg, &raw_value); in rockchip_mmc_get_phase() 147 if (mmc_clock->grf) in rockchip_mmc_set_phase() 148 regmap_write(mmc_clock->grf, mmc_clock->grf_reg, raw_value); in rockchip_mmc_set_phase() 205 struct regmap *grf, int grf_reg, in rockchip_clk_register_mmc() argument 225 mmc_clock->grf = grf; in rockchip_clk_register_mmc()
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