xref: /linux/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml (revision 9f3a2ba62c7226a6604b8aaeb92b5ff906fa4e6b)
1*5011cc7aSJohan Jonker# SPDX-License-Identifier: GPL-2.0
2*5011cc7aSJohan Jonker%YAML 1.2
3*5011cc7aSJohan Jonker---
4*5011cc7aSJohan Jonker$id: http://devicetree.org/schemas/clock/rockchip,rk3328-cru.yaml#
5*5011cc7aSJohan Jonker$schema: http://devicetree.org/meta-schemas/core.yaml#
6*5011cc7aSJohan Jonker
7*5011cc7aSJohan Jonkertitle: Rockchip RK3328 Clock and Reset Unit (CRU)
8*5011cc7aSJohan Jonker
9*5011cc7aSJohan Jonkermaintainers:
10*5011cc7aSJohan Jonker  - Elaine Zhang <zhangqing@rock-chips.com>
11*5011cc7aSJohan Jonker  - Heiko Stuebner <heiko@sntech.de>
12*5011cc7aSJohan Jonker
13*5011cc7aSJohan Jonkerdescription: |
14*5011cc7aSJohan Jonker  The RK3328 clock controller generates and supplies clocks to various
15*5011cc7aSJohan Jonker  controllers within the SoC and also implements a reset controller for SoC
16*5011cc7aSJohan Jonker  peripherals.
17*5011cc7aSJohan Jonker  Each clock is assigned an identifier and client nodes can use this identifier
18*5011cc7aSJohan Jonker  to specify the clock which they consume. All available clocks are defined as
19*5011cc7aSJohan Jonker  preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be
20*5011cc7aSJohan Jonker  used in device tree sources. Similar macros exist for the reset sources in
21*5011cc7aSJohan Jonker  these files.
22*5011cc7aSJohan Jonker  There are several clocks that are generated outside the SoC. It is expected
23*5011cc7aSJohan Jonker  that they are defined using standard clock bindings with following
24*5011cc7aSJohan Jonker  clock-output-names:
25*5011cc7aSJohan Jonker    - "xin24m"      - crystal input                          - required,
26*5011cc7aSJohan Jonker    - "clkin_i2s"   - external I2S clock                     - optional,
27*5011cc7aSJohan Jonker    - "gmac_clkin"  - external GMAC clock                    - optional
28*5011cc7aSJohan Jonker    - "phy_50m_out" - output clock of the pll in the mac phy
29*5011cc7aSJohan Jonker    - "hdmi_phy"    - output clock of the hdmi phy pll       - optional
30*5011cc7aSJohan Jonker
31*5011cc7aSJohan Jonkerproperties:
32*5011cc7aSJohan Jonker  compatible:
33*5011cc7aSJohan Jonker    enum:
34*5011cc7aSJohan Jonker      - rockchip,rk3328-cru
35*5011cc7aSJohan Jonker
36*5011cc7aSJohan Jonker  reg:
37*5011cc7aSJohan Jonker    maxItems: 1
38*5011cc7aSJohan Jonker
39*5011cc7aSJohan Jonker  "#clock-cells":
40*5011cc7aSJohan Jonker    const: 1
41*5011cc7aSJohan Jonker
42*5011cc7aSJohan Jonker  "#reset-cells":
43*5011cc7aSJohan Jonker    const: 1
44*5011cc7aSJohan Jonker
45*5011cc7aSJohan Jonker  clocks:
46*5011cc7aSJohan Jonker    maxItems: 1
47*5011cc7aSJohan Jonker
48*5011cc7aSJohan Jonker  clock-names:
49*5011cc7aSJohan Jonker    const: xin24m
50*5011cc7aSJohan Jonker
51*5011cc7aSJohan Jonker  rockchip,grf:
52*5011cc7aSJohan Jonker    $ref: /schemas/types.yaml#/definitions/phandle
53*5011cc7aSJohan Jonker    description:
54*5011cc7aSJohan Jonker      Phandle to the syscon managing the "general register files" (GRF),
55*5011cc7aSJohan Jonker      if missing pll rates are not changeable, due to the missing pll
56*5011cc7aSJohan Jonker      lock status.
57*5011cc7aSJohan Jonker
58*5011cc7aSJohan Jonkerrequired:
59*5011cc7aSJohan Jonker  - compatible
60*5011cc7aSJohan Jonker  - reg
61*5011cc7aSJohan Jonker  - "#clock-cells"
62*5011cc7aSJohan Jonker  - "#reset-cells"
63*5011cc7aSJohan Jonker
64*5011cc7aSJohan JonkeradditionalProperties: false
65*5011cc7aSJohan Jonker
66*5011cc7aSJohan Jonkerexamples:
67*5011cc7aSJohan Jonker  - |
68*5011cc7aSJohan Jonker    cru: clock-controller@ff440000 {
69*5011cc7aSJohan Jonker      compatible = "rockchip,rk3328-cru";
70*5011cc7aSJohan Jonker      reg = <0xff440000 0x1000>;
71*5011cc7aSJohan Jonker      rockchip,grf = <&grf>;
72*5011cc7aSJohan Jonker      #clock-cells = <1>;
73*5011cc7aSJohan Jonker      #reset-cells = <1>;
74*5011cc7aSJohan Jonker    };
75