xref: /linux/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1*fffa0fa4SJohan Jonker# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
25b0c9b98SJohan Jonker%YAML 1.2
35b0c9b98SJohan Jonker---
45b0c9b98SJohan Jonker$id: http://devicetree.org/schemas/clock/rockchip,rk3228-cru.yaml#
55b0c9b98SJohan Jonker$schema: http://devicetree.org/meta-schemas/core.yaml#
65b0c9b98SJohan Jonker
75b0c9b98SJohan Jonkertitle: Rockchip RK3228 Clock and Reset Unit (CRU)
85b0c9b98SJohan Jonker
95b0c9b98SJohan Jonkermaintainers:
105b0c9b98SJohan Jonker  - Elaine Zhang <zhangqing@rock-chips.com>
115b0c9b98SJohan Jonker  - Heiko Stuebner <heiko@sntech.de>
125b0c9b98SJohan Jonker
135b0c9b98SJohan Jonkerdescription: |
145b0c9b98SJohan Jonker  The RK3228 clock controller generates and supplies clocks to various
155b0c9b98SJohan Jonker  controllers within the SoC and also implements a reset controller for SoC
165b0c9b98SJohan Jonker  peripherals.
175b0c9b98SJohan Jonker  Each clock is assigned an identifier and client nodes can use this identifier
185b0c9b98SJohan Jonker  to specify the clock which they consume. All available clocks are defined as
195b0c9b98SJohan Jonker  preprocessor macros in the dt-bindings/clock/rk3228-cru.h headers and can be
205b0c9b98SJohan Jonker  used in device tree sources. Similar macros exist for the reset sources in
215b0c9b98SJohan Jonker  these files.
225b0c9b98SJohan Jonker  There are several clocks that are generated outside the SoC. It is expected
235b0c9b98SJohan Jonker  that they are defined using standard clock bindings with following
245b0c9b98SJohan Jonker  clock-output-names:
255b0c9b98SJohan Jonker    - "xin24m"      - crystal input                          - required
265b0c9b98SJohan Jonker    - "ext_i2s"     - external I2S clock                     - optional
275b0c9b98SJohan Jonker    - "ext_gmac"    - external GMAC clock                    - optional
285b0c9b98SJohan Jonker    - "ext_hsadc"   - external HSADC clock                   - optional
295b0c9b98SJohan Jonker    - "phy_50m_out" - output clock of the pll in the mac phy
305b0c9b98SJohan Jonker
315b0c9b98SJohan Jonkerproperties:
325b0c9b98SJohan Jonker  compatible:
335b0c9b98SJohan Jonker    enum:
345b0c9b98SJohan Jonker      - rockchip,rk3228-cru
355b0c9b98SJohan Jonker
365b0c9b98SJohan Jonker  reg:
375b0c9b98SJohan Jonker    maxItems: 1
385b0c9b98SJohan Jonker
395b0c9b98SJohan Jonker  "#clock-cells":
405b0c9b98SJohan Jonker    const: 1
415b0c9b98SJohan Jonker
425b0c9b98SJohan Jonker  "#reset-cells":
435b0c9b98SJohan Jonker    const: 1
445b0c9b98SJohan Jonker
455b0c9b98SJohan Jonker  clocks:
465b0c9b98SJohan Jonker    maxItems: 1
475b0c9b98SJohan Jonker
485b0c9b98SJohan Jonker  clock-names:
495b0c9b98SJohan Jonker    const: xin24m
505b0c9b98SJohan Jonker
515b0c9b98SJohan Jonker  rockchip,grf:
525b0c9b98SJohan Jonker    $ref: /schemas/types.yaml#/definitions/phandle
535b0c9b98SJohan Jonker    description:
545b0c9b98SJohan Jonker      Phandle to the syscon managing the "general register files" (GRF),
555b0c9b98SJohan Jonker      if missing pll rates are not changeable, due to the missing pll
565b0c9b98SJohan Jonker      lock status.
575b0c9b98SJohan Jonker
585b0c9b98SJohan Jonkerrequired:
595b0c9b98SJohan Jonker  - compatible
605b0c9b98SJohan Jonker  - reg
615b0c9b98SJohan Jonker  - "#clock-cells"
625b0c9b98SJohan Jonker  - "#reset-cells"
635b0c9b98SJohan Jonker
645b0c9b98SJohan JonkeradditionalProperties: false
655b0c9b98SJohan Jonker
665b0c9b98SJohan Jonkerexamples:
675b0c9b98SJohan Jonker  - |
685b0c9b98SJohan Jonker    cru: clock-controller@20000000 {
695b0c9b98SJohan Jonker      compatible = "rockchip,rk3228-cru";
705b0c9b98SJohan Jonker      reg = <0x20000000 0x1000>;
715b0c9b98SJohan Jonker      rockchip,grf = <&grf>;
725b0c9b98SJohan Jonker      #clock-cells = <1>;
735b0c9b98SJohan Jonker      #reset-cells = <1>;
745b0c9b98SJohan Jonker    };
75