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/linux/drivers/pinctrl/
H A Dpinctrl-tps6594.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
36 /* Special muxval for recalcitrant pins */
56 /* TPS65224 Special muxval for recalcitrant pins */
80 PINCTRL_PIN(10, "GPIO10"),
85 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
90 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
95 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
100 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
105 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
[all …]
H A Dpinctrl-palmas.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pinctrl-palmas.c -- TI PALMAS series pin control driver.
17 #include <linux/pinctrl/pinconf-generic.h>
25 #include "pinctrl-utils.h"
70 const struct pinctrl_pin_desc *pins; member
85 PINCTRL_PIN(PALMAS_PIN_GPIO10_WIRELESS_CHRG1, "gpio10"),
114 "gpio10",
143 "gpio10",
174 "gpio10",
264 "gpio10",
[all …]
H A Dpinctrl-xway.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-xway.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
21 #include "pinctrl-lantiq.h"
26 #define PINS 16 macro
28 #define PORT(x) (x / PINS)
29 #define PORT_PIN(x) (x % PINS)
56 #define GPIO3_ALT1 (GPIO_BASE(PINS) + 0x24)
76 { .name = a, .mux = XWAY_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), }
110 /* --------- ase related code --------- */
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
22 - qcom,pm660l-gpio
23 - qcom,pm6125-gpio
[all …]
H A Dbrcm,bcm6318-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/brcm,bcm6318-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Bindings for Broadcom's BCM6318 memory-mapped pin controller.
18 const: brcm,bcm6318-pinctrl
24 '-pins$':
26 $ref: pinmux-node.yaml#
[all …]
H A Dbrcm,bcm6362-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/brcm,bcm6362-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Bindings for Broadcom's BCM6362 memory-mapped pin controller.
18 const: brcm,bcm6362-pinctrl
24 '-pins$':
26 $ref: pinmux-node.yaml#
[all …]
H A Dqcom,sm4250-lpass-lpi-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18 const: qcom,sm4250-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
27 - description: LPASS Audio voting clock
29 clock-names:
[all …]
H A Dbrcm,bcm6368-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/brcm,bcm6368-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Bindings for Broadcom's BCM6368 memory-mapped pin controller.
18 const: brcm,bcm6368-pinctrl
24 '-pins$':
26 $ref: pinmux-node.yaml#
[all …]
H A Dbrcm,bcm11351-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/brcm,bcm11351-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <florian.fainelli@broadcom.com>
11 - Ray Jui <rjui@broadcom.com>
12 - Scott Branden <sbranden@broadcom.com>
15 - $ref: pinctrl.yaml#
19 const: brcm,bcm11351-pinctrl
25 '-pins$':
[all …]
H A Dqcom,mdm9615-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
14 $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
18 const: qcom,mdm9615-pinctrl
27 "-state$":
29 - $ref: "#/$defs/qcom-mdm9615-pinctrl-state"
30 - patternProperties:
[all …]
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm6362.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "../pinctrl-utils.h"
19 #include "pinctrl-bcm63xx.h"
65 PINCTRL_PIN(10, "gpio10"),
170 BCM_PIN_GROUP(gpio10),
222 "gpio10",
279 "gpio10",
452 unsigned group, const unsigned **pins, in bcm6362_pinctrl_get_group_pins() argument
455 *pins = bcm6362_groups[group].pins; in bcm6362_pinctrl_get_group_pins()
486 unsigned int basemode = (uintptr_t)desc->drv_data; in bcm6362_set_gpio()
[all …]
H A Dpinctrl-bcm63268.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "../pinctrl-utils.h"
19 #include "pinctrl-bcm63xx.h"
28 #define BCM63268_BASEMODE_NAND BIT(2) /* GPIOs 2-7, 24-31 */
70 BCM63268_PIN(10, "gpio10", BCM63268_BASEMODE_VDSL_PHY_0),
193 BCM_PIN_GROUP(gpio10),
256 "gpio10",
297 "gpio10",
476 const unsigned **pins, in bcm63268_pinctrl_get_group_pins() argument
479 *pins = bcm63268_groups[group].pins; in bcm63268_pinctrl_get_group_pins()
[all …]
H A Dpinctrl-bcm6318.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "../pinctrl-utils.h"
19 #include "pinctrl-bcm63xx.h"
50 PINCTRL_PIN(10, "gpio10"),
154 BCM_PIN_GROUP(gpio10),
208 "gpio10",
274 "gpio10",
357 unsigned group, const unsigned **pins, in bcm6318_pinctrl_get_group_pins() argument
360 *pins = bcm6318_groups[group].pins; in bcm6318_pinctrl_get_group_pins()
392 regmap_update_bits(pc->regs, BCM6318_MODE_REG, BIT(pin), in bcm6318_rmw_mux()
[all …]
H A Dpinctrl-bcm6328.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "../pinctrl-utils.h"
19 #include "pinctrl-bcm63xx.h"
55 PINCTRL_PIN(10, "gpio10"),
133 BCM_PIN_GROUP(gpio10),
172 "gpio10",
281 unsigned group, const unsigned **pins, in bcm6328_pinctrl_get_group_pins() argument
284 *pins = bcm6328_groups[group].pins; in bcm6328_pinctrl_get_group_pins()
316 regmap_update_bits(pc->regs, BCM6328_MODE_REG, BIT(pin), in bcm6328_rmw_mux()
319 regmap_update_bits(pc->regs, bcm6328_mux_off(pin), in bcm6328_rmw_mux()
[all …]
H A Dpinctrl-bcm6368.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "../pinctrl-utils.h"
19 #include "pinctrl-bcm63xx.h"
60 PINCTRL_PIN(10, "gpio10"),
135 BCM_PIN_GROUP(gpio10),
201 "gpio10",
347 unsigned group, const unsigned **pins, in bcm6368_pinctrl_get_group_pins() argument
350 *pins = bcm6368_groups[group].pins; in bcm6368_pinctrl_get_group_pins()
382 struct bcm6368_priv *priv = pc->driver_data; in bcm6368_pinctrl_set_mux()
387 if (fun->basemode) { in bcm6368_pinctrl_set_mux()
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
18 /delete-node/ &adsp_mem;
19 /delete-node/ &slpi_mem;
20 /delete-node/ &venus_mem;
21 /delete-node/ &gpu_mem;
[all …]
H A Dipq9574-rdp418.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
9 /dts-v1/;
11 #include "ipq9574-rdp-common.dtsi"
14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2";
15 compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574";
20 pinctrl-0 = <&sdc_default_state>;
21 pinctrl-names = "default";
22 mmc-ddr-1_8v;
[all …]
H A Dipq5332-rdp474.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.9", "qcom,ipq5332";
18 clock-frequency = <400000>;
19 pinctrl-0 = <&i2c_1_pins>;
20 pinctrl-names = "default";
25 bus-width = <4>;
26 max-frequency = <192000000>;
[all …]
H A Dipq5332-rdp442.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332";
18 clock-frequency = <400000>;
19 pinctrl-0 = <&i2c_1_pins>;
20 pinctrl-names = "default";
25 pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
26 pinctrl-names = "default";
30 compatible = "micron,n25q128a11", "jedec,spi-nor";
[all …]
H A Dipq5332-rdp468.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
16 regulator_fixed_5p0: regulator-s0500 {
17 compatible = "regulator-fixed";
18 regulator-min-microvolt = <500000>;
19 regulator-max-microvolt = <500000>;
20 regulator-boot-on;
[all …]
H A Dipq5332-rdp441.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * IPQ5332 AP-MI01.2 board device tree source
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332";
18 clock-frequency = <400000>;
19 pinctrl-0 = <&i2c_1_pins>;
20 pinctrl-names = "default";
25 bus-width = <4>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019-ap.dk07.1-c1.dts1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include "qcom-ipq4019-ap.dk07.1.dtsi"
8 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
9 compatible = "qcom,ipq4019-ap-dk07.1-c1", "qcom,ipq4019";
14 perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
22 serial_1_pins: serial1-state {
23 pins = "gpio8", "gpio9",
24 "gpio10", "gpio11";
26 bias-disable;
[all …]
H A Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-state {
28 pins = "gpio16", "gpio17";
30 bias-disable;
33 serial_1_pins: serial1-state {
[all …]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm750-runbmc-olympus-pincfg.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 gpio0ol_pins: gpio0ol-pins {
7 pins = "GPIO0/IOX1DI";
8 bias-disable;
9 output-low;
11 gpio1ol_pins: gpio1ol-pins {
12 pins = "GPIO1/IOX1LD";
13 bias-disable;
14 output-low;
16 gpio2ol_pins: gpio2ol-pins {
[all …]

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