1 // SPDX-License-Identifier: GPL-2.0-only
3  * pinctrl-palmas.c -- TI PALMAS series pin control driver.
17 #include <linux/pinctrl/pinconf-generic.h>
25 #include "pinctrl-utils.h"
70 	const struct pinctrl_pin_desc *pins;  member
85 	PINCTRL_PIN(PALMAS_PIN_GPIO10_WIRELESS_CHRG1, "gpio10"),
114 	"gpio10",
143 	"gpio10",
174 	"gpio10",
264 	"gpio10",
369 	const unsigned pins[1];  member
388 PULL_UP_DN(nreswarm,	PU_PD_OD,	PALMAS_PU_PD_INPUT_CTRL1,	0x2,	0x0,	0x2,	-1);
389 PULL_UP_DN(pwrdown,	PU_PD_OD,	PALMAS_PU_PD_INPUT_CTRL1,	0x4,	0x0,	-1,	0x4);
391 PULL_UP_DN(reset_in,	PU_PD_OD,	PALMAS_PU_PD_INPUT_CTRL1,	0x40,	0x0,	-1,	0x40);
395 PULL_UP_DN(vacok,	PU_PD_OD,	PALMAS_PU_PD_INPUT_CTRL3,	0x40,	0x0,	-1,	0x40);
396 PULL_UP_DN(chrg_det,	PU_PD_OD,	PALMAS_PU_PD_INPUT_CTRL3,	0x10,	0x0,	-1,	0x10);
397 PULL_UP_DN(pwrhold,	PU_PD_OD,	PALMAS_PU_PD_INPUT_CTRL3,	0x4,	0x0,	-1,	0x4);
398 PULL_UP_DN(msecure,	PU_PD_OD,	PALMAS_PU_PD_INPUT_CTRL3,	0x1,	0x0,	-1,	0x1);
399 PULL_UP_DN(id,		USB_OTG,	PALMAS_USB_ID_CTRL_SET,		0x40,	0x0,	0x40,	-1);
400 PULL_UP_DN(gpio0,	GPIO,		PALMAS_PU_PD_GPIO_CTRL1,	0x04,	0,	-1,	1);
403 PULL_UP_DN(gpio3,	GPIO,		PALMAS_PU_PD_GPIO_CTRL1,	0x40,	0x0,	-1,	0x40);
407 PULL_UP_DN(gpio7,	GPIO,		PALMAS_PU_PD_GPIO_CTRL2,	0x40,	0x0,	-1,	0x40);
409 PULL_UP_DN(gpio10,	GPIO,		PALMAS_PU_PD_GPIO_CTRL3,	0x30,	0x0,	0x20,	0x10);
411 PULL_UP_DN(gpio13,	GPIO,		PALMAS_PU_PD_GPIO_CTRL4,	0x04,	0x0,	-1,	0x04);
426 OD_INFO(gpio10,	GPIO,	PALMAS_OD_OUTPUT_GPIO_CTRL2,	0x04,	0x04,	0x0);
450 PIN_INFO(gpio10,	GPIO,		&pud_gpio10_info,	&od_gpio10_info);
495 		.pins = {PALMAS_PIN_##pin_id},				\
541 …PALMAS_PINGROUP(gpio10,	GPIO10_WIRELESS_CHRG1,		PU_PD_OD,	PAD4,	0x04,	0x2,	&pin_gpio10_info,	&pin_…
566 	for (i = 0; i < pci->num_pin_groups; ++i) {  in palmas_pinctrl_get_pin_mux()
567 		g = &pci->pin_groups[i];  in palmas_pinctrl_get_pin_mux()
568 		if (g->mux_reg_base == PALMAS_NONE_BASE) {  in palmas_pinctrl_get_pin_mux()
569 			pci->pins_current_opt[i] = 0;  in palmas_pinctrl_get_pin_mux()
572 		ret = palmas_read(pci->palmas, g->mux_reg_base,  in palmas_pinctrl_get_pin_mux()
573 				g->mux_reg_add, &val);  in palmas_pinctrl_get_pin_mux()
575 			dev_err(pci->dev, "mux_reg 0x%02x read failed: %d\n",  in palmas_pinctrl_get_pin_mux()
576 					g->mux_reg_add, ret);  in palmas_pinctrl_get_pin_mux()
579 		val &= g->mux_reg_mask;  in palmas_pinctrl_get_pin_mux()
580 		pci->pins_current_opt[i] = val >> g->mux_bit_shift;  in palmas_pinctrl_get_pin_mux()
592 	ret = palmas_update_bits(pci->palmas, PALMAS_PU_PD_OD_BASE,  in palmas_pinctrl_set_dvfs1()
596 		dev_err(pci->dev, "SECONDARY_PAD3 update failed %d\n", ret);  in palmas_pinctrl_set_dvfs1()
607 	ret = palmas_update_bits(pci->palmas, PALMAS_PU_PD_OD_BASE,  in palmas_pinctrl_set_dvfs2()
611 		dev_err(pci->dev, "SECONDARY_PAD3 update failed %d\n", ret);  in palmas_pinctrl_set_dvfs2()
619 	return pci->num_pin_groups;  in palmas_pinctrl_get_groups_count()
627 	return pci->pin_groups[group].name;  in palmas_pinctrl_get_group_name()
631 		unsigned group, const unsigned **pins, unsigned *num_pins)  in palmas_pinctrl_get_group_pins()  argument
635 	*pins = pci->pin_groups[group].pins;  in palmas_pinctrl_get_group_pins()
636 	*num_pins = pci->pin_groups[group].npins;  in palmas_pinctrl_get_group_pins()
652 	return pci->num_functions;  in palmas_pinctrl_get_funcs_count()
660 	return pci->functions[function].name;  in palmas_pinctrl_get_func_name()
669 	*groups = pci->functions[function].groups;  in palmas_pinctrl_get_func_groups()
670 	*num_groups = pci->functions[function].ngroups;  in palmas_pinctrl_get_func_groups()
683 	g = &pci->pin_groups[group];  in palmas_pinctrl_set_mux()
687 		if (!g->opt[function]) {  in palmas_pinctrl_set_mux()
688 			dev_err(pci->dev, "Pin %s does not support option %d\n",  in palmas_pinctrl_set_mux()
689 				g->name, function);  in palmas_pinctrl_set_mux()
690 			return -EINVAL;  in palmas_pinctrl_set_mux()
694 		for (i = 0; i < ARRAY_SIZE(g->opt); i++) {  in palmas_pinctrl_set_mux()
695 			if (!g->opt[i])  in palmas_pinctrl_set_mux()
697 			if (g->opt[i]->mux_opt == function)  in palmas_pinctrl_set_mux()
700 		if (WARN_ON(i == ARRAY_SIZE(g->opt))) {  in palmas_pinctrl_set_mux()
701 			dev_err(pci->dev, "Pin %s does not support option %d\n",  in palmas_pinctrl_set_mux()
702 				g->name, function);  in palmas_pinctrl_set_mux()
703 			return -EINVAL;  in palmas_pinctrl_set_mux()
707 	if (g->mux_reg_base == PALMAS_NONE_BASE) {  in palmas_pinctrl_set_mux()
709 			return -EINVAL;  in palmas_pinctrl_set_mux()
713 	dev_dbg(pci->dev, "%s(): Base0x%02x:0x%02x:0x%02x:0x%02x\n",  in palmas_pinctrl_set_mux()
714 			__func__, g->mux_reg_base, g->mux_reg_add,  in palmas_pinctrl_set_mux()
715 			g->mux_reg_mask, i << g->mux_bit_shift);  in palmas_pinctrl_set_mux()
717 	ret = palmas_update_bits(pci->palmas, g->mux_reg_base, g->mux_reg_add,  in palmas_pinctrl_set_mux()
718 			g->mux_reg_mask, i << g->mux_bit_shift);  in palmas_pinctrl_set_mux()
720 		dev_err(pci->dev, "Reg 0x%02x update failed: %d\n",  in palmas_pinctrl_set_mux()
721 				g->mux_reg_add, ret);  in palmas_pinctrl_set_mux()
724 	pci->pins_current_opt[group] = i;  in palmas_pinctrl_set_mux()
749 	for (group_nr = 0; group_nr < pci->num_pin_groups; ++group_nr) {  in palmas_pinconf_get()
750 		if (pci->pin_groups[group_nr].pins[0] == pin)  in palmas_pinconf_get()
754 	if (group_nr == pci->num_pin_groups) {  in palmas_pinconf_get()
755 		dev_err(pci->dev,  in palmas_pinconf_get()
756 			"Pinconf is not supported for pin-id %d\n", pin);  in palmas_pinconf_get()
757 		return -ENOTSUPP;  in palmas_pinconf_get()
760 	g = &pci->pin_groups[group_nr];  in palmas_pinconf_get()
761 	opt = g->opt[pci->pins_current_opt[group_nr]];  in palmas_pinconf_get()
763 		dev_err(pci->dev,  in palmas_pinconf_get()
764 			"Pinconf is not supported for pin %s\n", g->name);  in palmas_pinconf_get()
765 		return -ENOTSUPP;  in palmas_pinconf_get()
772 		if (!opt->pud_info) {  in palmas_pinconf_get()
773 			dev_err(pci->dev,  in palmas_pinconf_get()
775 				g->name);  in palmas_pinconf_get()
776 			return -ENOTSUPP;  in palmas_pinconf_get()
778 		base = opt->pud_info->pullup_dn_reg_base;  in palmas_pinconf_get()
779 		add = opt->pud_info->pullup_dn_reg_add;  in palmas_pinconf_get()
780 		ret = palmas_read(pci->palmas, base, add, &val);  in palmas_pinconf_get()
782 			dev_err(pci->dev, "Reg 0x%02x read failed: %d\n",  in palmas_pinconf_get()
787 		rval = val & opt->pud_info->pullup_dn_mask;  in palmas_pinconf_get()
789 		if ((opt->pud_info->normal_val >= 0) &&  in palmas_pinconf_get()
790 				(opt->pud_info->normal_val == rval) &&  in palmas_pinconf_get()
793 		else if ((opt->pud_info->pull_up_val >= 0) &&  in palmas_pinconf_get()
794 				(opt->pud_info->pull_up_val == rval) &&  in palmas_pinconf_get()
797 		else if ((opt->pud_info->pull_dn_val >= 0) &&  in palmas_pinconf_get()
798 				(opt->pud_info->pull_dn_val == rval) &&  in palmas_pinconf_get()
804 		if (!opt->od_info) {  in palmas_pinconf_get()
805 			dev_err(pci->dev,  in palmas_pinconf_get()
807 				g->name);  in palmas_pinconf_get()
808 			return -ENOTSUPP;  in palmas_pinconf_get()
810 		base = opt->od_info->od_reg_base;  in palmas_pinconf_get()
811 		add = opt->od_info->od_reg_add;  in palmas_pinconf_get()
812 		ret = palmas_read(pci->palmas, base, add, &val);  in palmas_pinconf_get()
814 			dev_err(pci->dev, "Reg 0x%02x read failed: %d\n",  in palmas_pinconf_get()
818 		rval = val & opt->od_info->od_mask;  in palmas_pinconf_get()
819 		arg = -1;  in palmas_pinconf_get()
820 		if ((opt->od_info->od_disable >= 0) &&  in palmas_pinconf_get()
821 				(opt->od_info->od_disable == rval))  in palmas_pinconf_get()
823 		else if ((opt->od_info->od_enable >= 0) &&  in palmas_pinconf_get()
824 					(opt->od_info->od_enable == rval))  in palmas_pinconf_get()
827 			dev_err(pci->dev,  in palmas_pinconf_get()
829 				g->name);  in palmas_pinconf_get()
830 			return -ENOTSUPP;  in palmas_pinconf_get()
835 		dev_err(pci->dev, "Properties not supported\n");  in palmas_pinconf_get()
836 		return -ENOTSUPP;  in palmas_pinconf_get()
858 	for (group_nr = 0; group_nr < pci->num_pin_groups; ++group_nr) {  in palmas_pinconf_set()
859 		if (pci->pin_groups[group_nr].pins[0] == pin)  in palmas_pinconf_set()
863 	if (group_nr == pci->num_pin_groups) {  in palmas_pinconf_set()
864 		dev_err(pci->dev,  in palmas_pinconf_set()
865 			"Pinconf is not supported for pin-id %d\n", pin);  in palmas_pinconf_set()
866 		return -ENOTSUPP;  in palmas_pinconf_set()
869 	g = &pci->pin_groups[group_nr];  in palmas_pinconf_set()
870 	opt = g->opt[pci->pins_current_opt[group_nr]];  in palmas_pinconf_set()
872 		dev_err(pci->dev,  in palmas_pinconf_set()
873 			"Pinconf is not supported for pin %s\n", g->name);  in palmas_pinconf_set()
874 		return -ENOTSUPP;  in palmas_pinconf_set()
885 			if (!opt->pud_info) {  in palmas_pinconf_set()
886 				dev_err(pci->dev,  in palmas_pinconf_set()
888 					g->name);  in palmas_pinconf_set()
889 				return -ENOTSUPP;  in palmas_pinconf_set()
891 			base = opt->pud_info->pullup_dn_reg_base;  in palmas_pinconf_set()
892 			add = opt->pud_info->pullup_dn_reg_add;  in palmas_pinconf_set()
893 			mask = opt->pud_info->pullup_dn_mask;  in palmas_pinconf_set()
896 				rval = opt->pud_info->normal_val;  in palmas_pinconf_set()
898 				rval = opt->pud_info->pull_up_val;  in palmas_pinconf_set()
900 				rval = opt->pud_info->pull_dn_val;  in palmas_pinconf_set()
903 				dev_err(pci->dev,  in palmas_pinconf_set()
905 					g->name);  in palmas_pinconf_set()
906 				return -ENOTSUPP;  in palmas_pinconf_set()
911 			if (!opt->od_info) {  in palmas_pinconf_set()
912 				dev_err(pci->dev,  in palmas_pinconf_set()
914 					g->name);  in palmas_pinconf_set()
915 				return -ENOTSUPP;  in palmas_pinconf_set()
917 			base = opt->od_info->od_reg_base;  in palmas_pinconf_set()
918 			add = opt->od_info->od_reg_add;  in palmas_pinconf_set()
919 			mask = opt->od_info->od_mask;  in palmas_pinconf_set()
921 				rval = opt->od_info->od_disable;  in palmas_pinconf_set()
923 				rval = opt->od_info->od_enable;  in palmas_pinconf_set()
925 				dev_err(pci->dev,  in palmas_pinconf_set()
927 					g->name);  in palmas_pinconf_set()
928 				return -ENOTSUPP;  in palmas_pinconf_set()
932 			dev_err(pci->dev, "Properties not supported\n");  in palmas_pinconf_set()
933 			return -ENOTSUPP;  in palmas_pinconf_set()
936 		dev_dbg(pci->dev, "%s(): Add0x%02x:0x%02x:0x%02x:0x%02x\n",  in palmas_pinconf_set()
938 		ret = palmas_update_bits(pci->palmas, base, add, mask, rval);  in palmas_pinconf_set()
940 			dev_err(pci->dev, "Reg 0x%02x update failed: %d\n",  in palmas_pinconf_set()
959 	.pins = palmas_pins_desc,
979 	{ .compatible = "ti,palmas-pinctrl", .data = &tps65913_pinctrl_data},
980 	{ .compatible = "ti,tps65913-pinctrl", .data = &tps65913_pinctrl_data},
981 	{ .compatible = "ti,tps80036-pinctrl", .data = &tps80036_pinctrl_data},
994 	if (pdev->dev.of_node) {  in palmas_pinctrl_probe()
995 		pinctrl_data = of_device_get_match_data(&pdev->dev);  in palmas_pinctrl_probe()
996 		enable_dvfs1 = of_property_read_bool(pdev->dev.of_node,  in palmas_pinctrl_probe()
997 					"ti,palmas-enable-dvfs1");  in palmas_pinctrl_probe()
998 		enable_dvfs2 = of_property_read_bool(pdev->dev.of_node,  in palmas_pinctrl_probe()
999 					"ti,palmas-enable-dvfs2");  in palmas_pinctrl_probe()
1002 	pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);  in palmas_pinctrl_probe()
1004 		return -ENOMEM;  in palmas_pinctrl_probe()
1006 	pci->dev = &pdev->dev;  in palmas_pinctrl_probe()
1007 	pci->palmas = dev_get_drvdata(pdev->dev.parent);  in palmas_pinctrl_probe()
1009 	pci->pins = palmas_pins_desc;  in palmas_pinctrl_probe()
1010 	pci->num_pins = ARRAY_SIZE(palmas_pins_desc);  in palmas_pinctrl_probe()
1011 	pci->functions = palmas_pin_function;  in palmas_pinctrl_probe()
1012 	pci->num_functions = ARRAY_SIZE(palmas_pin_function);  in palmas_pinctrl_probe()
1013 	pci->pin_groups = pinctrl_data->pin_groups;  in palmas_pinctrl_probe()
1014 	pci->num_pin_groups = pinctrl_data->num_pin_groups;  in palmas_pinctrl_probe()
1022 		dev_err(&pdev->dev,  in palmas_pinctrl_probe()
1027 	palmas_pinctrl_desc.name = dev_name(&pdev->dev);  in palmas_pinctrl_probe()
1028 	pci->pctl = devm_pinctrl_register(&pdev->dev, &palmas_pinctrl_desc,  in palmas_pinctrl_probe()
1030 	if (IS_ERR(pci->pctl)) {  in palmas_pinctrl_probe()
1031 		dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");  in palmas_pinctrl_probe()
1032 		return PTR_ERR(pci->pctl);  in palmas_pinctrl_probe()
1039 		.name = "palmas-pinctrl",
1049 MODULE_ALIAS("platform:palmas-pinctrl");