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/linux/arch/arc/boot/dts/
H A Dabilis_tb101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
H A Dabilis_tb100.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32f746-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include "stm32f7-pinctrl.dtsi"
10 compatible = "st,stm32f746-pinctrl";
12 gpioa: gpio@40020000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@40020400 {
17 gpio-ranges = <&pinctrl 0 16 16>;
20 gpioc: gpio@40020800 {
21 gpio-ranges = <&pinctrl 0 32 16>;
[all …]
H A Dstm32f769-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include "stm32f7-pinctrl.dtsi"
10 compatible = "st,stm32f769-pinctrl";
12 gpioa: gpio@40020000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@40020400 {
17 gpio-ranges = <&pinctrl 0 16 16>;
20 gpioc: gpio@40020800 {
21 gpio-ranges = <&pinctrl 0 32 16>;
[all …]
H A Dstm32mp15xxaa-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp15xxac-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32f429-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "stm32f4-pinctrl.dtsi"
46 compatible = "st,stm32f429-pinctrl";
48 gpioa: gpio@40020000 {
49 gpio-ranges = <&pinctrl 0 0 16>;
52 gpiob: gpio@40020400 {
53 gpio-ranges = <&pinctrl 0 16 16>;
56 gpioc: gpio@40020800 {
57 gpio-ranges = <&pinctrl 0 32 16>;
[all …]
H A Dstm32f469-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "stm32f4-pinctrl.dtsi"
46 compatible = "st,stm32f469-pinctrl";
48 gpioa: gpio@40020000 {
49 gpio-ranges = <&pinctrl 0 0 16>;
52 gpiob: gpio@40020400 {
53 gpio-ranges = <&pinctrl 0 16 16>;
56 gpioc: gpio@40020800 {
57 gpio-ranges = <&pinctrl 0 32 16>;
[all …]
H A Dstm32mp15xxab-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp15xxad-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
/linux/arch/arm64/boot/dts/st/
H A Dstm32mp25xxai-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp25xxak-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp25xxal-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Damlogic-s6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/amlogic,pinctrl.h>
12 #address-cells = <2>;
13 #size-cells = <0>;
17 compatible = "arm,cortex-a510";
19 enable-method = "psci";
24 compatible = "arm,cortex-a510";
[all …]
H A Damlogic-s7d.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/amlogic,pinctrl.h>
13 #address-cells = <2>;
14 #size-cells = <0>;
18 compatible = "arm,cortex-a55";
20 enable-method = "psci";
25 compatible = "arm,cortex-a55";
[all …]
/linux/Documentation/devicetree/bindings/gpio/
H A Dsocionext,uniphier-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier GPIO controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 pattern: "^gpio@[0-9a-f]+$"
17 const: socionext,uniphier-gpio
22 gpio-controller: true
24 "#gpio-cells":
[all …]
/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 HiSilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/hi3670-clock.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
27 cpu-map {
[all …]
H A Dhi3660.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/hi3660-clock.h>
10 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 compatible = "nxp,imx8dxl-fspi";
12 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
14 gpio-ranges = <&iomuxc 0 47 13>,
21 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
23 gpio-ranges = <&iomuxc 4 74 5>,
28 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
30 gpio-ranges = <&iomuxc 1 98 2>,
36 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
38 gpio-ranges = <&iomuxc 0 115 4>,
[all …]
H A Dimx8qm-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2019-2020 NXP
8 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
9 gpio-ranges = <&iomuxc 0 0 6>,
15 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
16 gpio-ranges = <&iomuxc 0 40 4>,
23 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
24 gpio-ranges = <&iomuxc 0 80 4>,
30 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
31 gpio-ranges = <&iomuxc 0 114 2>,
[all …]
H A Dimx8qxp-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
8 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
9 gpio-ranges = <&iomuxc 1 56 12>,
17 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
18 gpio-ranges = <&iomuxc 0 89 9>,
24 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
25 gpio-ranges = <&iomuxc 0 123 1>,
31 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
32 gpio-ranges = <&iomuxc 0 146 4>,
[all …]
/linux/arch/mips/boot/dts/pic32/
H A Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
49 #clock-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p-pmics.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/spmi/spmi.h>
12 compatible = "qcom,pm8150", "qcom,spmi-pmic";
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "qcom,pm8941-rtc";
20 reg-names = "rtc", "alarm";
22 wakeup-source;
25 pmm8540a_gpios: gpio@c000 {
[all …]

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