/freebsd/sys/contrib/device-tree/src/arm/nuvoton/ |
H A D | nuvoton-wpcm450.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 #include <dt-bindings/interrupt-controller/irq.h> 8 #address-cells = <1>; 9 #size-cell [all...] |
H A D | nuvoton-npcm730-gbs.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 /dts-v1/; 5 #include "nuvoton-npcm730.dtsi" 6 #include <dt-bindings/gpio/gpio.h> 10 compatible = "quanta,gbs-bmc","nuvoton,npcm730"; 71 stdout-pat [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/ |
H A D | meson-gxbb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "meson-gx.dtsi" 7 #include "meson-gx-mali450.dtsi" 8 #include <dt-bindings/gpio/meson-gxbb-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 10 #include <dt-bindings/clock/gxbb-clkc.h> 11 #include <dt-bindings/clock/gxbb-aoclkc.h> 12 #include <dt-bindings/reset/gxbb-aoclkc.h> 15 compatible = "amlogic,meson-gxbb"; 19 compatible = "amlogic,meson-gxbb-usb2-phy"; [all …]
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H A D | meson-gxl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gx.dtsi" 8 #include <dt-bindings/clock/gxbb-clkc.h> 9 #include <dt-bindings/clock/gxbb-aoclkc.h> 10 #include <dt-bindings/gpio/meson-gxl-gpio.h> 11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 14 compatible = "amlogic,meson-gxl"; 18 compatible = "amlogic,meson-gxl-usb-ctrl"; 21 #address-cells = <2>; 22 #size-cells = <2>; [all …]
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H A D | meson-s4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/meson-s4-gpio.h> 10 #include <dt-bindings/clock/amlogic,s4-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h> 12 #include <dt-bindings/power/meson-s4-power.h> 13 #include <dt-bindings/reset/amlogic,meson-s4-reset.h> 17 #address-cells = <2>; [all …]
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H A D | amlogic-c3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/reset/amlogic,c3-reset.h> 10 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> 12 #include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> 13 #include <dt-bindings/power/amlogic,c3-pwrc.h> 14 #include <dt-bindings/gpio/amlogic-c3-gpio.h> [all …]
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H A D | meson-axg.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/axg-aoclkc.h> 7 #include <dt-bindings/clock/axg-audio-clkc.h> 8 #include <dt-bindings/clock/axg-clkc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/gpio/meson-axg-gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h> [all …]
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H A D | meson-a1.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/amlogic,a1-pll-clkc.h> 7 #include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h> 8 #include <dt-bindings/gpio/meson-a1-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/power/meson-a1-power.h> 12 #include <dt-bindings/reset/amlogic,meson-a1-reset.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | mmp2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/marvell,mmp2.h> 8 #include <dt-bindings/power/marvell,mmp2.h> 9 #include <dt-bindings/clock/marvell,mmp2-audio.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 25 #address-cells = <1>; 26 #size-cells = <1>; 27 compatible = "simple-bus"; 28 interrupt-parent = <&intc>; [all …]
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H A D | mmp3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/marvell,mmp2.h> 7 #include <dt-bindings/power/marvell,mmp2.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 17 enable-method = "marvell,mmp3-smp"; 22 next-level-cache = <&l2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/gemini/ |
H A D | gemini.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/clock/cortina,gemini-clock.h> 8 #include <dt-bindings/reset/cortina,gemini-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 16 compatible = "simple-bus"; 17 interrupt-parent = <&intcon>; 20 compatible = "cortina,gemini-flash", "cfi-flash"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/amlogic/ |
H A D | meson8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/power/meson8-power.h> 10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
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H A D | meson8b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 #include <dt-bindings/clock/meson8-ddr-clkc.h> 8 #include <dt-bindings/clock/meson8b-clkc.h> 9 #include <dt-bindings/gpio/meson8b-gpio.h> 10 #include <dt-bindings/power/meson8-power.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 13 #include <dt-bindings/thermal/thermal.h> 18 #address-cells = <1>; 19 #size-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | gpio-mux-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/gpio-mux-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Simple GPIO clock multiplexer 10 - Sergej Sawazki <ce3a@gmx.de> 14 const: gpio-mux-clock 18 - description: First parent clock 19 - description: Second parent clock 21 '#clock-cells': [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp-sck-kv-g-revB.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 15 /dts-v1/; 18 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 19 #address-cells = <1>; 20 #size-cells = <0>; [all …]
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H A D | zynqmp-sck-kv-g-revB.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 /dts-v1/; 20 compatible = "xlnx,zynqmp-sk-kv260-rev2", 21 "xlnx,zynqmp-sk-kv260-rev1", [all …]
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H A D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 model = "ZynqMP zc1751-xm015-dc1 RevA"; [all …]
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H A D | zynqmp-sck-kv-g-revA.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 9 * "A" - A01 board un-modified (NXP) 10 * "Y" - A01 board modified with legacy interposer (Nexperia) 11 * "Z" - A01 board modified with Diode interposer 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/net/ti-dp83867.h> 18 #include <dt-bindings/phy/phy.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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H A D | zynqmp-zcu100-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 12 /dts-v1/; 15 #include "zynqmp-clk-ccf.dtsi" 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 18 #include <dt-bindings/gpio/gpio.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 #include <dt-bindings/phy/phy.h> [all …]
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H A D | zynqmp-sck-kv-g-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 8 * "A" – A01 board un-modified (NXP) 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/net/ti-dp83867.h> 17 #include <dt-bindings/phy/phy.h> 18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 /dts-v1/; 23 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 24 #address-cells = <1>; [all …]
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H A D | zynqmp-zcu102-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 18 #include <dt-bindings/phy/phy.h> 22 compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; [all …]
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H A D | zynqmp-zcu106-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 18 #include <dt-bindings/phy/phy.h> 22 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp"; [all …]
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H A D | zynqmp-zcu111-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2017 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 18 #include <dt-bindings/phy/phy.h> 22 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx6dl-alti6p.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/sound/fsl-imx-audmux.h> 18 stdout-path = &uart4; 21 clock_ksz8081: clock-ksz8081 { 22 compatible = "fixed-clock"; 23 #clock-cells = <0>; 24 clock-frequency = <50000000>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Rob Clark <robdclark@gmail.com> 16 - qcom,hdmi-tx-8084 17 - qcom,hdmi-tx-8660 18 - qcom,hdmi-tx-8960 19 - qcom,hdmi-tx-8974 20 - qcom,hdmi-tx-8994 21 - qcom,hdmi-tx-8996 [all …]
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