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/linux/Documentation/devicetree/bindings/i3c/
H A Daspeed,ast2600-i3c.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeremy Kerr <jk@codeconstruct.com.au>
13 - $ref: i3c.yaml#
17 const: aspeed,ast2600-i3c
31 sda-pullup-ohms:
37 aspeed,global-regs:
38 $ref: /schemas/types.yaml#/definitions/phandle-array
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/linux/drivers/net/ethernet/freescale/fman/
H A Dfman_keygen.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
39 /* KeyGen Global Registers bit field masks */
96 /* Hard-coded configuration:
97 * These values are used as hard-coded values for KeyGen configuration
98 * and they replace user selections for this hard-coded version
109 * - the value for symmetric hash usage must be in accordance with hash
111 * - according to tests performed, spreading is not working if symmetric
165 * Global Statistic Counters
166 * KeyGen Global Registers
178 u32 fmkg_gsr; /* 0x024: KeyGen Global Status Register */
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/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_capture.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021-2022 Intel Corporation
27 * NOTE: For engine-registers, GuC only needs the register offsets
28 * from the engine-mmio-base
97 /* XE_LP Global */
104 /* XE_LP Render / Compute Per-Class */
110 /* GEN8+ Render / Compute Per-Engine-Instance */
115 /* GEN8+ Media Decode/Encode Per-Engine-Instance */
120 /* XE_LP Video Enhancement Per-Class */
125 /* GEN8+ Video Enhancement Per-Engine-Instance */
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/linux/arch/sparc/power/
H A Dhibernate_asm.S1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <asm/asm-offsets.h>
15 save %sp, -128, %sp
16 save %sp, -128, %sp
21 /* Save window regs */
28 /* Save state regs */
34 /* Save global regs */
61 setuw (PAGE_SIZE-8), %g3
82 mov %g3, %l3 /* PAGE_SIZE-8 */
97 /* Restore window regs */
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/linux/arch/sparc/kernel/
H A Dprocess_64.c1 // SPDX-License-Identifier: GPL-2.0
10 * This file handles the architecture-dependent parts of process handling..
85 /* Re-enable interrupts. */ in arch_cpu_idle()
106 static void show_regwindow32(struct pt_regs *regs) in show_regwindow32() argument
112 rw = compat_ptr((unsigned int)regs->u_regs[14]); in show_regwindow32()
127 #define show_regwindow32(regs) do { } while (0) argument
130 static void show_regwindow(struct pt_regs *regs) in show_regwindow() argument
136 if ((regs->tstate & TSTATE_PRIV) || !(test_thread_flag(TIF_32BIT))) { in show_regwindow()
139 (regs->u_regs[14] + STACK_BIAS); in show_regwindow()
141 (regs->u_regs[14] + STACK_BIAS); in show_regwindow()
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/linux/drivers/spi/
H A Dspi-xilinx.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * 2002-2007 (c) MontaVista Software, Inc.
56 #define XSPI_SSR_OFFSET 0x70 /* 32-bit Slave Select Register */
61 #define XIPIF_V123B_DGIER_OFFSET 0x1c /* IPIF global int enable reg */
83 void __iomem *regs; /* virt. address of the control registers */ member
120 if (!xspi->tx_ptr) { in xilinx_spi_tx()
121 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET); in xilinx_spi_tx()
125 switch (xspi->bytes_per_word) { in xilinx_spi_tx()
127 data = *(u8 *)(xspi->tx_ptr); in xilinx_spi_tx()
130 data = *(u16 *)(xspi->tx_ptr); in xilinx_spi_tx()
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/linux/arch/m68k/ifpsp060/src/
H A Dfplsp.S3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
276 set LV, -LOCAL_SIZE # stack offset
285 set EXC_AREGS, -68 # offset of all address regs
286 set EXC_DREGS, -100 # offset of all data regs
287 set EXC_FPREGS, -36 # offset of all fp regs
503 set rn_mode, 0x0 # round-to-nearest
504 set rz_mode, 0x1 # round-to-zero
505 set rm_mode, 0x2 # round-tp-minus-infinity
506 set rp_mode, 0x3 # round-to-plus-infinity
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/linux/drivers/net/ethernet/agere/
H A Det131x.c2 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
10 *------------------------------------------------------------------------------
87 MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver for the ET1310 by Agere Systems");
106 * In both cases, when flow control is enabled for either Tx or bi-direction,
156 #define ET131X_PCI_DEVICE_ID_GIG 0xED00 /* ET1310 1000 Base-T 8 */
157 #define ET131X_PCI_DEVICE_ID_FAST 0xED01 /* ET1310 100 Base-T */
173 /* number of RFDs - default and min */
189 u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */
197 * PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2)
210 * 11-15: unused
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/linux/drivers/crypto/ccree/
H A Dcc_debugfs.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2012-2019 ARM Limited or its affiliates. */
17 * This is a global var for the dentry of the
20 * global.
70 return -ENOMEM; in cc_debugfs_init()
72 regset->regs = debug_regs; in cc_debugfs_init()
73 regset->nregs = ARRAY_SIZE(debug_regs); in cc_debugfs_init()
74 regset->base = drvdata->cc_base; in cc_debugfs_init()
75 regset->dev = dev; in cc_debugfs_init()
77 drvdata->dir = debugfs_create_dir(drvdata->plat_dev->name, in cc_debugfs_init()
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/linux/arch/microblaze/kernel/
H A Dentry.S2 * Low-level system-call handling, trap handlers and context-switching
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
25 #include <asm/asm-offsets.h>
41 .global syscall_debug_table
160 /* Define how to call high-level functions. With MMU, virtual mode must be
161 * enabled when calling the high-level function. Clobbers R11.
189 swi r11, r1, PT_R11; /* save clobbered regs after rval */\
223 lwi r11, r1, PT_R11; /* restore clobbered regs after rval */\
263 /* Kernel-mode state save. */ \
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/linux/drivers/gpu/drm/xe/
H A Dxe_guc_capture.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021-2024 Intel Corporation
14 #include "regs/xe_engine_regs.h"
15 #include "regs/xe_gt_regs.h"
16 #include "regs/xe_guc_regs.h"
17 #include "regs/xe_regs.h"
45 * Book-keeping structure used to track read and write pointers
46 * as we extract error capture data from the GuC-log-buffer's
47 * error-capture region as a stream of dwords.
57 * struct __guc_capture_parsed_output - extracted error capture node
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/linux/arch/x86/include/uapi/asm/
H A Ddebugreg.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
7 debug registers. Registers 0-3 contain the addresses we wish to trap on */
21 * This is also the DR6 architectural value following Power-up, Reset or INIT.
47 #define DR_STEP (0x4000) /* single-step */
52 bits - each field corresponds to one of the four debug registers,
71 is global meaning that we have to explicitly reset the bit. With linux,
76 #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */
78 #define DR_GLOBAL_ENABLE (0x2) /* Global enable for reg 0 */
81 #define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */
82 #define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */
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/linux/arch/x86/kernel/
H A Dumip.c2 * umip.c Emulation for instruction protected by the User-Mode Instruction
6 * Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
13 #include <asm/insn-eval.h>
19 /** DOC: Emulation for User-Mode Instruction Prevention (UMIP)
21 * User-Mode Instruction Prevention is a security feature present in recent
27 * the UMIP-protected instructions (in the form of a SIGSEGV signal), it can be
31 * global descriptor and interrupt descriptor tables, the segment selectors of
44 * not the actual location of the table. The result is emulated as a hard-coded
52 * - SLDT returns (GDT_ENTRY_LDT * 8) if an LDT has been set, 0 if not.
53 * - STR returns (GDT_ENTRY_TSS * 8).
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H A Drethook.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 __visible void arch_rethook_trampoline_callback(struct pt_regs *regs);
24 ".global arch_rethook_trampoline\n"
33 /* Save the 'sp - 16', this will be fixed later. */
40 /* In the callback function, 'regs->flags' is copied to 'regs->ss'. */
48 /* Save the 'sp - 8', this will be fixed later. */
55 /* In the callback function, 'regs->flags' is copied to 'regs->ss'. */
60 ".size arch_rethook_trampoline, .-arch_rethook_trampoline\n"
67 __used __visible void arch_rethook_trampoline_callback(struct pt_regs *regs) in arch_rethook_trampoline_callback() argument
72 regs->cs = __KERNEL_CS; in arch_rethook_trampoline_callback()
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/linux/drivers/net/ipa/
H A Dgsi_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2023 Linaro Ltd.
30 * function-like macro that takes a parameter used in the computation.
38 * (though the actual limit is hardware-dependent).
42 * (though the actual limit is hardware-dependent).
45 /* enum gsi_reg_id - GSI register IDs */
109 CHTYPE_PROTOCOL_MSB, /* IPA v4.5-4.11 */
115 /** enum gsi_channel_type - CHTYPE_PROTOCOL field values in CH_C_CNTXT_0 */
140 USE_ESCAPE_BUF_ONLY, /* IPA v4.0-4.2 */
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/linux/arch/powerpc/kernel/
H A Drethook.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * - init_kprobes() establishes a probepoint here
12 * - When the probed function returns, this probe
15 asm(".global arch_rethook_trampoline\n"
20 ".size arch_rethook_trampoline, .-arch_rethook_trampoline\n");
25 static int trampoline_rethook_handler(struct kprobe *p, struct pt_regs *regs) in trampoline_rethook_handler() argument
27 return !rethook_trampoline_handler(regs, regs->gpr[1]); in trampoline_rethook_handler()
31 void arch_rethook_prepare(struct rethook_node *rh, struct pt_regs *regs, bool mcount) in arch_rethook_prepare() argument
33 rh->ret_addr = regs->link; in arch_rethook_prepare()
34 rh->frame = regs->gpr[1]; in arch_rethook_prepare()
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/linux/tools/perf/util/
H A Dannotate-data.c1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include "annotate-data.h"
18 #include "dwarf-regs.h"
104 switch (ops->atom) { in pr_debug_location()
106 pr_info("reg%d\n", ops->atom - DW_OP_reg0); in pr_debug_location()
110 ops->atom - DW_OP_breg0, (long)ops->number); in pr_debug_location()
113 pr_info("reg%ld\n", (long)ops->number); in pr_debug_location()
117 (long)ops->number, (long)ops->number2); in pr_debug_location()
120 pr_info("use frame base, offset=%#lx\n", (long)ops->number); in pr_debug_location()
123 pr_info("address=%#lx\n", (long)ops->number); in pr_debug_location()
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/linux/arch/powerpc/sysdev/
H A Dmpic_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
43 #define TIMER_OFFSET(num) (1 << (TIMERS_PER_GROUP - 1 - num))
63 struct timer_regs __iomem *regs; member
87 *time = (u64)div_u64(ticks, priv->timerfreq); in convert_ticks_to_time()
96 max_value = div_u64(ULLONG_MAX, priv->timerfreq); in convert_time_to_ticks()
99 return -EINVAL; in convert_time_to_ticks()
101 *ticks = (u64)time * (u64)priv->timerfreq; in convert_time_to_ticks()
119 spin_lock_irqsave(&priv->lock, flags); in detect_idle_cascade_timer()
120 map = casc_priv->cascade_map & priv->idle; in detect_idle_cascade_timer()
121 if (map == casc_priv->cascade_map) { in detect_idle_cascade_timer()
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H A Dfsl_gtm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale General-purpose Timers Module
7 * Jerry Huang <Chang-Ming.Huang@freescale.com>
38 u8 gtcfr1; /* Timer 1, Timer 2 global config register */
40 u8 gtcfr2; /* Timer 3, timer 4 global config register */
71 struct gtm_timers_regs __iomem *regs; member
80 * gtm_get_timer16 - request GTM timer to use it with the rest of GTM API
81 * Context: non-IRQ
84 * structure to use with the rest of GTM API, you should use timer->irq
93 spin_lock_irq(&gtm->lock); in gtm_get_timer16()
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/linux/arch/arc/mm/
H A Dtlbex.S1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
8 * -MMU v1: moved out legacy code into a separate file
9 * -MMU v3: PD{0,1} bits layout changed: They don't overlap anymore,
13 * -For MMU V2, we need not do heuristics at the time of committing a D-TLB
14 * entry, so that it doesn't knock out its I-TLB entry
15 * -Some more fine tuning:
19 * -Practically rewrote the I/D TLB Miss handlers
26 * -Passing ECR (Exception Cause REG) to do_page_fault( ) for printing
30 * -Added Debug Code to check if sw-ASID == hw-ASID
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/linux/arch/nios2/include/asm/
H A Dptrace.h23 unsigned long r8; /* r8-r15 Caller-saved GP registers */
34 unsigned long r4; /* r4-r7 Register arguments */
42 unsigned long gp; /* Global pointer */
53 unsigned long r16; /* r16-r23 Callee-saved GP registers */
66 #define user_mode(regs) (((regs)->estatus & ESTATUS_EU)) argument
68 #define instruction_pointer(regs) ((regs)->ra) argument
69 #define profile_pc(regs) instruction_pointer(regs) argument
70 #define user_stack_pointer(regs) ((regs)->sp) argument
75 - 1)
77 #define force_successful_syscall_return() (current_pt_regs()->orig_r2 = -1)
/linux/arch/riscv/kernel/
H A Dkgdb.c1 // SPDX-License-Identifier: GPL-2.0-only
37 static int get_step_address(struct pt_regs *regs, unsigned long *next_addr) in get_step_address() argument
39 unsigned long pc = regs->epc; in get_step_address()
40 unsigned long *regs_ptr = (unsigned long *)regs; in get_step_address()
45 return -EINVAL; in get_step_address()
109 *next_addr = ((unsigned long *)regs)[rs1_num]; in get_step_address()
120 static int do_single_step(struct pt_regs *regs) in do_single_step() argument
124 int error = get_step_address(regs, &addr); in do_single_step()
154 static void undo_single_step(struct pt_regs *regs) in undo_single_step() argument
165 atomic_set(&kgdb_cpu_doing_single_step, -1); in undo_single_step()
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/linux/tools/perf/arch/x86/annotate/
H A Dinstructions.c1 // SPDX-License-Identifier: GPL-2.0
4 * This table is searched twice - one for exact match and another for
129 if (arch->family >= 0x15 && (strstarts(ins1, "test") || in amd__ins_is_fused()
135 if (arch->family >= 0x19 && (strstarts(ins1, "add") || in amd__ins_is_fused()
148 if (arch->family != 6 || arch->model < 0x1e || strstr(ins2, "jmp")) in intel__ins_is_fused()
151 if (arch->model == 0x1e) { in intel__ins_is_fused()
183 arch->family = family; in x86__cpuid_parse()
184 arch->model = model; in x86__cpuid_parse()
185 arch->ins_is_fused = strstarts(cpuid, "AuthenticAMD") ? in x86__cpuid_parse()
191 return -1; in x86__cpuid_parse()
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/linux/drivers/usb/host/
H A Duhci-hcd.h1 /* SPDX-License-Identifier: GPL-2.0 */
21 #define USBCMD_GRESET 0x0004 /* Global reset */
22 #define USBCMD_EGSM 0x0008 /* Global Suspend Mode */
23 #define USBCMD_FGR 0x0010 /* Force Global Resume */
61 #define USBPORTSC_DMINUS 0x0020 /* D- high (line status) */
80 /* PCI Intel-specific resume-enable register */
97 /* When no queues need Full-Speed Bandwidth Reclamation,
110 * To facilitate the strongest possible byte-order checking from "sparse"
127 * with each endpoint, and qh->element (updated by the HC) is either:
128 * - the next unprocessed TD in the endpoint's queue, or
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/linux/arch/s390/kernel/
H A Dctlreg.c1 // SPDX-License-Identifier: GPL-2.0
17 * ctl_lock guards access to global control register contents which
42 __local_ctl_store(0, 15, lc->cregs_save_area); in system_ctlreg_init_save_area()
43 __local_ctl_store(0, 15, abs_lc->cregs_save_area); in system_ctlreg_init_save_area()
59 struct ctlreg regs[16]; in ctlreg_callback() local
61 __local_ctl_store(0, 15, regs); in ctlreg_callback()
62 if (pp->request == CTLREG_LOAD) { in ctlreg_callback()
63 regs[pp->cr].val = pp->val; in ctlreg_callback()
65 regs[pp->cr].val &= pp->andval; in ctlreg_callback()
66 regs[pp->cr].val |= pp->orval; in ctlreg_callback()
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