Home
last modified time | relevance | path

Searched +full:gcc +full:- +full:sm6115 (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm6115.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6115.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6115 Network-On-Chip interconnect
10 - Konrad Dybcio <konradybcio@kernel.org>
13 The Qualcomm SM6115 interconnect providers support adjusting the
19 - qcom,sm6115-bimc
20 - qcom,sm6115-cnoc
21 - qcom,sm6115-snoc
[all …]
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm6115-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6115 Display MDSS
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
15 are mentioned for SM6115 target.
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sm6115-mdss
[all …]
H A Dqcom,sm6115-dpu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on SM6115
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
12 $ref: /schemas/display/msm/dpu-common.yaml#
16 const: qcom,sm6115-dpu
20 - description: MDP register set
21 - description: VBIF register set
[all …]
H A Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm6115-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock Controller for SM6115
10 - Bjorn Andersson <andersson@kernel.org>
14 on SM6115.
16 See also:: include/dt-bindings/clock/qcom,sm6115-dispcc.h
21 - qcom,sm6115-dispcc
25 - description: Board XO source
[all …]
H A Dqcom,gcc-sm6115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6115.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM6115 and SM4250
10 - Iskren Chernev <iskren.chernev@gmail.com>
16 See also:: include/dt-bindings/clock/qcom,gcc-sm6115.h
20 const: qcom,gcc-sm6115
24 - description: Board XO source
25 - description: Sleep clock source
[all …]
H A Dqcom,sm6115-gpucc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM6115
10 - Konrad Dybcio <konradybcio@kernel.org>
16 See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
21 - qcom,sm6115-gpucc
25 - description: Board XO source
26 - description: GPLL0 main branch source
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6115p-lenovo-j606f.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "sm6115.dtsi"
13 compatible = "lenovo,j606f", "qcom,sm6115p", "qcom,sm6115";
14 chassis-type = "tablet";
17 qcom,msm-id = <445 0x10000>, <420 0x10000>;
18 qcom,board-id = <34 3>;
25 #address-cells = <2>;
26 #size-cells = <2>;
30 compatible = "simple-framebuffer";
[all …]
H A Dsm6115-fxtec-pro1x.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) 2023 - 2024, Dang Huynh <danct12@riseup.net>
6 /dts-v1/;
8 #include "sm6115.dtsi"
11 #include <dt-bindings/arm/qcom,ids.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/usb/pd.h>
17 compatible = "fxtec,pro1x", "qcom,sm6115";
18 chassis-type = "handset";
20 qcom,msm-id = <QCOM_ID_SM6115 0x10000>;
[all …]
H A Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain.
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
10 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,bam-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <andersson@kernel.org>
14 - $ref: dma-controller.yaml#
19 - enum:
21 - qcom,bam-v1.3.0
23 - qcom,bam-v1.4.0
[all …]
/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5332-qfprom
[all …]
/linux/drivers/clk/qcom/
H A Dgcc-sm6115.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
11 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
15 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
17 #include "clk-alpha-pll.h"
18 #include "clk-branch.h"
19 #include "clk-pll.h"
20 #include "clk-rcg.h"
21 #include "clk-regmap.h"
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-usbc.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
26 #include "phy-qcom-qmp-common.h"
28 #include "phy-qcom-qmp.h"
29 #include "phy-qcom-qmp-pcs-misc-v3.h"
33 /* set of registers with offsets different per-PHY */
298 /* struct qmp_phy_cfg - per-PHY initialization config */
302 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
396 "vdda-phy", "vdda-pll",
460 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_usbc_init()
[all …]