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Searched +full:gcc +full:- +full:qcm2290 (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,qcm2290-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,qcm2290-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on QCM2290
10 - Loic Poulain <loic.poulain@linaro.org>
14 domains on qcm2290.
16 See also:: include/dt-bindings/clock/qcom,dispcc-qcm2290.h
20 const: qcom,qcm2290-dispcc
24 - description: Board XO source
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H A Dqcom,gcc-qcm2290.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-qcm2290.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on QCM2290
10 - Shawn Guo <shawn.guo@linaro.org>
14 domains on QCM2290.
16 See also:: include/dt-bindings/clock/qcom,gcc-qcm2290.h
20 const: qcom,gcc-qcm2290
24 - description: Board XO source
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H A Dqcom,qcm2290-gpucc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,qcm2290-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on QCM2290
10 - Konrad Dybcio <konradybcio@kernel.org>
17 include/dt-bindings/clock/qcom,qcm2290-gpucc.h
21 const: qcom,qcm2290-gpucc
28 - description: AHB interface clock,
29 - description: SoC CXO clock
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/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,qcm2290-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Loic Poulain <loic.poulain@linaro.org>
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
15 are mentioned for QCM2290 target.
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,qcm2290-mdss
25 - description: Display AHB clock from gcc
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H A Dqcom,qcm2290-dpu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on QCM2290
10 - Loic Poulain <loic.poulain@linaro.org>
12 $ref: /schemas/display/msm/dpu-common.yaml#
16 const: qcom,qcm2290-dpu
20 - description: Address offset and size for mdp register set
21 - description: Address offset and size for vbif register set
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H A Dqcom,sm6115-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sm6115-mdss
25 - description: Display AHB clock from gcc
26 - description: Display AXI clock
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H A Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
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/linux/arch/arm64/boot/dts/qcom/
H A Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
10 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interconnect/qcom,qcm2290.h>
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/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,bam-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <andersson@kernel.org>
14 - $ref: dma-controller.yaml#
19 - enum:
21 - qcom,bam-v1.3.0
23 - qcom,bam-v1.4.0
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/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5332-qfprom
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/linux/drivers/clk/qcom/
H A Dgcc-qcm2290.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
15 #include "clk-alpha-pll.h"
16 #include "clk-branch.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap-divider.h"
2973 { .compatible = "qcom,gcc-qcm2290" },
2997 return qcom_cc_really_probe(&pdev->dev, &gcc_qcm2290_desc, regmap); in gcc_qcm2290_probe()
3003 .name = "gcc-qcm2290",
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-usbc.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
26 #include "phy-qcom-qmp-common.h"
28 #include "phy-qcom-qmp.h"
29 #include "phy-qcom-qmp-pcs-misc-v3.h"
33 /* set of registers with offsets different per-PHY */
298 /* struct qmp_phy_cfg - per-PHY initialization config */
302 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
396 "vdda-phy", "vdda-pll",
460 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_usbc_init()
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