Home
last modified time | relevance | path

Searched +full:function +full:- +full:mask (Results 1 – 25 of 1020) sorted by relevance

12345678910>>...41

/linux/arch/arm/lib/
H A Dbacktrace-clang.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/lib/backtrace-clang.S
18 #define mask r7 macro
31 * Clang does not store pc or sp in function prologues so we don't know exactly
32 * where the function starts.
36 * call. Inserting a false stack frame allows us to reference the function
41 * but in cases such as calling function pointers we cannot. In this case,
42 * default to using the lr. This will be some address in the function, but will
43 * not be the function start.
45 * Unfortunately due to the stack frame layout we can't dump r0 - r3, but these
[all …]
/linux/tools/testing/selftests/kvm/x86/
H A Dcpuid_test.c1 // SPDX-License-Identifier: GPL-2.0-only
32 for (i = 0; i < guest_cpuid->nent; i++) { in test_guest_cpuids()
33 __cpuid(guest_cpuid->entries[i].function, in test_guest_cpuids()
34 guest_cpuid->entries[i].index, in test_guest_cpuids()
37 GUEST_ASSERT_EQ(eax, guest_cpuid->entries[i].eax); in test_guest_cpuids()
38 GUEST_ASSERT_EQ(ebx, guest_cpuid->entries[i].ebx); in test_guest_cpuids()
39 GUEST_ASSERT_EQ(ecx, guest_cpuid->entries[i].ecx); in test_guest_cpuids()
40 GUEST_ASSERT_EQ(edx, guest_cpuid->entries[i].edx); in test_guest_cpuids()
60 struct cpuid_mask mask; in get_const_cpuid_mask() local
62 memset(&mask, 0xff, sizeof(mask)); in get_const_cpuid_mask()
[all …]
/linux/arch/powerpc/include/asm/
H A Dpmac_pfunc.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 * Arguments to a platform function call.
40 * Interpreting a given function always start with a begin() call which
43 * locking policy or per-function instance data.
64 int (*write_gpio)(PMF_STD_ARGS, u8 value, u8 mask);
65 int (*read_gpio)(PMF_STD_ARGS, u8 mask, int rshift, u8 xor);
67 int (*write_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask);
69 int (*write_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask);
71 int (*write_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask);
76 int (*wait_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask);
[all …]
/linux/drivers/ntb/hw/idt/
H A Dntb_hw_idt.h7 * Copyright (C) 2016-2018 T-Platforms JSC All Rights Reserved.
36 * IDT PCIe-switch NTB Linux driver
39 * Serge Semin <fancer.lancer@gmail.com>, <Sergey.Semin@t-platforms.ru>
55 * the supported IDT PCIe-switches
66 * IDT PCIe-switches device IDs
78 * NT-function Configuration Space registers
79 * NOTE 1) The IDT PCIe-switch internal data is little-endian
83 * with byte-enables corresponding to their native size or
86 * So to simplify the driver code, there is only DWORD-sized read/write
107 /* IDT Proprietary NT-port-specific registers */
[all …]
/linux/kernel/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
39 #define CSD_TYPE(_csd) ((_csd)->node.u_flags & CSD_FLAG_TYPE_MASK)
59 if (!zalloc_cpumask_var_node(&cfd->cpumask, GFP_KERNEL, in smpcfd_prepare_cpu()
61 return -ENOMEM; in smpcfd_prepare_cpu()
62 if (!zalloc_cpumask_var_node(&cfd->cpumask_ipi, GFP_KERNEL, in smpcfd_prepare_cpu()
64 free_cpumask_var(cfd->cpumask); in smpcfd_prepare_cpu()
65 return -ENOMEM; in smpcfd_prepare_cpu()
69 * Allocate the per-CPU CSD the first time a CPU comes up. It is in smpcfd_prepare_cpu()
71 * it even when the CPU was offlined after preemption was re-enabled. in smpcfd_prepare_cpu()
73 if (!cfd->csd) in smpcfd_prepare_cpu()
[all …]
/linux/drivers/net/dsa/microchip/
H A Dksz_dcb.c1 // SPDX-License-Identifier: GPL-2.0
14 * The datasheet specifies: Port 1 - 0x10, Port 2 - 0x20, Port 3 - 0x30.
61 /* ksz_supported_apptrust[] - Supported apptrust selectors and Priority Order
65 * the index within the array indicates the priority of the selector - lower
72 * non-configurable precedence where certain types of priority information
75 * 1. Tail Tag - Highest priority, overrides ACL, VLAN PCP, and DSCP priorities.
76 * 2. ACL - Overrides VLAN PCP and DSCP priorities.
77 * 3. VLAN PCP - Overrides DSCP priority.
78 * 4. DSCP - Lowest priority, does not override any other priority source.
84 * DCB_APP_SEL_PCP - Priority Code Point selector
[all …]
/linux/include/misc/
H A Docxl.h1 // SPDX-License-Identifier: GPL-2.0+
14 * reuse common code. A bit like a in-kernel library.
32 u8 pp_mmio_bar; /* per-process MMIO area */
45 int dvsec_function_pos; /* offset of the Function DVSEC */
52 OCXL_BIG_ENDIAN = 0, /**< AFU data is big-endian */
53 OCXL_LITTLE_ENDIAN = 1, /**< AFU data is little-endian */
65 * ocxl_function_open() - Open an OpenCAPI function on an OpenCAPI device
66 * @dev: The PCI device that contains the function
68 * Returns an opaque pointer to the function, or an error pointer (check with IS_ERR)
73 * ocxl_function_afu_list() - Get the list of AFUs associated with a PCI function device
[all …]
/linux/include/linux/
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2006-2009 Solarflare Communications Inc.
36 /* Bus address of the MDIO device (0-31) */
64 * up device-specific structures, if any
81 dev_set_drvdata(&mdio->dev, data); in mdiodev_set_drvdata()
86 return dev_get_drvdata(&mdio->dev); in mdiodev_get_drvdata()
91 return (mdio->reset_gpio || mdio->reset_ctrl); in mdiodev_has_reset()
104 get_device(&mdiodev->dev); in mdio_device_get()
128 * struct mdio_if_info - Ethernet controller MDIO interface
130 * @mmds: Mask of MMDs expected to be present in the PHY. This must be
[all …]
/linux/include/linux/bcma/
H A Dbcma_driver_pci.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 #define BCMA_CORE_PCI_ARBCTL_PARKID 0x00000006 /* Mask, selects which agent is parked on an idle …
29 #define BCMA_CORE_PCI_IMASK 0x0024 /* Interrupt mask */
36 #define BCMA_CORE_PCI_MBOX_F0_0 0x00000100 /* PCI function 0, INT 0 */
37 #define BCMA_CORE_PCI_MBOX_F0_1 0x00000200 /* PCI function 0, INT 1 */
38 #define BCMA_CORE_PCI_MBOX_F1_0 0x00000400 /* PCI function 1, INT 0 */
39 #define BCMA_CORE_PCI_MBOX_F1_1 0x00000800 /* PCI function 1, INT 1 */
40 #define BCMA_CORE_PCI_MBOX_F2_0 0x00001000 /* PCI function 2, INT 0 */
41 #define BCMA_CORE_PCI_MBOX_F2_1 0x00002000 /* PCI function 2, INT 1 */
42 #define BCMA_CORE_PCI_MBOX_F3_0 0x00004000 /* PCI function 3, INT 0 */
[all …]
/linux/drivers/media/platform/ti/davinci/
H A Dvpif.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
139 /* Macro for Generating mask */
145 ((((0xFFFFFFFF) << (32 - bits)) >> (32 - bits)) << pos)
168 /* Mask various length */
262 /* inline function to enable/disable channel0 */
271 /* inline function to enable/disable channel1 */
280 /* inline function to enable interrupt for channel0 */
302 /* inline function to enable interrupt for channel1 */
324 /* inline function to set buffer addresses in case of Y/C non mux mode */
[all …]
/linux/arch/arm/mach-davinci/
H A Dmux.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Pin-multiplex helper macros for TI DaVinci family devices
19 const unsigned char mask; member
25 /* UART0 function */
31 /* UART1 function */
37 /* UART2 function */
43 /* I2C1 function */
47 /* I2C0 function */
51 /* EMAC function */
78 /* McASP function */
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dradeon_atpx_handler.c1 // SPDX-License-Identifier: GPL-2.0-only
37 /* handle for device - and atpx */
85 * radeon_atpx_call - call an ATPX method
88 * @function: the ATPX function to execute
89 * @params: ATPX function params
91 * Executes the requested ATPX function (all asics).
94 static union acpi_object *radeon_atpx_call(acpi_handle handle, int function, in radeon_atpx_call() argument
106 atpx_arg_elements[0].integer.value = function; in radeon_atpx_call()
110 atpx_arg_elements[1].buffer.length = params->length; in radeon_atpx_call()
111 atpx_arg_elements[1].buffer.pointer = params->pointer; in radeon_atpx_call()
[all …]
/linux/include/linux/clk/
H A Dti.h1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <linux/clk-provider.h>
14 * struct clk_omap_reg - OMAP register declaration
29 * struct dpll_data - DPLL registers and integration data
31 * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
32 * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
36 * @enable_mask: mask of the DPLL mode bitfield in @control_reg
43 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
45 * @min_divider: minimum valid non-bypass divider value (actual)
46 * @max_divider: maximum valid non-bypass divider value (actual)
[all …]
/linux/drivers/pinctrl/aspeed/
H A Dpinmux-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "pinmux-aspeed.h"
18 aspeed_pinmux_ips[desc->ip], desc->reg, in aspeed_sig_desc_print_val()
19 desc->mask, enable ? desc->enable : desc->disable, in aspeed_sig_desc_print_val()
20 (rv & desc->mask) >> __ffs(desc->mask), rv); in aspeed_sig_desc_print_val()
24 * aspeed_sig_desc_eval() - Query the enabled or disabled state of a signal
35 * Evaluation of descriptor state is non-trivial in that it is not a binary
38 * descriptor (typically this means a different function to the one of interest
49 return -ENODEV; in aspeed_sig_desc_eval()
51 ret = regmap_read(map, desc->reg, &raw); in aspeed_sig_desc_eval()
[all …]
H A Dpinctrl-aspeed.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 #include <linux/pinctrl/pinconf-generic.h>
15 #include "pinmux-aspeed.h"
21 * @mask The mask to select the bits of interest in @reg
27 u32 mask; member
41 .mask = BIT_MASK(bit_) \
55 * @arg: The supported argument for @param, or -1 if any value is supported
57 * @mask: The bitfield mask for @val
66 u32 mask; member
95 unsigned int function);
[all …]
/linux/net/can/
H A Daf_can.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 /* af_can.c - Protocol family CAN core module
5 * Copyright (c) 2002-2017 Volkswagen Group Electronic Research
61 #include <linux/can/can-ml.h>
91 skb_queue_purge(&sk->sk_receive_queue); in can_sock_destruct()
92 skb_queue_purge(&sk->sk_error_queue); in can_sock_destruct()
102 if (cp && !try_module_get(cp->prot->owner)) in can_get_proto()
111 module_put(cp->prot->owner); in can_put_proto()
121 sock->state = SS_UNCONNECTED; in can_create()
124 return -EINVAL; in can_create()
[all …]
/linux/drivers/net/wireless/marvell/mwifiex/
H A Die.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * NXP Wireless LAN device driver: management IE handling- setting and
6 * Copyright 2011-2020 NXP
11 /* This function checks if current IE index is used by any on other interface.
12 * Return: -1: yes, current IE index is used by someone else.
19 struct mwifiex_adapter *adapter = priv->adapter; in mwifiex_ie_index_used_by_other_intf()
22 for (i = 0; i < adapter->priv_num; i++) { in mwifiex_ie_index_used_by_other_intf()
23 if (adapter->priv[i] != priv) { in mwifiex_ie_index_used_by_other_intf()
24 ie = &adapter->priv[i]->mgmt_ie[idx]; in mwifiex_ie_index_used_by_other_intf()
25 if (ie->mgmt_subtype_mask && ie->ie_length) in mwifiex_ie_index_used_by_other_intf()
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_lan_hmc.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
12 * i40e_align_l2obj_base - aligns base object pointer to 512 bytes
15 * Aligns the layer 2 function private memory so it's 512-byte aligned.
22 aligned_offset += (I40E_HMC_L2OBJ_BASE_ALIGNMENT - in i40e_align_l2obj_base()
29 * i40e_calculate_l2fpm_size - calculates layer 2 FPM memory size
35 * Calculates the maximum amount of memory for the function required, based
59 * i40e_init_lan_hmc - initialize i40e_hmc_info struct
66 * This function will be called once per physical function initialization.
72 * - HMC Resource Profile has been selected before calling this function.
[all …]
/linux/drivers/pci/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0
19 * pci_request_irq - allocate an interrupt line for a PCI device
21 * @nr: device-relative interrupt vector index (0-based).
22 * @handler: Function to be called when the IRQ occurs.
26 * @thread_fn: Function called from the IRQ handler thread
28 * @dev_id: Cookie passed back to the handler function
29 * @fmt: Printf-like format string naming the handler
33 * be invoked. All interrupts requested using this function might be shared.
52 return -ENOMEM; in pci_request_irq()
63 * pci_free_irq - free an interrupt allocated with pci_request_irq
[all …]
/linux/drivers/soc/mediatek/
H A Dmtk-infracfg.c1 // SPDX-License-Identifier: GPL-2.0-only
17 * mtk_infracfg_set_bus_protection - enable bus protection
19 * @mask: The mask containing the protection bits to be enabled.
24 * This function enables the bus protection bits for disabled power
28 int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, in mtk_infracfg_set_bus_protection() argument
35 regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, in mtk_infracfg_set_bus_protection()
36 mask); in mtk_infracfg_set_bus_protection()
38 regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask); in mtk_infracfg_set_bus_protection()
41 val, (val & mask) == mask, in mtk_infracfg_set_bus_protection()
48 * mtk_infracfg_clear_bus_protection - disable bus protection
[all …]
/linux/kernel/irq/
H A Dmanage.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006 Thomas Gleixner
42 irq_work_sync(&desc->redirect.work); in synchronize_irqwork()
60 while (irqd_irq_inprogress(&desc->irq_data)) in __synchronize_hardirq()
63 /* Ok, that indicated we're done: double-check carefully. */ in __synchronize_hardirq()
64 guard(raw_spinlock_irqsave)(&desc->lock); in __synchronize_hardirq()
65 inprogress = irqd_irq_inprogress(&desc->irq_data); in __synchronize_hardirq()
85 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
88 * This function waits for any pending hard IRQ handlers for this interrupt
[all …]
/linux/arch/mips/include/asm/
H A Dsmp.h6 * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
7 * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
19 #include <asm/smp-ops.h>
33 return current_thread_info()->cpu; in raw_smp_processor_id()
39 not be idempotent when cpus failed to come on-line. */
47 #define NO_PROC_ID (-1)
51 /* Octeon - Tell another core to flush its icache */
53 /* Loongson64 - Self IPI for IRQ work */
56 /* Mask of CPUs which are currently definitely operating coherently */
68 * this function sends a 'reschedule' IPI to another CPU.
[all …]
/linux/include/linux/platform_data/
H A Dmlxreg.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
3 * Copyright (C) 2017-2020 Mellanox Technologies Ltd.
14 * enum mlxreg_wdt_type - type of HW watchdog
28 * enum mlxreg_hotplug_kind - kind of hotplug entry
36 * after hardware-firmware synchronization handshake;
57 * enum mlxreg_hotplug_device_action - hotplug device action required for
73 * struct mlxreg_core_hotplug_notifier - hotplug notifier block:
76 * @handle: user handle to be passed by user handler function;
77 * @user_handler: user handler function associated with the event;
86 * struct mlxreg_hotplug_device - I2C device data:
[all …]
/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddprtc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2013-2016 Freescale Semiconductor Inc.
4 * Copyright 2016-2018 NXP
10 #include "dprtc-cmd.h"
13 * dprtc_open() - Open a control session for the specified object.
19 * This function can be used to open a control session for an
21 * the DPL or by calling the dprtc_create function.
22 * This function returns a unique authentication token,
42 cmd_params->dprtc_id = cpu_to_le32(dprtc_id); in dprtc_open()
54 * dprtc_close() - Close the control session of the object
[all …]
/linux/include/linux/dma/
H A Dqcom_bam_dma.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
15 * @cmd_and_addr - upper 8 bits command and lower 24 bits register address.
16 * @data - For write command: content to be written into peripheral register.
18 * @mask - For write command: register write mask.
21 * Setting to 0 ensures 32-bit addressing compatibility.
22 * @reserved - for future usage.
28 __le32 mask; member
41 * prep_bam_ce_le32 - Wrapper function to prepare a single BAM command
49 * For BAM v1.6.0+, the mask field behavior depends on command type:
[all …]

12345678910>>...41