Lines Matching +full:function +full:- +full:mask
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
21 - enum:
22 - pinctrl-single
23 - pinconf-single
24 - items:
25 - enum:
26 - ti,am437-padconf
27 - ti,am654-padconf
28 - ti,dra7-padconf
29 - ti,omap2420-padconf
30 - ti,omap2430-padconf
31 - ti,omap3-padconf
32 - ti,omap4-padconf
33 - ti,omap5-padconf
34 - ti,j7200-padconf
35 - const: pinctrl-single
40 interrupt-controller: true
42 '#interrupt-cells':
45 '#address-cells':
48 '#size-cells':
51 '#pinctrl-cells':
57 pinctrl-single,bit-per-mux:
61 pinctrl-single,function-mask:
62 description: Mask of the allowed register bits
65 pinctrl-single,function-off:
66 description: Optional function off mode for disabled state
69 pinctrl-single,register-width:
74 pinctrl-single,gpio-range:
75 description: Optional list of pin base, nr pins & gpio function
76 $ref: /schemas/types.yaml#/definitions/phandle-array
79 - description: phandle of a gpio-range node
80 - description: pin base
81 - description: number of pins
82 - description: gpio function
84 '#gpio-range-cells':
85 description: No longer needed, may exist in older files for gpio-ranges
89 gpio-range:
94 '#pinctrl-single,gpio-range-cells':
100 '-pins(-[0-9]+)?$|-pin$':
102 Pin group node name using naming ending in -pins followed by an optional
108 pinctrl-single,pins:
110 Array of pins as described in pinmux-node.yaml for pinctrl-pin-array
111 $ref: /schemas/types.yaml#/definitions/uint32-array
113 pinctrl-single,bits:
114 description: Register bit configuration for pinctrl-single,bit-per-mux
115 $ref: /schemas/types.yaml#/definitions/uint32-array
117 - description: register offset
118 - description: value
119 - description: pin bitmask in the register
121 pinctrl-single,bias-pullup:
123 $ref: /schemas/types.yaml#/definitions/uint32-array
125 - description: input
126 - description: enabled pull up bits
127 - description: disabled pull up bits
128 - description: bias pull up mask
130 pinctrl-single,bias-pulldown:
132 $ref: /schemas/types.yaml#/definitions/uint32-array
134 - description: input
135 - description: enabled pull down bits
136 - description: disabled pull down bits
137 - description: bias pull down mask
139 pinctrl-single,drive-strength:
141 $ref: /schemas/types.yaml#/definitions/uint32-array
143 - description: drive strength current
144 - description: drive strength mask
146 pinctrl-single,input-schmitt:
148 $ref: /schemas/types.yaml#/definitions/uint32-array
150 - description: schmitt strength current
151 - description: schmitt strength mask
153 pinctrl-single,input-schmitt-enable:
155 $ref: /schemas/types.yaml#/definitions/uint32-array
157 - description: input
158 - description: enable bits
159 - description: disable bits
160 - description: input schmitt mask
162 pinctrl-single,low-power-mode:
164 $ref: /schemas/types.yaml#/definitions/uint32-array
166 - description: low power mode value
167 - description: low power mode mask
169 pinctrl-single,slew-rate:
171 $ref: /schemas/types.yaml#/definitions/uint32-array
173 - description: slew rate
174 - description: slew rate mask
177 - $ref: pinctrl.yaml#
180 - compatible
181 - reg
182 - pinctrl-single,register-width
187 - |
189 #address-cells = <1>;
190 #size-cells = <1>;
193 compatible = "pinctrl-single";
195 #address-cells = <1>;
196 #size-cells = <0>;
197 #pinctrl-cells = <2>;
198 #interrupt-cells = <1>;
199 interrupt-controller;
200 pinctrl-single,register-width = <16>;
201 pinctrl-single,function-mask = <0xffff>;
202 pinctrl-single,gpio-range = <&range 0 3 0>;
203 range: gpio-range {
204 #pinctrl-single,gpio-range-cells = <3>;
207 uart2-pins {
208 pinctrl-single,pins =