| /freebsd/sys/contrib/dev/acpica/components/utilities/ |
| H A D | utmath.c | 3 * Module Name: utmath - Integer math support routines
11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
159 /* Structures used only for 64-bit divide */
170 UINT64 Full; member
176 * Optional support for 64-bit double-precision integer multiply and shift.
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| /freebsd/share/man/man4/ |
| H A D | nge.4 | 16 .\" 4. Neither the name of the author nor the names of any co-contributors
42 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
59 The DP83820 supports TBI (ten bit interface) and GMII
63 VLAN tagging/insertion as well as a 2048-bit multicast hash filter
68 full or half duplex.
81 .Bl -tag -width 10baseTXUTP
93 .Cm full-duplex
95 .Cm half-duplex
103 .Cm full-duplex
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| H A D | re.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
67 features, and use a descriptor-based DMA mechanism.
71 The 8139C+ is a single-chip solution combining both a 10/100 MAC and PHY.
73 The 816xS, 811xS, 8168 and 8111 are single-chip devices containing both a
76 in both 32-bit PCI and 64-bit PCI models.
78 embedded LAN-on-motherboard applications.
90 .Bl -tag -width ".Cm 10baseT/UTP"
102 .Cm full-duplex
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| H A D | vge.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 The VT6120/VT6122 is a 33/66MHz 64-bit PCI device which combines a tri-speed
65 as well as VLAN filtering, a 64-entry CAM filter and a 64-entry VLAN filter,
66 64-bit multicast hash filter, 4 separate transmit DMA queues, flow control
93 .Bl -tag -width ".Cm 10baseT/UTP"
105 .Cm full-duplex
107 .Cm half-duplex
115 .Cm full-duplex
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| H A D | stge.4 | 40 .Bd -ragged -offset indent
48 .Bd -literal -offset indent
57 The Sundance/Tamarack TC9021 is found on the D-Link DGE-550T
59 It uses an external PHY or an external 10-bit interface.
65 receive interrupt moderation mechanism as well as a 64-bit
67 The Sundance/Tamarack TC9021 supports TBI (ten bit interface)
80 .Bl -tag -width ".Cm 10baseT/UTP"
92 .Cm full-duplex
94 .Cm half-duplex
102 .Cm full-duplex
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| H A D | ti.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
63 Either chip can be used in either a 32-bit or 64-bit PCI
118 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
130 .Ar full-duplex
132 .Ar half-duplex
139 .Ar full-duplex
141 .Ar half-duplex
146 .Ar full-duplex
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| H A D | xl.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
57 and "tornado" bus-master Etherlink XL chips.
59 The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
63 NS 83840A 10/100 PHY for 10/100 Mbps support in full or half-duplex.
64 The 3c905B adapters have built-in autonegotiation logic mapped onto
67 adapters such as the 3c905-TX and 3c905B-TX are capable of 10 or
68 100Mbps data rates in either full or half duplex and can be manually
75 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
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| H A D | mouse.4 | 3 .\" Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
54 Movement and button states are usually encoded in fixed-length data packets.
58 The mouse drivers may have ``non-blocking'' attribute which will make
74 .Bl -tag -width Byte_1 -compact
76 .Bl -tag -width bit_7 -compact
77 .It bit 7
79 .It bit 6..3
81 .It bit 2
83 .It bit 1
87 .It bit 0
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| H A D | msk.4 | 35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
56 features and an interrupt moderation mechanism as well as a 64-bit
58 The Yukon II supports TBI (ten bit interface) and GMII
71 .Bl -tag -width ".Cm 10baseT/UTP"
83 .Cm full-duplex
85 .Cm half-duplex
93 .Cm full-duplex
95 .Cm half-duplex
103 .Cm full-duplex
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| /freebsd/sys/contrib/device-tree/Bindings/dma/stm32/ |
| H A D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a four-cell specifier for each
17 3. A 32bit mask specifying the DMA channel configuration which are device
19 -bit 9: Peripheral Increment Address
22 -bit 10: Memory Increment Address
25 -bit 15: Peripheral Increment Offset Size
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a four-cell specifier for each
17 3. A 32bit mask specifying the DMA channel configuration which are device
19 -bit 9: Peripheral Increment Address
22 -bit 10: Memory Increment Address
25 -bit 15: Peripheral Increment Offset Size
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| H A D | fsl-imx-sdma.txt | 4 - compatible : Should be one of
5 "fsl,imx25-sdma"
6 "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
7 "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
8 "fsl,imx51-sdma"
9 "fsl,imx53-sdma"
10 "fsl,imx6q-sdma"
11 "fsl,imx7d-sdma"
12 "fsl,imx6ul-sdma"
13 "fsl,imx8mq-sdma"
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| /freebsd/sys/dev/ath/ |
| H A D | if_ath_tsf.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
35 * Extend 15-bit time stamp from rx descriptor to
36 * a full 64-bit TSF using the specified TSF.
42 tsf -= 0x8000; in ath_extend_tsf15()
48 * Extend 32-bit time stamp from rx descriptor to
49 * a full 64-bit TSF using the specified TSF.
57 if (rstamp > tsf_low && (rstamp - tsf_low > 0x10000000)) in ath_extend_tsf32()
58 tsf64 -= 0x100000000ULL; in ath_extend_tsf32()
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| /freebsd/contrib/bearssl/src/hash/ |
| H A D | ghash_pclmul.c | 30 * (from the AES-NI instructions).
42 * Bit mask for features in ECX: in pclmul_supported()
58 * GHASH is defined over elements of GF(2^128) with "full little-endian"
61 * x86 is "mixed little-endian": bytes are ordered from least to most
62 * significant, but bits within a byte are in most-to-least significant
63 * order. Going to full little-endian representation would require
66 * Instead, we go to full big-endian representation, by swapping bytes
69 * can use a full big-endian representation because in a carryless
70 * multiplication, we have a nice bit reversal property:
74 * So by using full big-endian, we still get the right result, except
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| /freebsd/contrib/sendmail/ |
| H A D | KNOWNBUGS | 27 Switching to flock(), i.e., compile with -DHASFLOCK fixes this
33 If e-mail is delivered to a program which generates too much
47 Sendmail should handle full binary data. As it stands, it handles
49 this would require a major restructuring of the code -- for
55 If the value of a header is longer than 1250 (MAXNAME + MAXATOM - 6)
81 - add an entry to the access map:
83 - (only for advanced users) replace
86 Kresolve host -a<OKR> -T<TEMP>
91 Kcanon host -a<OKR> -T<TEMP>
92 Kdnsmx dns -R MX -a<OKR> -T<TEMP>
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| /freebsd/share/man/man5/ |
| H A D | libmap.conf.5 | 2 .\" Copyright (c) 2013 Dag-Erling Smørgrav
36 .Xr ld-elf.so.1 1
42 .Bl -tag -width indent
85 .Bl -tag -width indent
93 and vice-versa.
107 A constraint with a trailing slash is satisfied if the full pathname
119 Most programs executed from a shell are run without a full path, via
123 .Bf -symbolic
130 On 64-bit architectures that provide 32-bit binary compatibility, the
133 apply only to 64-bit binaries.
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| /freebsd/crypto/libecc/include/libecc/words/ |
| H A D | words.h | 2 * Copyright (C) 2017 - This file is part of libecc project
7 * Jean-Pierre FLORI <jean-pierre.flori@ssi.gouv.fr>
25 * By default, 64-bit word size is used since it is the most reasonable
44 * we use WORDSIZE=64. This is obviously the case on 64-bit platforms,
45 * but this should also be the case on most 32-bit platforms where
46 * native instructions allow a 32-bit x 32-bit to 64-bit multiplication.
49 * Cortex-M0/M0+ for example does not have such a native multiplication
51 * This is also the case for old Thumb ARM CPUs (pre Thumb-2).
53 * On 8-bit and 16-bit platform, we prefer to let the user decide on the best
75 * higher than (WORD_BITS - 1). These macros emulate
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterContext_x86.cpp | 1 //===-- RegisterContext_x86.cpp ---------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 // Convert the 8-bit abridged FPU Tag Word (as found in FXSAVE) to the full
14 // 16-bit FPU Tag Word (as found in FSAVE, and used by gdb protocol). This
19 // Mapping to ST(i): i = FPU regno - TOP (Status Word, bits 11:13). in AbridgedToFullTagWord()
21 int st = 7 - ((sw >> 11) & 7); in AbridgedToFullTagWord()
26 // The register is non-empty, so we need to check the value of ST(i). in AbridgedToFullTagWord()
28 st_regs[st].comp.sign_exp & 0x7fff; // Discard the sign bit. in AbridgedToFullTagWord()
41 st = (st - 1) & 7; in AbridgedToFullTagWord()
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| /freebsd/sys/dev/qlnx/qlnxe/ |
| H A D | reg_addr.h | 2 * Copyright (c) 2017-2018 Cavium, Inc.
38 … (0x1<<0) // This bit masks, when set, the Interrupt bit: P…
40 … (0x1<<1) // This bit masks, when set, the Interrupt bit: P…
54 …Access:RW DataWidth:0x4 // DBMUX register. Bit mask for enabling dword (128bit line) / qword …
55 …ess:RW DataWidth:0x2 // DBMUX register. Circular dword (128bit line) / qword (256bit line) …
56 … DataWidth:0x4 // DBMUX register. Bit mask for forcing the valid signal per dword (128bit line…
57 … DataWidth:0x4 // DBMUX register. bit mask for forcing the frame signal per dword (128bit line…
78 …Bit 0 - For ending "endless completion". 0 - When receiving a completion timeout while receiving a…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 … // 0 - RX target read and config sync fifo push overflow 1 - RX header sync fifo push overflow…
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| /freebsd/sys/dev/mii/ |
| H A D | nsgphyreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
19 * 4. Neither the name of the author nor the names of any co-contributors
49 #define NSGPHY_STRAPOPT_1000HDX 0x0010 /* Advertise 1000 half-duplex */
50 #define NSGPHY_STRAPOPT_1000FDX 0x0008 /* Advertise 1000 full-duplex */
51 #define NSGPHY_STRAPOPT_100_ADV 0x0004 /* Advertise 100 full/half-duplex */
57 #define PHY_SUP_SPEED1 0x0010 /* speed bit 1 */
58 #define PHY_SUP_SPEED0 0x0008 /* speed bit 1 */
64 #define PHY_SUP_DUPLEX 0x0002 /* 1 == full-duplex */
65 #define NSGPHY_PHYSUP_DUPSTS 0x0002 /* duplex status 1 == full */
|
| /freebsd/sys/dev/isci/scil/ |
| H A D | scic_sds_remote_node_table.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23 * The full GNU General Public License is included in this distribution
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
67 * This routine will find the bit position in absolute bit terms of the next
68 * available bit for selection. The absolute bit is index * 32 + bit
69 * position. If there are available bits in the first U32 then it is just bit
76 * @return U32 This is the absolute bit position for an available group.
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| /freebsd/sys/contrib/openzfs/include/ |
| H A D | zfs_valstr.h | 9 * or https://opensource.org/licenses/CDDL-1.0.
37 * These macros create function prototypes for pretty-printing or stringifying
43 * expands single char for each set bit, and space for each clear bit
46 * expands two-char mnemonic for each bit set in `bits`, separated by `|`
49 * expands full name of each bit set in `bits`, separated by spaces
54 * expands full name of enum value
|
| /freebsd/contrib/llvm-project/clang/lib/Headers/ |
| H A D | lwpintrin.h | 1 /*===---- lwpintrin.h - LWP intrinsics -------------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
60 /// A 32-bit value is zero-extended and inserted into the 64-bit Data2 field.
62 /// A 32-bit value is inserted into the 32-bit Data1 field.
64 /// A 32-bit immediate value is inserted into the 32-bit Flags field.
65 /// \returns If the ring buffer is full and LWP is running in Synchronized Mode,
82 /// A 32-bit value is zero-extended and inserted into the 64-bit Data2 field.
84 /// A 32-bit value is inserted into the 32-bit Data1 field.
86 /// A 32-bit immediate value is inserted into the 32-bit Flags field.
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| /freebsd/sys/net/ |
| H A D | sff8472.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013 George V. Neville-Neil
30 * The following set of constants are from Document SFF-8472
40 * 0-95 Serial ID Defined by SFP MSA
41 * 96-127 Vendor Specific Data
42 * 128-255 Reserved
45 * 0-55 Alarm and Warning Thresholds
46 * 56-95 Cal Constants
47 * 96-119 Real Time Diagnostic Interface
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstantRange.h | 1 //===- ConstantRange.h - Represent a range ----------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
19 // [T, T) = {F, T} = Full set
22 // example, for 8-bit types, it uses:
24 // [255, 255) = {0..255} = Full Set
29 //===----------------------------------------------------------------------===//
55 /// Create full constant range with same bitwidth.
61 /// Initialize a full or empty set for the specified bit width.
69 /// assert out if the two APInt's are not the same bit width.
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