Searched +full:fu740 +full:- +full:pcie (Results 1 – 7 of 7) sorted by relevance
/linux/Documentation/devicetree/bindings/pci/ |
H A D | sifive,fu740-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SiFive FU740 PCIe host controller 10 SiFive FU740 PCIe host controller is based on the Synopsys DesignWare 11 PCI core. It shares common features with the PCIe DesignWare core and 13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml. 16 - Paul Walmsley <paul.walmsley@sifive.com> 17 - Greentime Hu <greentime.hu@sifive.com> [all …]
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/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu740-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu740-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu740-c000", "sifive,fu740"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; 29 i-cache-sets = <128>; [all …]
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/linux/drivers/pci/controller/dwc/ |
H A D | pcie-fu740.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * FU740 DesignWare PCIe Controller integration 4 * Copyright (C) 2019-2021 SiFive, Inc. 8 * Based in part on the i.MX6 PCIe host controller shim which is: 28 #include "pcie-designware.h" 30 #define to_fu740_pcie(x) dev_get_drvdata((x)->dev) 83 gpiod_set_value_cansleep(afp->reset, 0); in fu740_pcie_assert_reset() 85 writel_relaxed(0x0, afp->mgmt_base + PCIEX8MGMT_PERST_N); in fu740_pcie_assert_reset() 91 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PERST_N); in fu740_pcie_deassert_reset() 93 gpiod_set_value_cansleep(afp->reset, 1); in fu740_pcie_deassert_reset() [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_PCIE_DW) += pcie-designware.o 3 obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o 4 obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o 5 obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o 6 obj-$(CONFIG_PCIE_BT1) += pcie-bt1.o 7 obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o 8 obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o 9 obj-$(CONFIG_PCIE_FU740) += pcie-fu740.o 10 obj-$(CONFIG_PCI_IMX6) += pci-imx6.o [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 3 menu "DesignWare-based PCIe controllers" 18 bool "Amazon Annapurna Labs PCIe controller" 24 Say Y here to enable support of the Amazon's Annapurna Labs PCIe 25 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare 27 required only for DT-based platforms. ACPI platforms with the 28 Annapurna Labs PCIe controller don't need to enable this. 31 tristate "Amlogic Meson PCIe controller" 38 and therefore the driver re-uses the DesignWare core functions to 45 bool "Axis ARTPEC-6 PCIe controller (host mode)" [all …]
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/linux/drivers/clk/sifive/ |
H A D | sifive-prci.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include "sifive-prci.h" 12 #include "fu540-prci.h" 13 #include "fu740-prci.h" 20 * __prci_readl() - read from a PRCI register 34 return readl_relaxed(pd->va + offs); in __prci_readl() 39 writel_relaxed(v, pd->va + offs); in __prci_writel() 42 /* WRPLL-related private functions */ 45 * __prci_wrpll_unpack() - unpack WRPLL configuration registers into parameters 49 * Given a value @r read from an FU740 PRCI PLL configuration register, [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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