Searched +full:fu540 +full:- +full:c000 +full:- +full:spi (Results 1 – 5 of 5) sorted by relevance
/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu540-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2018-2019 SiFive, Inc */ 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu540-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu540-c000", "sifive,fu540"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; [all …]
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H A D | hifive-unleashed-a00.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2018-2019 SiFive, Inc */ 4 #include "fu540-c000.dtsi" 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/pwm/pwm.h> 14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000", 15 "sifive,fu540"; 18 stdout-path = "serial0"; 22 timebase-frequency = <RTCCLK_FREQ>; [all …]
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H A D | fu740-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu740-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu740-c000", "sifive,fu740"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; 29 i-cache-sets = <128>; [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-sifive.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-sifive.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SiFive SPI controller 10 - Pragnesh Patel <pragnesh.patel@sifive.com> 11 - Paul Walmsley <paul.walmsley@sifive.com> 12 - Palmer Dabbelt <palmer@sifive.com> 15 - $ref: spi-controller.yaml# 20 - enum: [all …]
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/linux/arch/riscv/boot/dts/microchip/ |
H A D | mpfs.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2021 Microchip Technology Inc */ 4 /dts-v1/; 5 #include "dt-bindings/clock/microchip,mpfs-clock.h" 8 #address-cells = <2>; 9 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 16 timebase-frequency = <1000000>; 21 i-cache-block-size = <64>; [all …]
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