xref: /linux/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1c35f1b87SPaul Walmsley// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2c35f1b87SPaul Walmsley/* Copyright (c) 2018-2019 SiFive, Inc */
3c35f1b87SPaul Walmsley
4c35f1b87SPaul Walmsley#include "fu540-c000.dtsi"
50a91330bSYash Shah#include <dt-bindings/gpio/gpio.h>
6*8bc8824dSEmil Renner Berthing#include <dt-bindings/leds/common.h>
7*8bc8824dSEmil Renner Berthing#include <dt-bindings/pwm/pwm.h>
8c35f1b87SPaul Walmsley
9c35f1b87SPaul Walmsley/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
10c35f1b87SPaul Walmsley#define RTCCLK_FREQ		1000000
11c35f1b87SPaul Walmsley
12c35f1b87SPaul Walmsley/ {
13c35f1b87SPaul Walmsley	model = "SiFive HiFive Unleashed A00";
1465b2979dSKrzysztof Kozlowski	compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
1565b2979dSKrzysztof Kozlowski		     "sifive,fu540";
16c35f1b87SPaul Walmsley
17c35f1b87SPaul Walmsley	chosen {
182993c9b0SPaul Walmsley		stdout-path = "serial0";
19c35f1b87SPaul Walmsley	};
20c35f1b87SPaul Walmsley
21c35f1b87SPaul Walmsley	cpus {
22c35f1b87SPaul Walmsley		timebase-frequency = <RTCCLK_FREQ>;
23c35f1b87SPaul Walmsley	};
24c35f1b87SPaul Walmsley
25c35f1b87SPaul Walmsley	memory@80000000 {
26c35f1b87SPaul Walmsley		device_type = "memory";
27c35f1b87SPaul Walmsley		reg = <0x0 0x80000000 0x2 0x00000000>;
28c35f1b87SPaul Walmsley	};
29c35f1b87SPaul Walmsley
30c35f1b87SPaul Walmsley	hfclk: hfclk {
31c35f1b87SPaul Walmsley		#clock-cells = <0>;
32c35f1b87SPaul Walmsley		compatible = "fixed-clock";
33c35f1b87SPaul Walmsley		clock-frequency = <33333333>;
34c35f1b87SPaul Walmsley		clock-output-names = "hfclk";
35c35f1b87SPaul Walmsley	};
36c35f1b87SPaul Walmsley
37c35f1b87SPaul Walmsley	rtcclk: rtcclk {
38c35f1b87SPaul Walmsley		#clock-cells = <0>;
39c35f1b87SPaul Walmsley		compatible = "fixed-clock";
40c35f1b87SPaul Walmsley		clock-frequency = <RTCCLK_FREQ>;
41c35f1b87SPaul Walmsley		clock-output-names = "rtcclk";
42c35f1b87SPaul Walmsley	};
430a91330bSYash Shah	gpio-restart {
440a91330bSYash Shah		compatible = "gpio-restart";
450a91330bSYash Shah		gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
460a91330bSYash Shah	};
47*8bc8824dSEmil Renner Berthing
48*8bc8824dSEmil Renner Berthing	led-controller {
49*8bc8824dSEmil Renner Berthing		compatible = "pwm-leds";
50*8bc8824dSEmil Renner Berthing
51*8bc8824dSEmil Renner Berthing		led-d1 {
52*8bc8824dSEmil Renner Berthing			pwms = <&pwm0 0 7812500 PWM_POLARITY_INVERTED>;
53*8bc8824dSEmil Renner Berthing			active-low;
54*8bc8824dSEmil Renner Berthing			color = <LED_COLOR_ID_GREEN>;
55*8bc8824dSEmil Renner Berthing			max-brightness = <255>;
56*8bc8824dSEmil Renner Berthing			label = "d1";
57*8bc8824dSEmil Renner Berthing		};
58*8bc8824dSEmil Renner Berthing
59*8bc8824dSEmil Renner Berthing		led-d2 {
60*8bc8824dSEmil Renner Berthing			pwms = <&pwm0 1 7812500 PWM_POLARITY_INVERTED>;
61*8bc8824dSEmil Renner Berthing			active-low;
62*8bc8824dSEmil Renner Berthing			color = <LED_COLOR_ID_GREEN>;
63*8bc8824dSEmil Renner Berthing			max-brightness = <255>;
64*8bc8824dSEmil Renner Berthing			label = "d2";
65*8bc8824dSEmil Renner Berthing		};
66*8bc8824dSEmil Renner Berthing
67*8bc8824dSEmil Renner Berthing		led-d3 {
68*8bc8824dSEmil Renner Berthing			pwms = <&pwm0 2 7812500 PWM_POLARITY_INVERTED>;
69*8bc8824dSEmil Renner Berthing			active-low;
70*8bc8824dSEmil Renner Berthing			color = <LED_COLOR_ID_GREEN>;
71*8bc8824dSEmil Renner Berthing			max-brightness = <255>;
72*8bc8824dSEmil Renner Berthing			label = "d3";
73*8bc8824dSEmil Renner Berthing		};
74*8bc8824dSEmil Renner Berthing
75*8bc8824dSEmil Renner Berthing		led-d4 {
76*8bc8824dSEmil Renner Berthing			pwms = <&pwm0 3 7812500 PWM_POLARITY_INVERTED>;
77*8bc8824dSEmil Renner Berthing			active-low;
78*8bc8824dSEmil Renner Berthing			color = <LED_COLOR_ID_GREEN>;
79*8bc8824dSEmil Renner Berthing			max-brightness = <255>;
80*8bc8824dSEmil Renner Berthing			label = "d4";
81*8bc8824dSEmil Renner Berthing		};
82*8bc8824dSEmil Renner Berthing	};
83c35f1b87SPaul Walmsley};
84c35f1b87SPaul Walmsley
8545b03df2SYash Shah&uart0 {
8645b03df2SYash Shah	status = "okay";
8745b03df2SYash Shah};
8845b03df2SYash Shah
8945b03df2SYash Shah&uart1 {
9045b03df2SYash Shah	status = "okay";
9145b03df2SYash Shah};
9245b03df2SYash Shah
9345b03df2SYash Shah&i2c0 {
9445b03df2SYash Shah	status = "okay";
9545b03df2SYash Shah};
9645b03df2SYash Shah
97c35f1b87SPaul Walmsley&qspi0 {
9845b03df2SYash Shah	status = "okay";
99c35f1b87SPaul Walmsley	flash@0 {
1008ce936c2SKrzysztof Kozlowski		compatible = "jedec,spi-nor";
101c35f1b87SPaul Walmsley		reg = <0>;
102c35f1b87SPaul Walmsley		spi-max-frequency = <50000000>;
103c35f1b87SPaul Walmsley		m25p,fast-read;
104c35f1b87SPaul Walmsley		spi-tx-bus-width = <4>;
105c35f1b87SPaul Walmsley		spi-rx-bus-width = <4>;
106c35f1b87SPaul Walmsley	};
107c35f1b87SPaul Walmsley};
108c35f1b87SPaul Walmsley
109c35f1b87SPaul Walmsley&qspi2 {
110c35f1b87SPaul Walmsley	status = "okay";
111c35f1b87SPaul Walmsley	mmc@0 {
112c35f1b87SPaul Walmsley		compatible = "mmc-spi-slot";
113c35f1b87SPaul Walmsley		reg = <0>;
114c35f1b87SPaul Walmsley		spi-max-frequency = <20000000>;
115c35f1b87SPaul Walmsley		voltage-ranges = <3300 3300>;
116c35f1b87SPaul Walmsley		disable-wp;
1176331b876SBin Meng		gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
118c35f1b87SPaul Walmsley	};
119c35f1b87SPaul Walmsley};
12026091eefSYash Shah
12126091eefSYash Shah&eth0 {
12226091eefSYash Shah	status = "okay";
12326091eefSYash Shah	phy-mode = "gmii";
12426091eefSYash Shah	phy-handle = <&phy0>;
12526091eefSYash Shah	phy0: ethernet-phy@0 {
126be969b7cSSagar Shrikant Kadam		compatible = "ethernet-phy-id0007.0771";
12726091eefSYash Shah		reg = <0>;
12826091eefSYash Shah	};
12926091eefSYash Shah};
130b45e0c30SYash Shah
131b45e0c30SYash Shah&pwm0 {
132b45e0c30SYash Shah	status = "okay";
133b45e0c30SYash Shah};
134b45e0c30SYash Shah
135b45e0c30SYash Shah&pwm1 {
136b45e0c30SYash Shah	status = "okay";
137b45e0c30SYash Shah};
13861ffb9d2SYash Shah
13961ffb9d2SYash Shah&gpio {
14061ffb9d2SYash Shah	status = "okay";
14161ffb9d2SYash Shah};
142