/linux/drivers/opp/ |
H A D | of.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2009-2010 Texas Instruments Incorporated. 34 /* "operating-points-v2" can be an array for power domain providers */ in _opp_of_get_opp_desc_node() 35 return of_parse_phandle(np, "operating-points-v2", index); in _opp_of_get_opp_desc_node() 41 return _opp_of_get_opp_desc_node(dev->of_node, 0); in dev_pm_opp_of_get_opp_desc_node() 50 np = _opp_of_get_opp_desc_node(dev->of_node, index); in _managed_opp() 55 if (opp_table->np == np) { in _managed_opp() 57 * Multiple devices can point to the same OPP table and in _managed_opp() 58 * so will have same node-pointer, np. in _managed_opp() 61 * OPP table contains a "opp-shared" property. in _managed_opp() [all …]
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/linux/drivers/cpufreq/ |
H A D | imx6q-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 11 #include <linux/nvmem-consumer.h> 83 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n", in imx6q_set_target() 116 * - Enable pll2_pfd2_396m_clk and reparent pll1_sw_clk to it in imx6q_set_target() 117 * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it in imx6q_set_target() 118 * - Disable pll2_pfd2_396m_clk in imx6q_set_target() 169 /* PLL1 is only needed until after ARM-PODF is set. */ in imx6q_set_target() 194 policy->clk = clks[ARM].clk; in imx6q_cpufreq_init() 196 policy->suspend_freq = max_freq; in imx6q_cpufreq_init() 209 .name = "imx6q-cpufreq", [all …]
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H A D | scmi-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2018-2021 ARM Ltd. 11 #include <linux/clk-provider.h> 50 priv = policy->driver_data; in scmi_cpufreq_get_rate() 52 ret = perf_ops->freq_get(ph, priv->domain_id, &rate, false); in scmi_cpufreq_get_rate() 59 * perf_ops->freq_set is not a synchronous, the actual OPP change will 66 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_set_target() 67 u64 freq = policy->freq_table[index].frequency; in scmi_cpufreq_set_target() local 69 return perf_ops->freq_set(ph, priv->domain_id, freq * 1000, false); in scmi_cpufreq_set_target() 75 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_fast_switch() [all …]
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/linux/net/ipv6/ |
H A D | ip6_flowlabel.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 36 /* FL hash table */ 49 /* FL hash table lock: it protects only of GC */ 57 DEFINE_STATIC_KEY_DEFERRED_FALSE(ipv6_flowlabel_exclusive, HZ); 63 fl = rcu_dereference(fl->next)) 65 for (fl = rcu_dereference(fl->next); \ 67 fl = rcu_dereference(fl->next)) 70 for (sfl = rcu_dereference(np->ipv6_fl_list); \ 72 sfl = rcu_dereference(sfl->next)) 79 if (fl->label == label && net_eq(fl->fl_net, net)) in __fl_lookup() [all …]
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/linux/drivers/media/dvb-frontends/ |
H A D | stv0900_priv.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 45 /* One point of the lookup table */ 51 /* Lookup table definition */ 53 s32 size;/* Size of the lookup table */ 54 struct stv000_lookpoint table[STV0900_MAXLOOKUPSIZE];/* Lookup table */ member 126 STV0900_BLIND_SEARCH,/* offset freq and SR are Unknown */ 128 STV0900_WARM_START/* offset freq and SR are known */ 226 u32 dmd_ref_clk;/* Reference,Input clock for the demod in Hz */ 255 u32 search_range;/* Range of the search (in Hz) */ 295 s32 freq[2]; member
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/linux/arch/arm/include/asm/ |
H A D | delay.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Copyright (C) 1995-2004 Russell King 5 * Delay routines, using a pre-computed "loops_per_second" value. 11 #include <asm/param.h> /* HZ */ 20 * jiffies_per_sec = HZ 23 * Therefore the constant part is HZ / 1000000 which is a small 32 * UDELAY_MULT = 2^31 * HZ / 1000000 33 * = (2^31 / 1000000) * HZ 34 * = 2147.483648 * HZ 35 * = 2147 * HZ + 483648 * HZ / 1000000 [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdm670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 12 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 13 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 14 #include <dt-bindings/clock/qcom,rpmh.h> 15 #include <dt-bindings/dma/qcom-gpi.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/interconnect/qcom,osm-l3.h> [all …]
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H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,rpm-icc.h> [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5422-odroid-core.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source 6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. 10 #include <dt-bindings/clock/samsung,s2mps11.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 14 #include "exynos5422-cpus.dtsi" 27 stdout-path = "serial2:115200n8"; 31 compatible = "samsung,secure-firmware"; 35 fixed-rate-clocks { [all …]
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/linux/arch/m68k/mac/ |
H A D | macboing.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Mac bong noise generator. Note - we ought to put a boingy noise 6 * ---------------------------------------------------------------------- 10 * Juergen Mellinger (juergen.mellinger@t-online.de) 23 * dumb triangular wave table 37 static unsigned long mac_bell_phase; /* 0..2*Pi -> 0..0x800 (wavetable size) */ 71 switch ( macintosh_config->ident ) in mac_init_asc() 99 * current location of the Apple Sound Chip--ASC--in other Macs.) The in mac_init_asc() 104 * Macintosh models have 16-bit audio input and output capability in mac_init_asc() 105 * because of the AT&T DSP3210 hardware circuitry and the 16-bit Singer in mac_init_asc() [all …]
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/linux/drivers/gpu/drm/loongson/ |
H A D | lsdc_pixpll.c | 1 // SPDX-License-Identifier: GPL-2.0+ 58 {148500, 1920, 1080, 60, 11, 49, 3}, /* 1920x1080@60Hz */ 59 {141750, 1920, 1080, 60, 11, 78, 5}, /* 1920x1080@60Hz */ 60 /* 1920x1080@50Hz */ 61 {174500, 1920, 1080, 75, 17, 89, 3}, /* 1920x1080@75Hz */ 62 {181250, 2560, 1080, 75, 8, 58, 4}, /* 2560x1080@75Hz */ 63 {297000, 2560, 1080, 30, 8, 95, 4}, /* 3840x2160@30Hz */ 64 {301992, 1920, 1080, 100, 10, 151, 5}, /* 1920x1080@100Hz */ 65 {146250, 1680, 1050, 60, 16, 117, 5}, /* 1680x1050@60Hz */ 66 {135000, 1280, 1024, 75, 10, 54, 4}, /* 1280x1024@75Hz */ [all …]
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/linux/include/linux/ |
H A D | pm_opp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2009-2010 Texas Instruments Incorporated. 32 * struct dev_pm_opp_supply - Power supply voltage/current values 58 * struct dev_pm_opp_config - Device OPP configuration values 87 * struct dev_pm_opp_data - The data to use to initialize an OPP. 91 * @freq: The clock rate in Hz fo 97 unsigned long freq; global() member 287 dev_pm_opp_find_freq_exact(struct device * dev,unsigned long freq,bool available) dev_pm_opp_find_freq_exact() argument 293 dev_pm_opp_find_freq_exact_indexed(struct device * dev,unsigned long freq,u32 index,bool available) dev_pm_opp_find_freq_exact_indexed() argument 300 dev_pm_opp_find_freq_floor(struct device * dev,unsigned long * freq) dev_pm_opp_find_freq_floor() argument 306 dev_pm_opp_find_freq_floor_indexed(struct device * dev,unsigned long * freq,u32 index) dev_pm_opp_find_freq_floor_indexed() argument 312 dev_pm_opp_find_freq_ceil(struct device * dev,unsigned long * freq) dev_pm_opp_find_freq_ceil() argument 318 dev_pm_opp_find_freq_ceil_indexed(struct device * dev,unsigned long * freq,u32 index) dev_pm_opp_find_freq_ceil_indexed() argument 366 dev_pm_opp_remove(struct device * dev,unsigned long freq) dev_pm_opp_remove() argument 375 dev_pm_opp_adjust_voltage(struct device * dev,unsigned long freq,unsigned long u_volt,unsigned long u_volt_min,unsigned long u_volt_max) dev_pm_opp_adjust_voltage() argument 382 dev_pm_opp_enable(struct device * dev,unsigned long freq) dev_pm_opp_enable() argument 387 dev_pm_opp_disable(struct device * dev,unsigned long freq) dev_pm_opp_disable() argument 471 dev_pm_opp_init_cpufreq_table(struct device * dev,struct cpufreq_frequency_table ** table) dev_pm_opp_init_cpufreq_table() argument 476 dev_pm_opp_free_cpufreq_table(struct device * dev,struct cpufreq_frequency_table ** table) dev_pm_opp_free_cpufreq_table() argument 592 dev_pm_opp_add(struct device * dev,unsigned long freq,unsigned long u_volt) dev_pm_opp_add() argument [all...] |
/linux/drivers/net/wireless/ath/ath5k/ |
H A D | phy.c | 2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org> 3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com> 4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com> 5 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org> 42 * Here we handle the low-level functions related to baseband 48 * - Channel setting/switching 50 * - Automatic Gain Control (AGC) calibration 52 * - Noise Floor calibration 54 * - I/Q imbalance calibration (QAM correction) 56 * - Calibration due to thermal changes (gain_F) [all …]
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/linux/Documentation/power/ |
H A D | opp.rst | 5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated 20 ------------------------------------------------- 22 Complex SoCs of today consists of a multiple sub-modules working in conjunction. 25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some 39 We can represent these as three OPPs as the following {Hz, uV} tuples: 41 - {300000000, 1000000} 42 - {800000000, 1200000} 43 - {1000000000, 1300000} 46 ---------------------------------------- 57 (users) -> registers a set of default OPPs -> (library) [all …]
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/linux/Documentation/devicetree/bindings/ufs/ |
H A D | cdns,ufshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jan Kotas <jank@cadence.com> 12 # Select only our matches, not all jedec,ufs-2.0 18 - cdns,ufshc 19 - cdns,ufshc-m31-16nm 21 - compatible 24 - $ref: ufs-common.yaml 29 - enum: [all …]
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H A D | renesas,ufs.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car UFS Host Controller 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 13 - $ref: ufs-common.yaml 17 const: renesas,r8a779f0-ufs 25 clock-names: 27 - const: fck 28 - const: ref_clk [all …]
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H A D | mediatek,ufs.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stanley Chu <stanley.chu@mediatek.com> 15 - mediatek,mt8183-ufshci 16 - mediatek,mt8192-ufshci 17 - mediatek,mt8195-ufshci 23 clock-names: 33 vcc-supply: true 35 mediatek,ufs-disable-mcq: [all …]
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H A D | hisilicon,ufs.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Li Wei <liwei213@huawei.com> 18 - hisilicon,hi3660-ufs 19 - hisilicon,hi3670-ufs 21 - compatible 24 - $ref: ufs-common.yaml 29 - items: 30 - const: hisilicon,hi3660-ufs [all …]
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H A D | ti,j721e-ufs.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vignesh Raghavendra <vigneshr@ti.com> 15 - const: ti,j721e-ufs 23 description: phandle to the M-PHY clock 25 power-domains: 28 assigned-clocks: 31 assigned-clock-parents: [all …]
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/linux/sound/soc/codecs/ |
H A D | peb2466.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // peb2466.c -- Infineon PEB2466 ALSA SoC driver 25 u8 (*table)[4]; member 42 u8 spi_tx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */ 43 u8 spi_rx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */ 136 .tx_buf = &peb2466->spi_tx_buf, in peb2466_write_byte() 140 peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W; in peb2466_write_byte() 141 peb2466->spi_tx_buf[1] = val; in peb2466_write_byte() 143 dev_dbg(&peb2466->spi->dev, "write byte (cmd %02x) %02x\n", in peb2466_write_byte() 144 peb2466->spi_tx_buf[0], peb2466->spi_tx_buf[1]); in peb2466_write_byte() [all …]
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/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | samsung,exynos-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses. 20 sub-blocks. 22 The Exynos SoC includes the various sub-blocks which have the each AXI bus. 24 line. The power line might be shared among one more sub-blocks. So, we can [all …]
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/linux/drivers/devfreq/ |
H A D | imx8m-ddrc.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <linux/clk-provider.h> 14 #include <linux/arm-smccc.h> 40 * +----------+ |\ +------+ 41 * | dram_pll |-------|M| dram_core | | 42 * +----------+ |U|---------->| D | 43 * /--|X| | D | 46 * +---------+ | | 48 * +---------+ | | 50 * +----------+ | | | [all …]
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/linux/drivers/soc/samsung/ |
H A D | exynos-asv.c | 1 // SPDX-License-Identifier: GPL-2.0 20 #include <linux/soc/samsung/exynos-chipid.h> 22 #include "exynos-asv.h" 23 #include "exynos5422-asv.h" 35 for (i = 0; i < ARRAY_SIZE(asv->subsys); i++) { in exynos_asv_update_cpu_opps() 36 if (of_device_is_compatible(cpu->of_node, in exynos_asv_update_cpu_opps() 37 asv->subsys[i].cpu_dt_compat)) { in exynos_asv_update_cpu_opps() 38 subsys = &asv->subsys[i]; in exynos_asv_update_cpu_opps() 43 return -EINVAL; in exynos_asv_update_cpu_opps() 45 for (i = 0; i < subsys->table.num_rows; i++) { in exynos_asv_update_cpu_opps() [all …]
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/linux/arch/arc/kernel/ |
H A D | setup.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 31 #include <asm/dsp-impl.h> 38 /* Part of U-boot ABI: see head.S */ 100 if (info->arcver < 0x34) in arcompact_mumbojumbo() 105 n += scnprintf(buf + n, len - n, "processor [%d]\t: %s (%s ISA) %s%s%s\n", in arcompact_mumbojumbo() 108 IS_AVAIL1(be, "[Big-Endian]")); in arcompact_mumbojumbo() 114 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n", in arcompact_mumbojumbo() 120 bpu_cache = 256 << (bpu.ent - 1); in arcompact_mumbojumbo() 121 bpu_pred = 256 << (bpu.ent - 1); in arcompact_mumbojumbo() [all …]
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/linux/arch/x86/include/asm/ |
H A D | sev.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 #include <linux/sev-guest.h> 15 #include <asm/sev-common.h> 74 u64 mask = (1ULL << bits) - 1; in lower_bits() 88 * Individual entries of the SNP CPUID table, as defined by the SNP 89 * Firmware ABI, Revision 0.9, Section 7.1, Table 14. 104 * SNP CPUID table, as defined by the SNP Firmware ABI, Revision 0.9, 105 * Section 8.14.2.6. Also noted there is the SNP firmware-enforced limit 106 * of 64 entries per CPUID table. 159 #define SNP_REQ_MAX_RETRY_DURATION (60*HZ) [all …]
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