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/linux/Documentation/devicetree/bindings/serial/
H A Dst,asc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrice Chotard <patrice.chotard@foss.st.com>
13 - $ref: serial.yaml#
28 st,hw-flow-ctrl:
32 st,force-m1:
33 description: When set, force asc to be in Mode-1. This is recommended for
38 - compatible
39 - reg
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/linux/tools/testing/selftests/tc-testing/tc-tests/infra/
H A Dqdiscs.json21 "ping -c1 -W0.01 -I $DUMMY 10.10.10.1 || true",
25 "cmdUnderTest": "ping -c1 -W0.01 -I $DUMMY 10.10.10.1",
27 "verifyCmd": "$TC -s qdisc ls dev $DUMMY",
51 "ping -c1 -W0.01 -I $DUMMY 10.10.10.1 || true",
55 "cmdUnderTest": "ping -c1 -W0.01 -I $DUMMY 10.10.10.1",
85 "ping -c1 -W0.01 -I $DUMMY 10.10.10.1 || true"
120 "cmdUnderTest": "ping -c1 -W0.01 -I $DUMMY 10.10.10.1",
148 "cmdUnderTest": "ping -c1 -W0.01 -I $DUMMY 10.10.11.11",
150 "verifyCmd": "$TC -j qdisc show dev $DUMMY",
158 "name": "Test TBF with SKBPRIO - catch qlen corner cases",
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/linux/include/linux/ssb/
H A Dssb_driver_chipcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
30 #define SSB_CHIPCO_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
52 #define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
115 #define SSB_CHIPCO_JCTL_FORCE_CLK 4 /* Force clock */
172 #define SSB_CHIPCO_SYSCLKCTL_FORCEALP 0x00000008 /* Force ALP (or HT if ALPen is not set */
173 #define SSB_CHIPCO_SYSCLKCTL_FORCEHT 0x00000010 /* Force HT */
190 #define SSB_CHIPCO_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
191 #define SSB_CHIPCO_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
192 #define SSB_CHIPCO_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
195 #define SSB_CHIPCO_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dnv04.c38 struct nvkm_subdev *subdev = &init->subdev; in nv04_devinit_meminit()
39 struct nvkm_device *device = subdev->device; in nv04_devinit_meminit()
115 int shift = -4; in powerctrl_1_shift()
137 shift = -4; in powerctrl_1_shift()
146 struct nvkm_device *device = init->subdev.device; in setPLL_single()
147 int chip_version = device->bios->version.chip; in setPLL_single()
150 uint32_t pll = (oldpll & 0xfff80000) | pv->log2P << 16 | pv->NM1; in setPLL_single()
164 if (oldM && pv->M1 && (oldN / oldM < pv->N1 / pv->M1)) in setPLL_single()
165 /* upclock -- write new post divider first */ in setPLL_single()
166 nvkm_wr32(device, reg, pv->log2P << 16 | (oldpll & 0xffff)); in setPLL_single()
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/linux/drivers/usb/mon/
H A Dmon_main.c1 // SPDX-License-Identifier: GPL-2.0
34 * This must be called with mon_lock taken because of mbus->ref.
41 spin_lock_irqsave(&mbus->lock, flags); in mon_reader_add()
42 if (mbus->nreaders == 0) { in mon_reader_add()
45 struct mon_bus *m1; in mon_reader_add() local
46 m1 = list_entry(p, struct mon_bus, bus_link); in mon_reader_add()
47 m1->u_bus->monitored = 1; in mon_reader_add()
50 mbus->u_bus->monitored = 1; in mon_reader_add()
53 mbus->nreaders++; in mon_reader_add()
54 list_add_tail(&r->r_link, &mbus->r_list); in mon_reader_add()
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/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
42 .m1 = {.min = 0, .max = 0},
54 .m1 = {.min = 0, .max = 0},
58 /* The single-channel range is 25-112Mhz, and dual-channel
59 * is 80-224Mhz. Prefer single channel as much as possible.
69 .m1 = {.min = 0, .max = 0},
81 .m1 = {.min = 0, .max = 0},
93 .m1 = {.min = 0, .max = 0},
105 .m1 = {.min = 0, .max = 0},
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/linux/drivers/i2c/busses/
H A Di2c-sh7760.c4 * (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com>
22 #include <asm/i2c-sh7760.h>
43 #define MCR_MDBS 0x80 /* non-fifo mode switch */
49 #define MCR_FSB 0x02 /* force stop bit */
104 __raw_writel(val, (unsigned long)cam->iobase + reg); in OUT32()
109 return __raw_readl((unsigned long)cam->iobase + reg); in IN32()
115 struct i2c_msg *msg = id->msg; in sh7760_i2c_irq()
116 char *data = msg->buf; in sh7760_i2c_irq()
127 id->status |= IDS_DONE | IDS_ARBLOST; in sh7760_i2c_irq()
145 id->status |= IDS_NACK; in sh7760_i2c_irq()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv50.c71 #define T(t) cfg->timing_10_##t
75 struct nvbios_ramcfg *cfg = &ram->base.target.bios; in nv50_ram_timing_calc()
76 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv50_ram_timing_calc()
77 struct nvkm_device *device = subdev->device; in nv50_ram_timing_calc()
86 switch ((!T(CWL)) * ram->base.type) { in nv50_ram_timing_calc()
88 T(CWL) = T(CL) - 1; in nv50_ram_timing_calc()
96 if (device->chipset == 0xa0) { in nv50_ram_timing_calc()
97 unkt3b = 0x19 + ram->base.next->bios.rammap_00_16_40; in nv50_ram_timing_calc()
98 timing[6] = (0x2d + T(CL) - T(CWL) + in nv50_ram_timing_calc()
99 ram->base.next->bios.rammap_00_16_40) << 16 | in nv50_ram_timing_calc()
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/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c4 * Copyright 2007-2009 Stuart Bennett
92 if (drm->client.device.info.chipset == 0x11) { in NVSetOwner()
103 if (drm->client.device.info.chipset == 0x11) { /* set me harder */ in NVSetOwner()
137 /* to force parsing as single stage (i.e. nv40 vplls) pass pll2 as 0 */ in nouveau_hw_decode_pll()
140 pllvals->log2P = (pll1 >> 16) & 0x7; in nouveau_hw_decode_pll()
141 pllvals->N2 = pllvals->M2 = 1; in nouveau_hw_decode_pll()
144 pllvals->NM1 = pll2 & 0xffff; in nouveau_hw_decode_pll()
147 pllvals->NM2 = pll2 >> 16; in nouveau_hw_decode_pll()
149 pllvals->NM1 = pll1 & 0xffff; in nouveau_hw_decode_pll()
151 pllvals->NM2 = pll2 & 0xffff; in nouveau_hw_decode_pll()
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/linux/drivers/bus/mhi/host/
H A Dpm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
9 #include <linux/dma-direction.h>
10 #include <linux/dma-mapping.h>
32 * L0: DISABLE <--> POR
33 * POR <--> POR
34 * POR -> M0 -> M2 --> M0
35 * POR -> FW_DL_ERR
36 * FW_DL_ERR <--> FW_DL_ERR
37 * M0 <--> M0
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/linux/drivers/clk/sunxi-ng/
H A Dccu-sun50i-a100.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
23 #include "ccu-sun50i-a100.h"
37 * For now we can just model it as a multiplier clock, and force P to /1.
41 * testing", so it's not modelled and then force to 0.
50 .hw.init = CLK_HW_INIT("pll-cpux", "dcxo24M",
66 .hw.init = CLK_HW_INIT("pll-ddr0", "dcxo24M",
84 .hw.init = CLK_HW_INIT("pll-periph0", "dcxo24M",
101 .hw.init = CLK_HW_INIT("pll-periph1", "dcxo24M",
117 .hw.init = CLK_HW_INIT("pll-gpu", "dcxo24M",
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H A Dccu-sun50i-h616.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
25 #include "ccu-sun50i-h616.h"
31 * For now we can just model it as a multiplier clock, and force P to /1.
35 * testing", so it's not modelled and then force to 0.
44 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
60 .hw.init = CLK_HW_INIT("pll-ddr0", "osc24M",
75 .hw.init = CLK_HW_INIT("pll-ddr1", "osc24M",
92 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
109 .hw.init = CLK_HW_INIT("pll-periph1", "osc24M",
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H A Dccu-sun20i-d1.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
26 #include "ccu-sun20i-d1.h"
43 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-cpux", osc24M,
59 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-ddr0", osc24M,
73 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-periph0-4x", osc24M,
82 static SUNXI_CCU_M_HWS(pll_periph0_2x_clk, "pll-periph0-2x",
84 static SUNXI_CCU_M_HWS(pll_periph0_800M_clk, "pll-periph0-800M",
90 static CLK_FIXED_FACTOR_HWS(pll_periph0_clk, "pll-periph0",
94 static CLK_FIXED_FACTOR_HWS(pll_periph0_div3_clk, "pll-periph0-div3",
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/linux/drivers/net/wireless/intel/iwlegacy/
H A D4965.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
15 #include <linux/dma-mapping.h>
29 * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
44 /* read data comes through single port, auto-incr addr */ in il4965_verify_inst_sparse()
50 ret = -EIO; in il4965_verify_inst_sparse()
61 * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
77 for (; len > 0; len -= sizeof(u32), image++) { in il4965_verify_inst_full()
78 /* read data comes through single port, auto-incr addr */ in il4965_verify_inst_full()
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/linux/scripts/kconfig/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
4 # These targets are used from top-level makefile
17 silent := -s
22 kernel-release := $(shell uname -r)
24 /lib/modules/$(kernel-release)/.config \
25 /etc/kernel-config \
26 /boot/config-$(kernel-release)
41 config-prog := conf
42 menuconfig-prog := mconf
43 nconfig-prog := nconf
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/linux/tools/lib/bpf/
H A Dlinker.c1 // SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
164 libbpf_print(LIBBPF_WARN, "libbpf: " fmt ": %s\n", ##__VA_ARGS__, elf_errmsg(-1))
197 free(linker->filename); in bpf_linker__free()
199 if (linker->elf) in bpf_linker__free()
200 elf_end(linker->elf); in bpf_linker__free()
202 if (linker->fd >= 0 && linker->fd_is_owned) in bpf_linker__free()
203 close(linker->fd); in bpf_linker__free()
205 strset__free(linker->strtab_strs); in bpf_linker__free()
207 btf__free(linker->btf); in bpf_linker__free()
208 btf_ext__free(linker->btf_ext); in bpf_linker__free()
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/linux/include/linux/
H A Dmhi.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
10 #include <linux/dma-direction.h>
27 * enum mhi_callback - MHI callback
51 * enum mhi_flags - Transfer flags
63 * enum mhi_device_type - Device types
73 * enum mhi_ch_type - Channel types
89 * struct mhi_buf - MHI Buffer description
92 * ECA - Event context array data
93 * CCA - Channel context array data
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/linux/drivers/usb/serial/
H A Df81534.c1 // SPDX-License-Identifier: GPL-2.0+
12 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
13 * for all serial port TX and 1 endpoint bulk-in for all serial port read in
122 * Bit2-1: Clock source selector
181 /* Pin output value for M2/M1/M0(SD) */
197 usb_get_serial_data(port->serial); in f81534_logic_to_phy_port()
202 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) in f81534_logic_to_phy_port()
205 if (port->port_number == count) in f81534_logic_to_phy_port()
211 return -ENODEV; in f81534_logic_to_phy_port()
216 struct usb_interface *interface = serial->interface; in f81534_set_register()
[all …]
/linux/drivers/input/mouse/
H A Dvsxxxaa.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for DEC VSXXX-AA mouse (hockey-puck mouse, ball or two rollers)
4 * DEC VSXXX-GA mouse (rectangular mouse, with ball)
5 * DEC VSXXX-AB tablet (digitizer with hair cross or stylus)
7 * Copyright (C) 2003-2004 by Jan-Benedict Glaw <jbglaw@lug-owl.de>
24 * supply at +5V and -12V.
30 * | 4 --- 3 |
32 * -------
35 * 1 (GND) 5 7 -
36 * 2 (RxD) 2 3 -
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/linux/drivers/acpi/nfit/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
25 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
28 #include <linux/io-64-nonatomic-hi-lo.h>
43 static int default_dsm_family = -1;
54 MODULE_PARM_DESC(force_labels, "Opt-in to labels despite missing methods");
92 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; in to_acpi_dev()
96 if (!nd_desc->provider_name in to_acpi_dev()
97 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) in to_acpi_dev()
101 * But it can be the ACPI companion of acpi_desc->dev when it cones from in to_acpi_dev()
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c98 PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), in cast_phw_vega10_power_state()
108 PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), in cast_const_phw_vega10_power_state()
117 struct vega10_hwmgr *data = hwmgr->backend; in vega10_set_default_registry_data()
119 data->registry_data.sclk_dpm_key_disabled = in vega10_set_default_registry_data()
120 hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
121 data->registry_data.socclk_dpm_key_disabled = in vega10_set_default_registry_data()
122 hwmgr->feature_mask & PP_SOCCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
123 data->registry_data.mclk_dpm_key_disabled = in vega10_set_default_registry_data()
124 hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
125 data->registry_data.pcie_dpm_key_disabled = in vega10_set_default_registry_data()
[all …]
/linux/drivers/tty/serial/
H A Dst-asc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * st-asc.c: ST Asynchronous serial controller (ASC) driver
5 * Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited
26 #define DRIVER_NAME "st-asc"
48 /*---- UART Register definitions ------------------------------*/
144 /*---- Inline function definitions ---------------------------*/
154 return readl_relaxed(port->membase + offset); in asc_in()
156 return readl(port->membase + offset); in asc_in()
163 writel_relaxed(value, port->membase + offset); in asc_out()
165 writel(value, port->membase + offset); in asc_out()
[all …]
/linux/drivers/net/wireless/broadcom/b43legacy/
H A Dphy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
14 driver Copyright(c) 2003 - 2004 Intel Corporation.
46 -7, -7, -7, -7,
47 -7, -7, -7, -7,
48 -7, -7, -7, -7,
65 5, -7, -20, -20,
66 -20, -20, -20, -20,
67 -20, -20, -20, -20,
77 B43legacy_WARN_ON(dev->phy.phy_locked); in b43legacy_phy_lock()
[all …]
/linux/drivers/comedi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
23 running at 10 kHz has of 2-4 seconds of buffer.
32 channels running at 100 kHz has 2-4 seconds of buffer.
41 the questions about misc non-hardware comedi drivers.
81 tristate "SSV Embedded Systems DIL/Net-PC support"
85 Enable support for SSV Embedded Systems DIL/Net-PC
106 tristate "Advantech PCL-711/711b and ADlink ACL-8112 ISA card support"
109 Enable support for Advantech PCL-711 and 711b, ADlink ACL-8112
115 tristate "Advantech PCL-722/724/731 and ADlink ACL-7122/7124/PET-48DIO"
123 Advantech PCL-724 24 channels
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_types.h3 * Copyright (c) 2007-2008 Intel Corporation
71 /* these are outputs from the chip - integrated only
89 HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */
90 HDMI_AUDIO_OFF, /* force turn off HDMI audio */
92 HDMI_AUDIO_ON, /* force turn on HDMI audio */
105 * create the DMA scatter-gather list for each FB color plane. This sg
117 * in the rotated and remapped GTT view all no-CCS formats (up to 2
225 * state. This must be called _after_ display->get_pipe_config has
226 * pre-fille
627 int m1, m2; global() member
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