/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | samsung,exynos-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC Bus and Interconnect 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 The Samsung Exynos SoC has many buses for data transfer between DRAM and 15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses. 16 Generally, each bus of Exynos SoC includes a source clock and a power line, [all …]
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/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos5433-bus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source 11 compatible = "samsung,exynos-bus"; 13 clock-names = "bus"; 14 operating-points-v2 = <&bus_g2d_400_opp_table>; 19 compatible = "samsung,exynos-bus"; 21 clock-names = "bus"; 22 operating-points-v2 = <&bus_g2d_266_opp_table>; 27 compatible = "samsung,exynos-bus"; 29 clock-names = "bus"; [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 bus_disp1: bus-disp1 { 38 compatible = "samsung,exynos-bus"; 40 clock-names = "bus"; 44 bus_disp1_fimd: bus-disp1-fimd { 45 compatible = "samsung,exynos-bus"; 47 clock-names = "bus"; [all …]
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H A D | exynos4210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 20 #include "exynos4-cpu-thermal.dtsi" 31 bus_acp: bus-acp { 32 compatible = "samsung,exynos-bus"; 34 clock-names = "bus"; 35 operating-points-v2 = <&bus_acp_opp_table>; 38 bus_acp_opp_table: opp-table { 39 compatible = "operating-points-v2"; [all …]
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H A D | exynos4x12.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 19 #include "exynos4-cpu-thermal.dtsi" 27 fimc-lite0 = &fimc_lite_0; 28 fimc-lite1 = &fimc_lite_1; 31 bus_acp: bus-acp { 32 compatible = "samsung,exynos-bus"; 34 clock-names = "bus"; 35 operating-points-v2 = <&bus_acp_opp_table>; 38 bus_acp_opp_table: opp-table { 39 compatible = "operating-points-v2"; [all …]
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H A D | exynos3250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include "exynos4-cpu-thermal.dtsi" 18 #include <dt-bindings/clock/exynos3250.h> 19 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 #include <dt-bindings/interrupt-controller/irq.h> 24 interrupt-parent = <&gic>; 25 #address-cells = <1>; 26 #size-cells = <1>; 46 bus_dmc: bus-dmc { 47 compatible = "samsung,exynos-bus"; [all …]
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H A D | exynos4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 19 #include <dt-bindings/clock/exynos4.h> 20 #include <dt-bindings/clock/exynos-audss-clk.h> 21 #include <dt-bindings/interrupt-controller/arm-gic.h> 22 #include <dt-bindings/interrupt-controller/irq.h> 25 interrupt-parent = <&gic>; 26 #address-cells = <1>; 27 #size-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/iommu/ |
H A D | samsung,sysmmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos IOMMU H/W, System MMU (System Memory Management Unit) 10 - Marek Szyprowski <m.szyprowski@samsung.com> 13 Samsung's Exynos architecture contains System MMUs that enables scattered 14 physical memory chunks visible as a contiguous region to DMA-capable peripheral 15 devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth. 20 another capabilities like L2 TLB or block-fetch buffers to minimize translation 24 peripheral device might have multiple System MMUs (usually one for each bus [all …]
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/linux/drivers/ufs/host/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0+ 5 # Copyright (C) 2011-2013 Samsung India Software Operations 12 tristate "PCI bus based UFS Controller support" 31 tristate "Platform bus based UFS Controller support" 35 you have an UFS controller on Platform bus. 45 This selects the Cadence-specific additions to UFSHCD platform driver. 120 tristate "Exynos specific hooks to UFS controller platform driver" 123 This selects the Samsung Exynos SoC specific additions to UFSHCD 124 platform driver. UFS host on Samsung Exynos SoC includes HCI and 125 UNIPRO layer, and associates with UFS-PHY driver. [all …]
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/linux/drivers/devfreq/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 20 to a device by 1-to-1. The device registering devfreq takes the 39 Simple-Ondemand should be able to provide busy/total counter 79 tristate "ARM Exynos Generic Memory Bus DEVFREQ Driver" 86 This adds the common DEVFREQ driver for Exynos Memory bus. Exynos 87 Memory bus has one more group of memory bus (e.g, MIF and INT block). 88 Each memory bus group could contain many memoby bus block. It reads 89 PPMU counters of memory controllers by using DEVFREQ-event device 94 tristate "i.MX Generic Bus DEVFREQ Driver"
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_PM_DEVFREQ) += devfreq.o 3 obj-$(CONFIG_PM_DEVFREQ_EVENT) += devfreq-event.o 4 obj-$(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND) += governor_simpleondemand.o 5 obj-$(CONFIG_DEVFREQ_GOV_PERFORMANCE) += governor_performance.o 6 obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE) += governor_powersave.o 7 obj-$(CONFIG_DEVFREQ_GOV_USERSPACE) += governor_userspace.o 8 obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o 11 obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o 12 obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o [all …]
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/linux/drivers/devfreq/event/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 bool "DEVFREQ-Event device Support" 5 The devfreq-event device provide the raw data and events which 6 indicate the current state of devfreq-event device. The provided 7 data from devfreq-event device is used to monitor the state of 11 The devfreq-event device can support the various type of events 18 tristate "Exynos NoC (Network On Chip) Probe DEVFREQ event Driver" 23 This add the devfreq-event driver for Exynos SoC. It provides NoC 24 (Network on Chip) Probe counters to measure the bandwidth of AXI bus. 27 tristate "Exynos PPMU (Platform Performance Monitoring Unit) DEVFREQ event Driver" [all …]
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/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | samsung,exynos-adc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos Analog to Digital Converter (ADC) 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 - enum: 16 - samsung,exynos-adc-v1 # Exynos5250 17 - samsung,exynos-adc-v2 18 - samsung,exynos3250-adc [all …]
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/linux/Documentation/devicetree/bindings/display/samsung/ |
H A D | samsung,exynos-mixer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-mixer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC Mixer 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 16 Samsung Exynos SoC Mixer is responsible for mixing and blending multiple data [all …]
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H A D | samsung,exynos-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC HDMI 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 18 - samsung,exynos4210-hdmi [all …]
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/linux/Documentation/devicetree/bindings/devfreq/event/ |
H A D | samsung,exynos-nocp.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-nocp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos NoC (Network on Chip) Probe 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 The Samsung Exynos542x SoC has a NoC (Network on Chip) Probe for NoC bus. 19 traffic debug or statistic collectors. Exynos542x bus has multiple NoC probes 25 const: samsung,exynos5420-nocp [all …]
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/linux/Documentation/admin-guide/media/ |
H A D | platform-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 use neither USB nor PCI bus. Those drivers are called platform 17 am437x-vpfe TI AM437x VPFE 18 aspeed-video Aspeed AST2400 and AST2500 19 atmel-isc ATMEL Image Sensor Controller (ISC) 20 atmel-isi ATMEL Image Sensor Interface (ISI) 24 cdns-csi2rx Cadence MIPI-CSI2 RX Controller 25 cdns-csi2tx Cadence MIPI-CSI2 TX Controller 26 coda-vpu Chips&Media Coda multi-standard codec IP 29 exynos-fimc-is EXYNOS4x12 FIMC-IS (Imaging Subsystem) [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | samsung,exynos-audss-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,exynos-audss-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC Audio SubSystem clock controller 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 - Tomasz Figa <tomasz.figa@gmail.com> 17 include/dt-bindings/clock/exynos-audss-clk.h header. [all …]
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H A D | samsung,exynosautov9-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos Auto v9 SoC clock controller 10 - Chanho Park <chanho61.park@samsung.com> 11 - Chanwoo Choi <cw00.choi@samsung.com> 12 - Krzysztof Kozlowski <krzk@kernel.org> 13 - Sylwester Nawrocki <s.nawrocki@samsung.com> 14 - Tomasz Figa <tomasz.figa@gmail.com> [all …]
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | samsung,s3c2410-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung S3C/S5P/Exynos SoC I2C Controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 - enum: 16 - samsung,s3c2410-i2c 17 - samsung,s3c2440-i2c 18 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs: [all …]
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/linux/drivers/gpu/drm/exynos/ |
H A D | exynos_drm_gem.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 19 * exynos drm buffer structure. 22 * - a new handle to this gem object would be created 29 * @dma_addr: bus address(accessed by dma) to allocated memory region. 30 * - this address could be physical address without IOMMU and 66 /* get fake-offset of gem object that can be used with mmap. */ 71 * get exynos drm object from gem handle, this function could be used for 79 * put exynos drm object acquired from exynos_drm_gem_get(), 84 drm_gem_object_put(&exynos_gem->base); in exynos_drm_gem_put() 99 /* low-level interface prime helpers */
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/linux/drivers/clk/samsung/ |
H A D | clk-exynos-arm64.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 * This file contains shared functions used by some arm64 Exynos SoCs, 18 #include "clk-exynos-arm64.h" 67 * exynos_arm64_init_clocks - Set clocks initial configuration 76 const unsigned long *reg_offs = cmu->clk_regs; in exynos_arm64_init_clocks() 77 size_t reg_offs_len = cmu->nr_clk_regs; in exynos_arm64_init_clocks() 89 if (cmu->manual_plls && is_pll_con1_reg(reg_offs[i])) { in exynos_arm64_init_clocks() 103 * exynos_arm64_enable_bus_clk - Enable parent clock of specified CMU 119 if (!cmu->clk_name) in exynos_arm64_enable_bus_clk() 125 parent_clk = clk_get(dev, cmu->clk_name); in exynos_arm64_enable_bus_clk() [all …]
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/linux/Documentation/devicetree/bindings/usb/ |
H A D | samsung,exynos-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/samsung,exynos-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 - samsung,exynos4210-ehci 16 - samsung,exynos4210-ohci 21 clock-names: 23 - const: usbhost [all …]
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/linux/drivers/usb/host/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 11 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role 28 module will be called xhci-hcd. 90 tristate "xHCI support for Renesas R-Car SoCs" 96 found in Renesas R-Car ARM SoCs. 132 modules will be called ohci-platform.ko, ehci-brcm.ko and 133 xhci-plat-hcd.ko 158 module will be called ehci-hcd. 164 Some EHCI chips have vendor-specific extensions to integrate 186 (possibly due to "ENOSPC" or "-28" errors), say Y. Conversely, if [all …]
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/linux/drivers/soc/samsung/ |
H A D | exynos3250-pmu.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd. 6 // Exynos3250 - CPU PMU (Power Management Unit) support 8 #include <linux/soc/samsung/exynos-regs-pmu.h> 9 #include <linux/soc/samsung/exynos-pmu.h> 11 #include "exynos-pmu.h" 14 /* { .offset = offset, .val = { AFTR, W-AFTR, SLEEP } */ 142 * To prevent from issuing new bus request form L2 memory system in exynos3250_pmu_init()
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