| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | samsung,exynosautov9-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanho Park <chanho61.park@samsung.com>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
20 two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
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| H A D | samsung,exynos8895-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos8895-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
18 is an external clock: OSCCLK (26 MHz). This external clock must be defined
19 as a fixed-rate clock in dts.
21 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
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| H A D | samsung,exynos850-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
20 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
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| H A D | google,gs101-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Griffin <peter.griffin@linaro.org>
16 is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate
19 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
25 'dt-bindings/clock/gs101.h' header.
30 - google,gs101-cmu-top
31 - google,gs101-cmu-apm
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| H A D | baikal,bt1-ccu-div.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-div.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 Clock Control Unit Dividers
11 - Serge Semin <fancer.lancer@gmail.com>
14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
16 connected with an external fixed rate oscillator, which signal is transformed
18 IP-blocks or to groups of blocks (clock domains). The transformation is done
19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The
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| H A D | samsung,exynos7885-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos7885-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dávid Virág <virag.david003@gmail.com>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
20 is an external clock: OSCCLK (26 MHz). This external clock must be defined
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| H A D | baikal,bt1-ccu-pll.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-pll.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 Clock Control Unit PLL
11 - Serge Semin <fancer.lancer@gmail.com>
14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
16 connected with an external fixed rate oscillator, which signal is transformed
18 IP-blocks or to groups of blocks (clock domains). The transformation is done
19 by means of PLLs and gateable/non-gateable dividers embedded into the CCU.
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| /linux/tools/perf/pmu-events/arch/x86/bonnell/ |
| H A D | other.json | 3 "BriefDescription": "Bus queue is empty.",
11 "BriefDescription": "Number of Bus Not Ready signals asserted.",
19 "BriefDescription": "Number of Bus Not Ready signals asserted.",
26 "BriefDescription": "Bus cycles while processor receives data.",
34 "BriefDescription": "Bus cycles when data is sent on the bus.",
42 "BriefDescription": "Bus cycles when data is sent on the bus.",
79 "BriefDescription": "IO requests waiting in the bus queue.",
87 "BriefDescription": "Bus cycles when a LOCK signal is asserted.",
95 "BriefDescription": "Bus cycles when a LOCK signal is asserted.",
103 "BriefDescription": "Outstanding cacheable data read bus requests duration.",
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| /linux/drivers/memory/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 access to attached peripherals through memory bus.
30 If you have an embedded system with an AMBA bus and a PL172
42 Used to configure the EBI (external bus interface) when the device-
43 tree is used. This bus supports NANDs, external ethernet controller,
68 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
72 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
73 resides Coherency Manager v2 with embedded 1MB L2-cache. It's
75 tags and way-select latencies of RAM access. This driver provides a
76 dt properties-based and sysfs interface for it.
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | pci.txt | 1 PCI bus bridges have standardized Device Tree bindings:
3 PCI Bus Binding to: IEEE Std 1275-1994
4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf
14 - linux,pci-domain:
21 - max-link-speed:
27 - reset-gpios:
30 - supports-clkreq:
34 not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
36 PCI-PCI Bridge properties
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| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | renesas,bsc.yaml | 2 ---
3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Renesas Bus State Controller (BSC)
9 - Geert Uytterhoeven <geert+renesas@glider.be>
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
13 Bridge", or "External Bus Interface") can be found in several Renesas ARM
14 SoCs. It provides an external bus for connecting multiple external
18 While the BSC is a fairly simple memory-mapped bus, it may be part of a
24 The bindings for the BSC extend the bindings for "simple-pm-bus".
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| H A D | qcom,ebi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ebi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm External Bus Interface 2 (EBI2)
11 external memory (such as NAND or other memory-mapped peripherals) whereas
14 As it says it connects devices to an external bus interface, meaning address
15 lines (up to 9 address lines so can only address 1KiB external memory space),
20 Apparently this bus is clocked at 64MHz. It has dedicated pins on the package
21 and the bus can only come out on these pins, however if some of the pins are
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| H A D | nvidia,tegra20-gmi.txt | 1 Device tree bindings for NVIDIA Tegra Generic Memory Interface bus
3 The Generic Memory Interface bus enables memory transfers between internal and
4 external memory. Can be used to attach various high speed devices such as
10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
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| /linux/drivers/net/dsa/mv88e6xxx/ |
| H A D | global2.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
21 return mv88e6xxx_read(chip, chip->info->global2_addr, reg, val); in mv88e6xxx_g2_read()
26 return mv88e6xxx_write(chip, chip->info->global2_addr, reg, val); in mv88e6xxx_g2_write()
32 return mv88e6xxx_wait_bit(chip, chip->info->global2_addr, reg, in mv88e6xxx_g2_wait_bit()
146 const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1; in mv88e6xxx_g2_trunk_mapping_write()
155 const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1; in mv88e6xxx_g2_trunk_clear()
212 /* Offset 0x0B: Cross-chip Port VLAN (Addr) Register
213 * Offset 0x0C: Cross-chip Port VLAN Data Register
228 /* 9-bit Cross-chip PVT pointer: with MV88E6XXX_G2_MISC_5_BIT_PORT in mv88e6xxx_g2_pvt_op()
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| /linux/drivers/net/mdio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "MDIO bus device drivers"
20 loadable module or built-in.
27 FWNODE MDIO bus (Ethernet PHY) accessors
35 OpenFirmware MDIO bus (Ethernet PHY) accessors
42 ACPI MDIO bus (Ethernet PHY) accessors
58 tristate "APM X-Gene SoC MDIO bus controller"
62 APM X-Gene SoC's.
65 tristate "ASPEED MDIO bus controller"
70 This module provides a driver for the independent MDIO bus
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| /linux/drivers/bus/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 # Bus Devices
6 menu "Bus devices"
24 bool "ARM Integrator Logic Module bus"
29 Say y here to enable support for the ARM Logic Module bus
33 tristate "Broadcom STB GISB bus arbiter"
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
39 and internal bus master decoding.
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-platform-mellanox-bootctl | 1 What: /sys/bus/platform/devices/MLNXBF04:00/lifecycle_state
6 The Life-cycle state of the SoC, which could be one of the
12 GA Non-Secured Non-Secure chip and not able to change state
16 What: /sys/bus/platform/devices/MLNXBF04:00/post_reset_wdog
25 What: /sys/bus/platform/devices/MLNXBF04:00/reset_action
34 external boot from external source (USB or PCIe)
39 What: /sys/bus/platform/devices/MLNXBF04:00/second_reset_action
49 external boot from external source (USB or PCIe)
56 What: /sys/bus/platform/devices/MLNXBF04:00/secure_boot_fuse_state
72 What: /sys/bus/platform/devices/MLNXBF04:00/bootfifo
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| /linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | marvell,mv88e6xxx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
22 - enum:
23 - marvell,mv88e6085
24 - marvell,mv88e6190
25 - marvell,mv88e6250
43 - items:
44 - const: marvell,turris-mox-mv88e6085
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| /linux/drivers/media/usb/cx231xx/ |
| H A D | cx231xx-pcb-cfg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 cx231xx-pcb-cfg.h - driver for Conexant
64 Digital or External Analog/Compressed source) */
67 External Analog/Compressed sources) */
69 to external clock */
76 NO_EXTERNAL_AV = 0x0, /* 0: No External A/V inputs
79 EXTERNAL_AV = 0x8 /* 1: External A/V inputs
87 Sound-IF Signals present */
94 BUS_POWER = 0x40 /* 1: bus power */
172 u8 type; /* bus power or self power,
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| /linux/Documentation/admin-guide/blockdev/ |
| H A D | paride.rst | 5 PARIDE v1.03 (c) 1997-8 Grant Guenther <grant@torque.net>
12 to personal computers, many external devices such as portable hard-disk,
13 CD-ROM, LS-120 and tape drives use the parallel port to connect to their
14 host computer. While some devices (notably scanners) use ad-hoc methods
16 external devices are actually identical to an internal model, but with
17 a parallel-port adapter chip added in. Some of the original parallel port
18 adapters were little more than mechanisms for multiplexing a SCSI bus.
19 (The Iomega PPA-3 adapter used in the ZIP drives is an example of this
21 The adapter chip reproduces a small ISA or IDE bus in the external device
25 controller like an NCR 5380. The "ditto" family of external tape
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| /linux/Documentation/driver-api/gpio/ |
| H A D | drivers-on-gpio.rst | 6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
30 an external speaker connected to a GPIO line. (If the beep is controlled by
31 off/on, for an actual PWM waveform, see pwm-gpio below.)
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-gmac
19 - const: allwinner,sun8i-v3s-emac
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| H A D | fsl,fman-mdio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 The MDIO is a bus to which the PHY devices are connected.
18 - fsl,fman-mdio
19 - fsl,fman-xmdio
20 - fsl,fman-memac-mdio
22 Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
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| /linux/tools/testing/selftests/drivers/net/netdevsim/ |
| H A D | udp_tunnel_nic.sh | 2 # SPDX-License-Identifier: GPL-2.0-only
6 NSIM_DEV_SYS=/sys/bus/netdevsim/devices/netdevsim$NSIM_ID
30 [ -e /sys/class/net/$dev ] && ip link del dev $dev
36 if [ -e $NSIM_DEV_SYS ]; then
37 echo $NSIM_ID > /sys/bus/netdevsim/del_device
58 [ "$ipver" != '6' ] || ipfl="-6"
60 [[ ! "$flags" =~ "external" ]] && flags="$flags id $((VNI_GEN++))"
84 [ "$ipver" != '6' ] || ipfl="-6"
86 [[ ! "$flags" =~ "external" ]] && flags="$flags vni $((VNI_GEN++))"
118 echo -e "port: $((val >> 16))\ttype: $((val & 0xffff))"
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| /linux/Documentation/iio/ |
| H A D | ad4695.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
26 ----------------
30 4-wire mode
35 .. code-block::
37 +-------------+ +-------------+
38 | CS |<-+------| CS |
39 | CNV |<-+ | |
42 | SDI |<--------| SDO |
43 | SDO |-------->| SDI |
44 | SCLK |<--------| SCLK |
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