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/linux/arch/xtensa/kernel/
H A Dvectors.S4 * This file contains all exception vectors (user, kernel, and double),
7 * exception occurs.
20 * We use a two-level table approach. The user and kernel exception vectors
21 * use a first-level dispatch table to dispatch the exception to a registered
23 * The default handler sets up a C-stack and dispatches the exception to a
36 * indicate that the exception is either a double or a regular exception:
38 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception
39 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
41 * Note: Neither the kernel nor the user exception handler generate literals.
60 * User exception vector. (Exceptions with PS.UM == 1, PS.EXCM == 0)
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H A Dentry.S2 * Low-level exception handling
90 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
93 * First-level exception handler for user exceptions.
96 * exception code.
109 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
110 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
242 /* Now, jump to the common exception handler. */
252 * MOVSP here, as we do that when we return from the exception.
253 * (See comment in the kernel exception exit code)
264 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
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/linux/drivers/acpi/acpica/
H A Dutexcep.c4 * Module Name: utexcep - Exception code support
23 * RETURN: A string containing the exception text. A valid pointer is
26 * DESCRIPTION: This function translates an ACPI exception into an ASCII
32 const struct acpi_exception_info *exception; in acpi_format_exception() local
36 exception = acpi_ut_validate_exception(status); in acpi_format_exception()
37 if (!exception) { in acpi_format_exception()
39 /* Exception code was not recognized */ in acpi_format_exception()
42 "Unknown exception code: 0x%8.8X", status)); in acpi_format_exception()
47 return (exception->name); in acpi_format_exception()
58 * RETURN: A string containing the exception text. NULL if exception is in ACPI_EXPORT_SYMBOL()
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/linux/arch/microblaze/kernel/
H A Dexceptions.c2 * HW exception handling
64 die("Exception in kernel mode", regs, signr); in _exception()
75 pr_warn("Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n", in full_exception()
83 pr_debug("Illegal opcode exception in user mode\n"); in full_exception()
87 pr_warn("Illegal opcode exception in kernel mode.\n"); in full_exception()
88 die("opcode exception", regs, SIGBUS); in full_exception()
92 pr_debug("Instruction bus error exception in user mode\n"); in full_exception()
96 pr_warn("Instruction bus error exception in kernel mode.\n"); in full_exception()
97 die("bus exception", regs, SIGBUS); in full_exception()
101 pr_debug("Data bus error exception in user mode\n"); in full_exception()
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H A Dhw_exception_handler.S3 * Exception handling for Microblaze
18 * Low-level exception handers, MMU support, and rewrite.
45 * Microblaze HW Exception Handler
46 * - Non self-modifying exception handler for the following exception conditions
53 * - Privileged instruction exception (MMU)
54 * - Data storage exception (MMU)
55 * - Instruction storage exception (MMU)
56 * - Data TLB miss exception (MMU)
57 * - Instruction TLB miss exception (MMU)
59 * Note we disable interrupts during exception handling, otherwise we will
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/linux/arch/powerpc/kernel/
H A Dhead_booke.h13 * Macros used for common Book-e exception handling
33 * entries are available for specific exception use in the event a handler
65 1 : subi r11, r11, INT_FRAME_SIZE; /* Allocate exception frame */ \
86 lis r10, STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
148 /* To handle the additional exception priority levels on Book-E
154 * GPR to use as the base for indirect access to the exception stacks. This
185 * Exception prolog for critical/machine check exceptions. This is a
186 * little different from the normal exception prolog above since a
187 * critical/machine check exception can potentially occur at any point
188 * during normal exception processing. Thus we cannot use the same SPRG
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H A Dhead_book3s_32.S9 * Low-level exception handlers and MMU support
182 * the exception vectors at 0 (and therefore this copy
183 * overwrites OF's exception vectors with our own).
241 EXCEPTION(INTERRUPT_SYSTEM_RESET, Reset, unknown_async_exception)
250 * a non-zero value, the address of the exception frame to use,
253 * (Other exception handlers assume that r1 is a valid kernel stack
254 * pointer when we take an exception from supervisor mode.)
277 /* Data access exception. */
311 /* Instruction access exception. */
341 EXCEPTION(INTERRUPT_EXTERNAL, HardwareInterrupt, do_IRQ)
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/linux/arch/arm/nwfpe/
H A Dfpsr.h18 EXCEPTION TRAP ENABLE BYTE
20 CUMULATIVE EXCEPTION FLAGS BYTE
37 /* EXCEPTION TRAP ENABLE BYTE
42 #define BIT_IXE 0x00100000 /* inexact exception enable */
43 #define BIT_UFE 0x00080000 /* underflow exception enable */
44 #define BIT_OFE 0x00040000 /* overflow exception enable */
45 #define BIT_DZE 0x00020000 /* divide by zero exception enable */
46 #define BIT_IOE 0x00010000 /* invalid operation exception enable */
58 #define BIT_NE 0x00000200 /* NaN exception bit */
61 /* CUMULATIVE EXCEPTION FLAGS BYTE
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/linux/arch/parisc/math-emu/
H A Ddecode_exc.c55 /* Exception register definitions */
110 /* exception_index is used to index the exception register queue. It in decode_fpu()
111 * always points at the last register that contains a valid exception. A in decode_fpu()
117 * Check for reserved-op exception. A reserved-op exception does not in decode_fpu()
118 * set any exception registers nor does it set the T-bit. If the T-bit in decode_fpu()
119 * is not set then a reserved-op exception occurred. in decode_fpu()
133 * Now we need to determine what type of exception occurred. in decode_fpu()
138 * On PA89: there are 5 different unimplemented exception in decode_fpu()
145 * Clear T-bit and exception register so that in decode_fpu()
160 * exception register contain the correct values in decode_fpu()
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/linux/tools/testing/selftests/powerpc/tm/
H A Dtm-unavailable.c5 * Force FP, VEC and VSX unavailable exception during transaction in all
11 * VEC/Altivec registers on abortion due to an unavailable exception in TM.
47 int exception; member
52 if (flags.touch_fp && flags.exception == FP_UNA_EXCEPTION) in expecting_failure()
55 if (flags.touch_vec && flags.exception == VEC_UNA_EXCEPTION) in expecting_failure()
60 * won't raise an exception. However since FP and VEC state are already in expecting_failure()
66 flags.exception == VSX_UNA_EXCEPTION) in expecting_failure()
113 if (flags.exception != FP_UNA_EXCEPTION && in tm_una_ping()
114 flags.exception != VEC_UNA_EXCEPTION && in tm_una_ping()
115 flags.exception != VSX_UNA_EXCEPTION) { in tm_una_ping()
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/linux/arch/m68k/fpsp040/
H A Dskeleton.S7 | Each entry point for exception 'xxxx' begins with a 'jmp fpsp_xxxx'.
10 | the 'fpsp_xxxx' handler entry point should be placed in the exception
12 | exception is one that must be reported then there will be a
16 | that caused the exception will still be pending when the FPSP
18 | to handle the exception.
20 | If the exception was completely handled by the package, then
58 | Divide by Zero exception
80 | Inexact exception
83 | will probably want to clear the pending exception.
84 | The provided code will clear the E3 exception (if pending),
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/linux/arch/m68k/ifpsp060/
H A Dfskeleton.S70 | This is the exit point for the 060FPSP when an enabled overflow exception
72 | for enabled overflow conditions. The exception stack frame is an overflow
75 | The sample routine below simply clears the exception status bit and
89 | This is the exit point for the 060FPSP when an enabled underflow exception
91 | for enabled underflow conditions. The exception stack frame is an underflow
94 | The sample routine below simply clears the exception status bit and
107 | This is the exit point for the 060FPSP when an enabled operand error exception
109 | for enabled operand error exceptions. The exception stack frame is an operand error
113 | The sample routine below simply clears the exception status bit and
126 | This is the exit point for the 060FPSP when an enabled signalling NaN exception
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/linux/security/
H A Ddevice_cgroup.c30 * exception list locking rules:
165 * dev_exception_clean - frees all entries of the exception list
166 * @dev_cgroup: dev_cgroup with the exception list to be cleaned
315 * match_exception - iterates the exception list trying to find a complete match
322 * It is considered a complete match if an exception is found that will
325 * Return: true in case it matches an exception completely
341 /* provided access cannot have more than the exception rule */ in match_exception()
350 * match_exception_partial - iterates the exception list trying to find a partial match
357 * It is considered a partial match if an exception's range is found to
360 * any of the exception list.
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/linux/tools/testing/selftests/drivers/net/
H A Dnetpoll_basic.py75 except (KeyError, IndexError) as exception:
77 f"Failed to read RX/TX ringsize: {exception}. Not going to mess with them."
78 ) from exception
108 except IndexError as exception:
110 f"Failed to read queues numbers: {exception}. Not going to mess with them."
111 ) from exception
133 except CmdExitFailure as exception:
135 f"Failed to configure RX/TX queues: {exception}. Ethtool not available?"
136 ) from exception
156 except OSError as exception:
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/linux/tools/testing/selftests/kvm/x86/
H A Dnested_exceptions_test.c20 * Bit '0' is set on Intel if the exception occurs while delivering a previous
21 * event/exception. AMD's wording is ambiguous, but presumably the bit is set
22 * if the exception occurs while delivering an external event, e.g. NMI or INTR,
141 * VMX disallows injecting an exception with error_code[31:16] != 0, in l1_vmx_code()
196 TEST_ASSERT(!events.exception.pending, in queue_ss_exception()
197 "Vector %d unexpectedlt pending", events.exception.nr); in queue_ss_exception()
198 TEST_ASSERT(!events.exception.injected, in queue_ss_exception()
199 "Vector %d unexpectedly injected", events.exception.nr); in queue_ss_exception()
202 events.exception.pending = !inject; in queue_ss_exception()
203 events.exception.injected = inject; in queue_ss_exception()
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/linux/arch/openrisc/include/asm/
H A Dspr_defs.h216 #define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */
217 #define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */
227 #define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */
228 #define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */
229 #define SPR_SR_EPH 0x00004000 /* Exception Prefix High */
477 #define SPR_DSR_RSTE 0x00000001 /* Reset exception */
478 #define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */
479 #define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */
480 #define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */
481 #define SPR_DSR_TTE 0x00000010 /* Tick Timer exception */
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/linux/Documentation/translations/zh_CN/process/
H A Dlicense-rules.rst101 // SPDX-License-Identifier: GPL-2.0 WITH mif-exception
102 // SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
265 LICENSES/exceptions/GCC-exception-2.0
274 - SPDX-Exception-Identifier:
291 - Exception-Text:
297 SPDX-Exception-Identifier: Linux-syscall-note
301 This exception is used together with one of the above SPDX-Licenses
304 To use this exception add it with the keyword WITH to one of the
307 Exception-Text:
308 Full exception text
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/linux/arch/mips/kernel/
H A Dgenex.S27 * General exception vector for all other CPUs.
30 * to fit into space reserved for the exception handler.
46 * General exception handler for CPUs with virtual coherency exception.
49 * exception) bytes to fit into space reserved for the exception handler.
74 * c0_badvaddr because after return from this exception handler the
248 * This is a dedicated interrupt exception vector which reduces the
253 * to fit into space reserved for the exception handler.
260 * EJTAG debug exception handler.
261 * The EJTAG debug exception entry point is 0xbfc00480, which
354 * EJTAG debug exception handler.
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/linux/Documentation/translations/zh_TW/process/
H A Dlicense-rules.rst102 // SPDX-License-Identifier: GPL-2.0 WITH mif-exception
103 // SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
266 LICENSES/exceptions/GCC-exception-2.0
275 - SPDX-Exception-Identifier:
292 - Exception-Text:
298 SPDX-Exception-Identifier: Linux-syscall-note
302 This exception is used together with one of the above SPDX-Licenses
305 To use this exception add it with the keyword WITH to one of the
308 Exception-Text:
309 Full exception text
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/linux/arch/x86/math-emu/
H A Derrors.c27 #include "exception.h"
68 EXCEPTION(EX_Invalid);
136 printk("SW: exception summary\n"); in FPU_printall()
315 /* Set lots of exception bits! */ in FPU_exception()
320 /* Set the corresponding exception bit */ in FPU_exception()
322 /* Set summary bits iff exception isn't masked */ in FPU_exception()
343 printk("FP Exception: %s!\n", exception_names[i].name); in FPU_exception()
346 printk("FPU emulator: Unknown Exception: 0x%04x!\n", n); in FPU_exception()
373 /* Returns < 0 if the exception is unmasked */
390 EXCEPTION(EX_Invalid); in real_1op_NaN()
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/linux/arch/s390/pci/
H A Dpci_insn.c159 int cc, exception; in ____pcilg() local
162 exception = 1; in ____pcilg()
170 [req_off] "+d" (req_off.pair), [exc] "+d" (exception) in ____pcilg()
175 return exception ? -ENXIO : CC_TRANSFORM(cc); in ____pcilg()
228 int cc, exception; in __pcilg_mio() local
231 exception = 1; in __pcilg_mio()
239 [ioaddr_len] "+d" (ioaddr_len.pair), [exc] "+d" (exception) in __pcilg_mio()
244 return exception ? -ENXIO : CC_TRANSFORM(cc); in __pcilg_mio()
267 int cc, exception; in __pcistg() local
269 exception = 1; in __pcistg()
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/linux/drivers/s390/cio/
H A Dioasm.c22 int ccode, exception; in __stsch() local
24 exception = 1; in __stsch()
32 : CC_OUT(cc, ccode), [addr] "=Q" (*addr), [exc] "+d" (exception) in __stsch()
35 return exception ? -EIO : CC_TRANSFORM(ccode); in __stsch()
52 int ccode, exception; in __msch() local
54 exception = 1; in __msch()
62 : CC_OUT(cc, ccode), [exc] "+d" (exception) in __msch()
65 return exception ? -EIO : CC_TRANSFORM(ccode); in __msch()
106 int ccode, exception; in __ssch() local
108 exception = 1; in __ssch()
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/linux/arch/arm64/kvm/hyp/
H A Dexception.c69 * This performs the exception entry at a given EL (@target_mode), stashing PC
74 * When an exception is taken, most PSTATE fields are left unchanged in the
133 // PSTATE.UAO is set to zero upon any exception to AArch64 in enter_exception64()
143 // PSTATE.SS is set to zero upon any exception to AArch64 in enter_exception64()
146 // PSTATE.IL is set to zero upon any exception to AArch64 in enter_exception64()
149 // PSTATE.SSBS is set to SCTLR_ELx.DSSBS upon any exception to AArch64 in enter_exception64()
154 // PSTATE.BTYPE is set to zero upon any exception to AArch64 in enter_exception64()
169 * When an exception is taken, most CPSR fields are left unchanged in the
200 // CPSR.IT[7:0] are set to zero upon any exception in get_except32_cpsr()
206 // CPSR.SSBS is set to SCTLR.DSSBS upon any exception in get_except32_cpsr()
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/linux/arch/s390/kernel/
H A Dtraps.c87 die(regs, "Unknown program exception"); in default_trap_handler()
96 DO_ERROR_INFO(addressing_exception, SIGILL, ILL_ILLADR, "addressing exception")
97 DO_ERROR_INFO(divide_exception, SIGFPE, FPE_INTDIV, "fixpoint divide exception")
98 DO_ERROR_INFO(execute_exception, SIGILL, ILL_ILLOPN, "execute exception")
99 DO_ERROR_INFO(hfp_divide_exception, SIGFPE, FPE_FLTDIV, "HFP divide exception")
100 DO_ERROR_INFO(hfp_overflow_exception, SIGFPE, FPE_FLTOVF, "HFP overflow exception")
101 DO_ERROR_INFO(hfp_significance_exception, SIGFPE, FPE_FLTRES, "HFP significance exception")
102 DO_ERROR_INFO(hfp_sqrt_exception, SIGFPE, FPE_FLTINV, "HFP square root exception")
103 DO_ERROR_INFO(hfp_underflow_exception, SIGFPE, FPE_FLTUND, "HFP underflow exception")
104 DO_ERROR_INFO(operand_exception, SIGILL, ILL_ILLOPN, "operand exception")
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/linux/arch/arc/kernel/
H A Dentry-arcv2.S29 # Initial 16 slots are Exception Vectors
31 VECTOR mem_service ; Mem exception
39 VECTOR EV_Trap ; Trap exception
40 VECTOR EV_Extension ; Extn Instruction Exception
98 ;################### Non TLB Exception Handling #############################
119 ; Memory Error Exception Handler
121 ; Instruction fetch or Data access, under a single Exception Vector
149 ; Protection Violation Exception Handler
182 # reenabled after we return from interrupt/exception.
190 breq r11, 0, .Lexcept_ret ; No intr active, ret from Exception
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