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/linux/Documentation/devicetree/bindings/net/
H A Dethernet-phy-package.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy-package.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ethernet PHY Package Common Properties
10 - Christian Marangi <ansuelsmth@gmail.com>
13 PHY packages are multi-port Ethernet PHY of the same family
14 and each Ethernet PHY is affected by the global configuration
15 of the PHY package.
17 Each reg of the PHYs defined in the PHY package node is
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H A Dqcom,qca807x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QCA807x Ethernet PHY
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Robert Marko <robert.marko@sartura.hr>
14 Qualcomm QCA8072/5 Ethernet PHY is PHY package of 2 or 5
15 IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
16 1000BASE-T PHY-s.
21 Both models have a combo port that supports 1000BASE-X and
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H A Dicplus-ip101ag.txt1 IC Plus Corp. IP101A / IP101G Ethernet PHYs
3 There are different models of the IP101G Ethernet PHY:
4 - IP101GR (32-pin QFN package)
5 - IP101G (die only, no package)
6 - IP101GA (48-pin LQFP package)
8 There are different models of the IP101A Ethernet PHY (which is the
10 - IP101A (48-pin LQFP package)
11 - IP101AH (48-pin LQFP package)
13 Optional properties for the IP101GR (32-pin QFN package):
15 - icplus,select-rx-error:
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/linux/Documentation/firmware-guide/acpi/dsd/
H A Dphy.rst1 .. SPDX-License-Identifier: GPL-2.0
7 The PHYs on an MDIO bus [phy] are probed and registered using
14 for connecting PHYs on the MDIO bus [dsd-properties-rules] to the MAC layer.
17 Properties UUID For _DSD" [dsd-guide] document and the
18 daffd814-6eba-4d8c-8a91-bc9bbf4aa301 UUID must be used in the Device
21 phy-handle
22 ----------
23 For each MAC node, a device property "phy-handle" is used to reference
24 the PHY that is registered on an MDIO bus. This is mandatory for
30 .. code-block:: none
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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
14 describing a port needs to have a valid phandle referencing the internal PHY
15 it is connected to. This is because there is no N:N mapping of port and PHY
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
20 mdio-bus configurations are not supported by the hardware.
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/linux/drivers/net/mdio/
H A Dof_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OF helpers for the MDIO (Ethernet PHY) API
7 * This file provides helper functions for extracting PHY device information
21 #include <linux/phy.h>
28 MODULE_DESCRIPTION("OpenFirmware MDIO bus (Ethernet PHY) accessors");
30 /* Extract the clause 22 phy ID from the compatible string of the form
31 * ethernet-phy-idAAAA.BBBB */
37 int of_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, in of_mdiobus_phy_device_register() argument
40 return fwnode_mdiobus_phy_device_register(mdio, phy, in of_mdiobus_phy_device_register()
67 device_set_node(&mdiodev->dev, fwnode); in of_mdiobus_register_device()
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/linux/drivers/net/phy/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # PHY Layer Configuration
12 PHYlink models the link between the PHY and MAC, allowing fixed
17 tristate "PHY Device support and infrastructure"
22 Ethernet controllers are usually attached to PHY
24 managing PHY devices.
35 Adds support for a set of LED trigger events per-PHY. Link
38 supported by the PHY and also a one common "link" trigger as a
39 logical-or of all the link speed ones.
41 <mii bus id>:<phy>:<speed>
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H A Dphy_device.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Also contains generic PHY driver
29 #include <linux/phy.h>
33 #include <linux/pse-pd/pse.h>
43 MODULE_DESCRIPTION("PHY library");
252 put_device(&phydev->mdio.dev); in phy_device_free()
266 fwnode_handle_put(dev->fwnode); in phy_device_release()
294 struct device_driver *drv = phydev->mdio.dev.driver; in mdio_bus_phy_may_suspend()
296 struct net_device *netdev = phydev->attached_dev; in mdio_bus_phy_may_suspend()
298 if (!drv || !phydrv->suspend) in mdio_bus_phy_may_suspend()
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H A Dmdio_bus.c1 // SPDX-License-Identifier: GPL-2.0+
28 #include <linux/phy.h>
40 #include "mdio-boardinfo.h"
45 mdiodev->reset_gpio = gpiod_get_optional(&mdiodev->dev, in mdiobus_register_gpiod()
47 if (IS_ERR(mdiodev->reset_gpio)) in mdiobus_register_gpiod()
48 return PTR_ERR(mdiodev->reset_gpio); in mdiobus_register_gpiod()
50 if (mdiodev->reset_gpio) in mdiobus_register_gpiod()
51 gpiod_set_consumer_name(mdiodev->reset_gpio, "PHY reset"); in mdiobus_register_gpiod()
60 reset = reset_control_get_optional_exclusive(&mdiodev->dev, "phy"); in mdiobus_register_reset()
64 mdiodev->reset_ctrl = reset; in mdiobus_register_reset()
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/linux/arch/arm/boot/dts/gemini/
H A Dgemini-dlink-dns-313.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/thermal/thermal.h>
13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure";
14 compatible = "dlink,dns-313", "cortina,gemini";
15 #address-cells = <1>;
16 #size-cells = <1>;
19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */
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/linux/include/linux/
H A Dphy.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
82 * Set phydev->irq to PHY_POLL if interrupts are not supported,
83 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
86 #define PHY_POLL -1
87 #define PHY_MAC_INTERRUPT -2
96 * enum phy_interface_t - Interface Mode definitions
98 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
99 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
100 * @PHY_INTERFACE_MODE_MII: Media-independent interface
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/linux/arch/powerpc/boot/dts/
H A Dmpc5121ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
17 * stacked package.
32 compatible = "cfi-flash";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 bank-width = <4>;
37 device-width = <2>;
42 read-only;
52 device-tree@3ec0000 {
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/linux/Documentation/networking/devlink/
H A Ddevlink-info.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
7 The ``devlink-info`` mechanism enables device drivers to report device
10 The original motivation for the ``devlink-info`` API was twofold:
12 - making it possible to automate device and firmware management in a fleet
13 of machines in a vendor-independent fashion (see also
14 :ref:`Documentation/networking/devlink/devlink-flash.rst <devlink_flash>`);
15 - name the per component FW versions (as opposed to the crowded ethtool
18 ``devlink-info`` supports reporting multiple types of objects. Reporting driver
19 versions is generally discouraged - here, and via any other Linux API.
21 .. list-table:: List of top level info objects
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H A Dice.rst1 .. SPDX-License-Identifier: GPL-2.0
13 .. list-table:: Generic parameters implemented
16 * - Name
17 - Mode
18 - Notes
19 * - ``enable_roce``
20 - runtime
21 - mutually exclusive with ``enable_iwarp``
22 * - ``enable_iwarp``
23 - runtime
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/linux/Documentation/netlink/specs/
H A Ddpll.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
8 -
16 -
20 -
23 render-max: true
24 -
26 name: lock-status
31 -
37 -
41 -
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/linux/Documentation/devicetree/bindings/bus/
H A Dqcom,ebi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 external memory (such as NAND or other memory-mapped peripherals) whereas
20 Apparently this bus is clocked at 64MHz. It has dedicated pins on the package
25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
32 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
33 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
34 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018-2023, Intel Corporation. */
4 /* Intel(R) Ethernet Connection E800 Series Linux Driver */
31 #define DRV_SUMMARY "Intel(R) Ethernet Connection E800 Series Linux Driver"
35 /* DDP Package file located in firmware search paths (e.g. /lib/firmware/) */
44 static int debug = -1;
56 * ice_hw_to_dev - Get device pointer from the hardware structure
67 return &pf->pdev->dev; in ice_hw_to_dev()
90 return dev && (dev->netdev_ops == &ice_netdev_ops || in netif_is_ice()
91 dev->netdev_ops == &ice_netdev_safe_mode_ops); in netif_is_ice()
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/linux/drivers/bcma/
H A Dscan.c15 #include <linux/dma-mapping.h>
55 { BCMA_CORE_ETHERNET, "Fast Ethernet" },
68 { BCMA_CORE_PHY_A, "PHY A" },
69 { BCMA_CORE_PHY_B, "PHY B" },
70 { BCMA_CORE_PHY_G, "PHY G" },
78 { BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
79 { BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
81 { BCMA_CORE_PHY_N, "PHY N" },
84 { BCMA_CORE_PHY_LP, "PHY LP" },
86 { BCMA_CORE_PHY_SSN, "PHY SSN" },
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/linux/drivers/ssb/
H A Dscan.c5 * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch>
6 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
40 return "Fast Ethernet"; in ssb_core_name()
78 return "SATA XOR-DMA"; in ssb_core_name()
80 return "GBit Ethernet"; in ssb_core_name()
82 return "PCI-E"; in ssb_core_name()
84 return "MIMO PHY"; in ssb_core_name()
103 switch (pci_dev->device) { in pcidev_to_chipid()
128 dev_err(&pci_dev->dev, "PCI-ID not in fallback list\n"); in pcidev_to_chipid()
165 switch (bus->bustype) { in scan_read32()
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-orangepi-5-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,vop2.h>
13 #include <dt-bindings/usb/pd.h>
18 compatible = "xunlong,orangepi-5-plus", "rockchip,rk3588";
26 stdout-path = "serial2:1500000n8";
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H A Drk3588s-odroid-m2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
9 #include <dt-bindings/usb/pd.h>
13 model = "Hardkernel ODROID-M2";
14 compatible = "hardkernel,odroid-m2", "rockchip,rk3588s";
23 stdout-path = "serial2:1500000n8";
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/linux/net/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 when running on a stand-alone machine that isn't connected to any
20 contained in the package net-tools, the location and version number
24 recommended to read the NET-HOWTO, available from
42 achieve this, you need to set skb_shinfo(skb)->frag_list to the
47 compat-independent messages instead!
106 to the KUnit documentation in Documentation/dev-tools/kunit/.
115 other computer. You will get the so-called loopback device which
126 <file:Documentation/networking/ip-sysctl.rst>.
149 bool "Timestamping in PHY devices"
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/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
17 #include <linux/phy.h>
18 #include <linux/pcs/pcs-xpcs.h>
58 #define STMMAC_GET_ENTRY(x, size) ((x + 1) & (size - 1))
276 #define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */
281 #define DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */
291 #define DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 */
292 #define DMA_HW_FEAT_TSVER2SEL 0x00002000 /* IEEE 1588-2008 PTPv2 */
293 #define DMA_HW_FEAT_EEESEL 0x00004000 /* Energy Efficient Ethernet */
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/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_common.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
15 * i40e_set_mac_type - Sets MAC type
25 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) { in i40e_set_mac_type()
26 switch (hw->device_id) { in i40e_set_mac_type()
47 hw->mac.type = I40E_MAC_XL710; in i40e_set_mac_type()
56 hw->mac.type = I40E_MAC_X722; in i40e_set_mac_type()
59 hw->mac.type = I40E_MAC_GENERIC; in i40e_set_mac_type()
63 status = -ENODEV; in i40e_set_mac_type()
67 hw->mac.type, status); in i40e_set_mac_type()
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/linux/drivers/net/dsa/qca/
H A Dqca8k.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
63 /* This reg is only valid for QCA832x and toggle the package
92 #define QCA8K_LED_COUNT ((QCA8K_NUM_PORTS - QCA8K_NUM_CPU_PORTS) * QCA8K_LED_PORT_COUNT)
97 #define QCA8K_LED_PHY123_PATTERN_EN_SHIFT(_phy, _led) ((((_phy) - 1) * 6) + 8 + (2 * (_led)))
280 /* 0x704 for TRUNK 0-1 --- 0x708 for TRUNK 2-3 */
463 struct net_device *mgmt_conduit; /* Track if mdio/mib Ethernet is available */
489 * Port 0 has no internal phy. in qca8k_port_to_phy()
490 * Port 1 has an internal PHY at MDIO address 0. in qca8k_port_to_phy()
491 * Port 2 has an internal PHY at MDIO address 1. in qca8k_port_to_phy()
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