/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | mediatek-net.txt | 10 - compatible: Should be 11 "mediatek,mt2701-eth": for MT2701 SoC 12 "mediatek,mt7623-eth", "mediatek,mt2701-eth": for MT7623 SoC 13 "mediatek,mt7622-eth": for MT7622 SoC 14 "mediatek,mt7629-eth": for MT7629 SoC 15 "ralink,rt5350-eth": for Ralink Rt5350F and MT7628/88 SoC 16 - reg: Address and length of the register set for the device 17 - interrupts: Should contain the three frame engines interrupts in numeric 19 - clocks: the clock used by the core 20 - clock-names: the names of the clock listed in the clocks property. These are [all …]
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H A D | mediatek,net.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Bianconi <lorenzo@kernel.org> 11 - Felix Fietkau <nbd@nbd.name> 20 - mediatek,mt2701-eth 21 - mediatek,mt7623-eth 22 - mediatek,mt7621-eth 23 - mediatek,mt7622-eth 24 - mediatek,mt7629-eth [all …]
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H A D | qca,ar71xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: QCA AR71XX MAC 10 - $ref: ethernet-controller.yaml# 13 - Oleksij Rempel <o.rempel@pengutronix.de> 18 - items: 19 - enum: 20 - qca,ar7100-eth # Atheros AR7100 21 - qca,ar7240-eth # Atheros AR7240 [all …]
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H A D | airoha,en7581-eth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/airoha,en7581-eth.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Bianconi <lorenzo@kernel.org> 14 These SoCs have multi-GMAC ports. 19 - airoha,en7581-eth 23 - description: Frame engine base address 24 - description: QDMA0 base address 25 - description: QDMA1 base address [all …]
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H A D | stm32-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Alexandre Torgue <alexandre.torgue@foss.st.com> 12 - Christophe Roullier <christophe.roullier@foss.st.com> 23 - st,stm32-dwmac 24 - st,stm32mp1-dwmac 25 - st,stm32mp13-dwmac 26 - st,stm32mp25-dwmac [all …]
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H A D | marvell-orion-net.txt | 12 set of controller registers. Each port node describes port-specific properties. 16 only one port associated. Multiple ports are implemented as multiple single-port 23 - #address-cells: shall be 1. 24 - #size-cells: shall be 0. 25 - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth". 26 - reg: address and length of the controller registers. 29 - clocks: phandle reference to the controller clock. 30 - marvell,tx-checksum-limit: max tx packet size for hardware checksum. 35 - compatible: shall be one of "marvell,orion-eth-port", 36 "marvell,kirkwood-eth-port". [all …]
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H A D | mediatek,star-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek STAR Ethernet MAC Controller 10 - Bartosz Golaszewski <bgolaszewski@baylibre.com> 13 This Ethernet MAC is used on the MT8* family of SoCs from MediaTek. 14 It's compliant with 802.3 standards and supports half- and full-duplex 15 modes with flow-control as well as CRC offloading and VLAN tags. 18 - $ref: ethernet-controller.yaml# [all …]
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H A D | actions,owl-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/actions,owl-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Actions Semi Owl SoCs Ethernet MAC Controller 10 - Cristian Ciocaltea <cristian.ciocaltea@gmail.com> 13 This Ethernet MAC is used on the Owl family of SoCs from Actions Semi. 15 IEEE 802.3 CSMA/CD standard, supporting both half-duplex and full-duplex 19 - $ref: ethernet-controller.yaml# 24 - const: actions,owl-emac [all …]
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H A D | lpc-eth.txt | 4 - compatible: Should be "nxp,lpc-eth" 5 - reg: Address and length of the register set for the device 6 - interrupts: Should contain ethernet controller interrupt 9 - phy-mode: See ethernet.txt file in the same directory. If the property is 11 - use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering 14 - mdio : specifies the mdio bus, used as a container for phy nodes according to 20 mac: ethernet@31060000 { 21 compatible = "nxp,lpc-eth"; 23 interrupt-parent = <&mic>; 26 phy-mode = "rmii"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
H A D | mt7629-rfb.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 26 button-rese [all...] |
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
H A D | mt7530.txt | 6 - compatible: may be compatible = "mediatek,mt7530" 9 - #address-cells: Must be 1. 10 - #size-cells: Must be 0. 11 - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part 12 on multi-chip module belong to MT7623A has or the remotely standalone 17 - core-supply: Phandle to the regulator node necessary for the core power. 18 - io-supply: Phandle to the regulator node necessary for the I/O power. 19 See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt 24 - reset-gpios: Should be a gpio specifier for a reset line. 28 - resets : Phandle pointing to the system reset controller with [all …]
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H A D | ar9331.txt | 1 Atheros AR9331 built-in switch 4 It is a switch built-in to Atheros AR9331 WiSoC and addressable over internal 5 MDIO bus. All PHYs are built-in as well. 9 - compatible: should be: "qca,ar9331-switch" 10 - reg: Address on the MII bus for the switch. 11 - resets : Must contain an entry for each entry in reset-names. 12 - reset-names : Must include the following entries: "switch" 13 - interrupt-parent: Phandle to the parent interrupt controller 14 - interrupts: IRQ line for the switch 15 - interrupt-controller: Indicates the switch is itself an interrupt [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_l2.c | 2 * Copyright (c) 2017-2018 Cavium, Inc. 79 p_l2_info = OSAL_VZALLOC(p_hwfn->p_dev, sizeof(*p_l2_info)); in ecore_l2_alloc() 82 p_hwfn->p_l2_info = p_l2_info; in ecore_l2_alloc() 84 if (IS_PF(p_hwfn->p_dev)) { in ecore_l2_alloc() 85 p_l2_info->queues = RESC_NUM(p_hwfn, ECORE_L2_QUEUE); in ecore_l2_alloc() 92 p_l2_info->queues = (u32)OSAL_MAX_T(u8, rx, tx); in ecore_l2_alloc() 95 pp_qids = OSAL_VZALLOC(p_hwfn->p_dev, in ecore_l2_alloc() 97 p_l2_info->queues); in ecore_l2_alloc() 100 p_l2_info->pp_qid_usage = pp_qids; in ecore_l2_alloc() 102 for (i = 0; i < p_l2_info->queues; i++) { in ecore_l2_alloc() [all …]
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/freebsd/sys/dev/mlx4/mlx4_ib/ |
H A D | mlx4_ib_ah.c | 14 * - Redistributions of source code must retain the above 18 * - Redistributions in binary form must reproduce the above 47 struct ib_pd *pd = ib_ah->pd; in create_ib_ah() 49 struct mlx4_dev *dev = to_mdev(ib_ah->device)->dev; in create_ib_ah() 51 ah->av.ib.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24)); in create_ib_ah() 52 ah->av.ib.g_slid = ah_attr->src_path_bits; in create_ib_ah() 53 ah->av.ib.sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28); in create_ib_ah() 54 if (ah_attr->ah_flags & IB_AH_GRH) { in create_ib_ah() 55 ah->av.ib.g_slid |= 0x80; in create_ib_ah() 56 ah->av.ib.gid_index = ah_attr->grh.sgid_index; in create_ib_ah() [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt7986b-rfb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 12 chassis-type = "embedded"; 13 compatible = "mediatek,mt7986b-rfb", "mediatek,mt7986b"; 20 stdout-path = "serial0:115200n8"; 33 ð { 36 gmac0: mac@0 { 37 compatible = "mediatek,eth-mac"; 39 phy-mode = "2500base-x"; 41 fixed-link { [all …]
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H A D | mt7622-rfb1.dts | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 18 chassis-type = "embedded"; 19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-supply = <&mt6380_vcpu_reg>; 33 sram-supply = <&mt6380_vm_reg>; 37 proc-supply = <&mt6380_vcpu_reg>; [all …]
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H A D | mt7986a-acelink-ew-7886cax.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/leds/common.h> 11 compatible = "acelink,ew-7886cax", "mediatek,mt7986a"; 12 model = "Acelink EW-7886CAX"; 19 stdout-path = "serial0:115200n8"; 28 compatible = "gpio-keys"; 30 key-restart { [all …]
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H A D | mt7986a-rfb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/pinctrl/mt65xx.h> 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a"; 22 stdout-path = "serial0:115200n8"; 30 reg_1p8v: regulator-1p8v { 31 compatible = "regulator-fixed"; 32 regulator-name = "fixed-1.8V"; 33 regulator-min-microvolt = <1800000>; [all …]
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H A D | mt7622-bananapi-bpi-r64.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 17 model = "Bananapi BPI-R64"; 18 chassis-type = "embedded"; 19 compatible = "bananapi,bpi-r64", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-supply = <&mt6380_vcpu_reg>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/edac/ |
H A D | socfpga-eccmgr.txt | 8 - compatible : Should be "altr,socfpga-ecc-manager" 9 - #address-cells: must be 1 10 - #size-cells: must be 1 11 - ranges : standard definition, should translate from local addresses 17 - compatible : Should be "altr,socfpga-l2-ecc" 18 - reg : Address and size for ECC error interrupt clear registers. 19 - interrupts : Should be single bit error interrupt, then double bit error 24 - compatible : Should be "altr,socfpga-ocram-ecc" 25 - reg : Address and size for ECC error interrupt clear registers. 26 - iram : phandle to On-Chip RAM definition. [all …]
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/freebsd/tests/sys/netinet6/ |
H A D | scapyi386.py | 2 #- 3 # SPDX-License-Identifier: BSD-2-Clause 39 description="IPv6 Ethernet Dest MAC test") 40 parser.add_argument('--sendif', nargs=1, 43 parser.add_argument('--recvif', nargs=1, 46 parser.add_argument('--src', nargs=1, 49 parser.add_argument('--to', nargs=1, 52 parser.add_argument('--debug', 61 # (resolved) Ethernet Destination MAC address instead of the BCAST one. 73 eth = pkt.getlayer(sp.Ether) [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | kmeter1.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * 2008-2011 DENX Software Engineering GmbH 8 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 28 #address-cells = <1>; 29 #size-cells = <0>; 34 d-cache-line-size = <32>; // 32 bytes 35 i-cache-line-size = <32>; // 32 bytes 36 d-cache-size = <32768>; // L1, 32K [all …]
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/freebsd/sys/contrib/device-tree/src/mips/qca/ |
H A D | ar9331.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ath79-clk.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 22 cpuintc: interrupt-controller { 23 compatible = "qca,ar7100-cpu-intc"; 25 interrupt-controller; 26 #interrupt-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am654-idk.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include "k3-pinctrl.h" 17 ethernet3 = "/icssg0-eth/ethernet-ports/port@0"; 18 ethernet4 = "/icssg0-eth/ethernet-ports/port@1"; 19 ethernet5 = "/icssg1-eth/ethernet-ports/port@0"; 20 ethernet6 = "/icssg1-eth/ethernet-ports/port@1"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | kirkwood.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/gpio/gpio.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 11 interrupt-parent = <&intc>; 14 #address-cells = <1>; 15 #size-cells = <0>; 22 clock-names = "cpu_clk", "ddrclk", "powersave"; 33 compatible = "marvell,kirkwood-mbus", "simple-bus"; [all …]
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