Home
last modified time | relevance | path

Searched +full:emmc +full:- +full:pins (Results 1 – 25 of 314) sorted by relevance

12345678910>>...13

/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3368-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
13 mmc0 = &emmc;
17 stdout-path = "serial2:115200n8";
26 compatible = "pwm-backlight";
27 brightness-levels = <
60 default-brightness-level = <128>;
61 enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
[all …]
H A Drk3368-orion-r68-meta.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
17 mmc1 = &emmc;
21 stdout-path = "serial2:115200n8";
29 emmc_pwrseq: emmc-pwrseq {
30 compatible = "mmc-pwrseq-emmc";
31 pinctrl-0 = <&emmc_reset>;
32 pinctrl-names = "default";
[all …]
H A Drk3368-r88.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
17 mmc1 = &emmc;
21 stdout-path = "serial2:115200n8";
29 emmc_pwrseq: emmc-pwrseq {
30 compatible = "mmc-pwrseq-emmc";
31 pinctrl-0 = <&emmc_reset>;
32 pinctrl-names = "default";
33 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
[all …]
H A Dpx30-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
14 compatible = "rockchip,px30-evb", "rockchip,px30";
20 mmc2 = &emmc;
24 stdout-pat
[all...]
H A Dpx30-ringneck.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
12 mmc0 = &emmc;
18 emmc_pwrseq: emmc-pwrseq {
19 compatible = "mmc-pwrseq-emmc";
20 pinctrl-0 = <&emmc_reset>;
21 pinctrl-names = "default";
22 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
26 compatible = "gpio-leds";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 chassis-type = "embedded";
19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
33 sram-supply = <&mt6380_vm_reg>;
37 proc-supply = <&mt6380_vcpu_reg>;
[all …]
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
14 mmc0 = &emmc;
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
[all …]
H A Drk3288-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
8 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
36 leds: user-leds {
[all …]
H A Drv1126-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <arm64/rockchip/rockchip-pinconf.dtsi>
15 /omit-if-no-ref/
16 clk_out_ethernetm1_pins: clk-out-ethernetm1-pins {
17 rockchip,pins =
22 emmc {
23 /omit-if-no-ref/
24 emmc_rstnout: emmc-rstnout {
25 rockchip,pins =
[all …]
H A Drk3288-veyron-pinky.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "../cros-ec-sbs.dtsi"
14 compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",
17 /delete-node/backlight-regulator;
18 /delete-node/panel-regulator;
19 /delete-node/emmc-pwrseq;
20 /delete-node/vcc18-lcd;
24 /delete-property/power-supply;
[all …]
H A Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
24 enable-method = "rockchip,rk3066-smp";
28 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
[all …]
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
H A Drk3188.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3188-cru.h>
10 #include <dt-bindings/power/rk3188-power.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
24 next-level-cache = <&L2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dpoplar-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/pinctrl/hisi.h>
19 emmc_pins_1: emmc-pins-1 {
20 pinctrl-single,pins = <
31 pinctrl-single,bias-pulldown = <
34 pinctrl-single,bias-pullup = <
37 pinctrl-single,slew-rate = <
40 pinctrl-single,drive-strength = <
45 emmc_pins_2: emmc-pins-2 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Drzg2l-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irqc-rzg2l.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 /* SW1[2] should be at position 2/OFF to enable 64 GB eMMC */
13 #define EMMC 1 macro
18 * Disable eMMC by setting "#define EMMC 0" above.
20 #define SDHI (!EMMC)
38 reg_1p8v: regulator-1p8v {
39 compatible = "regulator-fixed";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmediatek,mt7986-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctr
[all...]
H A Dsunplus,sp7021-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dvorkin Dmitry <dvorkin@tibbo.com>
12 - Wells Lu <wellslutw@gmail.com>
15 The Sunplus SP7021 pin controller is used to control SoC pins. Please
16 refer to pinctrl-bindings.txt in this directory for details of the common
19 SP7021 has 99 digital GPIO pins which are numbered from GPIO 0 to 98. All
20 are multiplexed with some special function pins. SP7021 has 3 types of
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-s4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/meson-s4-gpio.h>
10 #include <dt-bindings/clock/amlogic,s4-pll-clkc.h>
11 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
12 #include <dt-bindings/power/meson-s4-power.h>
13 #include <dt-bindings/reset/amlogic,meson-s4-reset.h>
17 #address-cells = <2>;
[all …]
H A Dmeson-gxl-s905x-khadas-vim.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxl-s905x-p212.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/sound/meson-aiu.h>
13 compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
16 adc-keys {
17 compatible = "adc-keys";
18 io-channels = <&saradc 0>;
19 io-channel-names = "buttons";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/microchip/
H A Dsparx5_pcb134_emmc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Sparx5 PCB134 Reference Board (eMMC enabled)";
11 compatible = "microchip,sparx5-pcb134", "microchip,sparx5";
20 emmc_pins: emmc-pins {
24 pins = "GPIO_34", "GPIO_38", "GPIO_39",
28 drive-strength = <3>;
29 function = "emmc";
35 pinctrl-0 = <&emmc_pins>;
36 non-removable;
[all …]
H A Dsparx5_pcb135_emmc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Sparx5 PCB135 Reference Board (eMMC enabled)";
11 compatible = "microchip,sparx5-pcb135", "microchip,sparx5";
20 emmc_pins: emmc-pins {
24 pins = "GPIO_34", "GPIO_38", "GPIO_39",
28 drive-strength = <3>;
29 function = "emmc";
35 pinctrl-0 = <&emmc_pins>;
36 non-removable;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-dbx5x0-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-nomadik-pinctrl.dtsi"
17 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
28 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
32 pins = "GPIO1_AJ3"; /* RTS */
36 pins = "GPIO3_AH3"; /* TXD */
49 pins = "GPIO4_AH6"; /* RXD */
53 pins = "GPIO5_AG6"; /* TXD */
60 pins = "GPIO4_AH6"; /* RXD */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-ccimx6ulsbcpro.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "imx6ul-ccimx6ulsom.dtsi"
20 compatible = "pwm-backlight";
22 brightness-levels = <0 4 8 16 32 64 128 255>;
23 default-brightness-level = <6>;
29 power-supply = <&ldo4_ext>;
34 remote-endpoint = <&display_out>;
[all …]
H A Dimx6ull-tarragon-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
5 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
14 mmc0 = &usdhc2; /* eMMC */
18 stdout-path = &uart4;
26 emmc_pwrseq: emmc-pwrseq {
27 compatible = "mmc-pwrseq-emmc";
28 pinctrl-0 = <&pinctrl_emmc_rst>;
[all …]

12345678910>>...13