1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 OR MIT 2*f126890aSEmmanuel Vadot// 3*f126890aSEmmanuel Vadot// Copyright (C) 2023 chargebyte GmbH 4*f126890aSEmmanuel Vadot 5*f126890aSEmmanuel Vadot/dts-v1/; 6*f126890aSEmmanuel Vadot 7*f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h> 8*f126890aSEmmanuel Vadot#include <dt-bindings/leds/common.h> 9*f126890aSEmmanuel Vadot#include <dt-bindings/pwm/pwm.h> 10*f126890aSEmmanuel Vadot#include "imx6ull.dtsi" 11*f126890aSEmmanuel Vadot 12*f126890aSEmmanuel Vadot/ { 13*f126890aSEmmanuel Vadot aliases { 14*f126890aSEmmanuel Vadot mmc0 = &usdhc2; /* eMMC */ 15*f126890aSEmmanuel Vadot }; 16*f126890aSEmmanuel Vadot 17*f126890aSEmmanuel Vadot chosen { 18*f126890aSEmmanuel Vadot stdout-path = &uart4; 19*f126890aSEmmanuel Vadot }; 20*f126890aSEmmanuel Vadot 21*f126890aSEmmanuel Vadot memory@80000000 { 22*f126890aSEmmanuel Vadot device_type = "memory"; 23*f126890aSEmmanuel Vadot reg = <0x80000000 0x20000000>; 24*f126890aSEmmanuel Vadot }; 25*f126890aSEmmanuel Vadot 26*f126890aSEmmanuel Vadot emmc_pwrseq: emmc-pwrseq { 27*f126890aSEmmanuel Vadot compatible = "mmc-pwrseq-emmc"; 28*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_emmc_rst>; 29*f126890aSEmmanuel Vadot pinctrl-names = "default"; 30*f126890aSEmmanuel Vadot reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; 31*f126890aSEmmanuel Vadot }; 32*f126890aSEmmanuel Vadot 33*f126890aSEmmanuel Vadot reg_dcdc_3v3: regulator-dcdc-3v3 { 34*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 35*f126890aSEmmanuel Vadot regulator-name = "dcdc-3v3"; 36*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 37*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 38*f126890aSEmmanuel Vadot regulator-boot-on; 39*f126890aSEmmanuel Vadot regulator-always-on; 40*f126890aSEmmanuel Vadot }; 41*f126890aSEmmanuel Vadot 42*f126890aSEmmanuel Vadot reg_1v8: regulator-1v8 { 43*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 44*f126890aSEmmanuel Vadot regulator-name = "ldo-1v8"; 45*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 46*f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 47*f126890aSEmmanuel Vadot regulator-boot-on; 48*f126890aSEmmanuel Vadot regulator-always-on; 49*f126890aSEmmanuel Vadot }; 50*f126890aSEmmanuel Vadot 51*f126890aSEmmanuel Vadot leds { 52*f126890aSEmmanuel Vadot compatible = "gpio-leds"; 53*f126890aSEmmanuel Vadot pinctrl-names = "default"; 54*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_status_leds>; 55*f126890aSEmmanuel Vadot 56*f126890aSEmmanuel Vadot led-1 { 57*f126890aSEmmanuel Vadot function = LED_FUNCTION_BOOT; 58*f126890aSEmmanuel Vadot color = <LED_COLOR_ID_GREEN>; 59*f126890aSEmmanuel Vadot gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 60*f126890aSEmmanuel Vadot linux,default-trigger = "timer"; 61*f126890aSEmmanuel Vadot }; 62*f126890aSEmmanuel Vadot 63*f126890aSEmmanuel Vadot led-2 { 64*f126890aSEmmanuel Vadot function = LED_FUNCTION_PROGRAMMING; 65*f126890aSEmmanuel Vadot color = <LED_COLOR_ID_YELLOW>; 66*f126890aSEmmanuel Vadot gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; 67*f126890aSEmmanuel Vadot }; 68*f126890aSEmmanuel Vadot 69*f126890aSEmmanuel Vadot led-3 { 70*f126890aSEmmanuel Vadot function = LED_FUNCTION_HEARTBEAT; 71*f126890aSEmmanuel Vadot color = <LED_COLOR_ID_RED>; 72*f126890aSEmmanuel Vadot gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; 73*f126890aSEmmanuel Vadot linux,default-trigger = "heartbeat"; 74*f126890aSEmmanuel Vadot }; 75*f126890aSEmmanuel Vadot }; 76*f126890aSEmmanuel Vadot}; 77*f126890aSEmmanuel Vadot 78*f126890aSEmmanuel Vadot&adc1 { 79*f126890aSEmmanuel Vadot pinctrl-names = "default"; 80*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_adc_motor 81*f126890aSEmmanuel Vadot &pinctrl_adc_cp 82*f126890aSEmmanuel Vadot &pinctrl_adc_pp>; 83*f126890aSEmmanuel Vadot vref-supply = <&vgen1_reg>; 84*f126890aSEmmanuel Vadot status = "okay"; 85*f126890aSEmmanuel Vadot}; 86*f126890aSEmmanuel Vadot 87*f126890aSEmmanuel Vadot&cpu0 { 88*f126890aSEmmanuel Vadot clock-frequency = <792000000>; 89*f126890aSEmmanuel Vadot}; 90*f126890aSEmmanuel Vadot 91*f126890aSEmmanuel Vadot&ecspi2 { 92*f126890aSEmmanuel Vadot #address-cells = <1>; 93*f126890aSEmmanuel Vadot #size-cells = <0>; 94*f126890aSEmmanuel Vadot pinctrl-names = "default"; 95*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi2>; 96*f126890aSEmmanuel Vadot num-cs = <3>; 97*f126890aSEmmanuel Vadot cs-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH 98*f126890aSEmmanuel Vadot &gpio3 2 GPIO_ACTIVE_HIGH 99*f126890aSEmmanuel Vadot &gpio3 4 GPIO_ACTIVE_HIGH>; 100*f126890aSEmmanuel Vadot}; 101*f126890aSEmmanuel Vadot 102*f126890aSEmmanuel Vadot&ecspi4 { 103*f126890aSEmmanuel Vadot #address-cells = <1>; 104*f126890aSEmmanuel Vadot #size-cells = <0>; 105*f126890aSEmmanuel Vadot pinctrl-names = "default"; 106*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi4>; 107*f126890aSEmmanuel Vadot num-cs = <1>; 108*f126890aSEmmanuel Vadot cs-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>; 109*f126890aSEmmanuel Vadot}; 110*f126890aSEmmanuel Vadot 111*f126890aSEmmanuel Vadot&fec1 { 112*f126890aSEmmanuel Vadot pinctrl-names = "default"; 113*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet1 114*f126890aSEmmanuel Vadot &pinctrl_enet1_phy_rst 115*f126890aSEmmanuel Vadot &pinctrl_enet_mdio>; 116*f126890aSEmmanuel Vadot phy-supply = <®_dcdc_3v3>; 117*f126890aSEmmanuel Vadot phy-mode = "rmii"; 118*f126890aSEmmanuel Vadot phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>; 119*f126890aSEmmanuel Vadot phy-reset-duration = <25>; 120*f126890aSEmmanuel Vadot phy-handle = <ðphy0>; 121*f126890aSEmmanuel Vadot 122*f126890aSEmmanuel Vadot mdio { 123*f126890aSEmmanuel Vadot #address-cells = <1>; 124*f126890aSEmmanuel Vadot #size-cells = <0>; 125*f126890aSEmmanuel Vadot 126*f126890aSEmmanuel Vadot ethphy0: ethernet-phy@0 { 127*f126890aSEmmanuel Vadot compatible = "ethernet-phy-ieee802.3-c22"; 128*f126890aSEmmanuel Vadot reg = <0>; 129*f126890aSEmmanuel Vadot pinctrl-names = "default"; 130*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet1_phy_int>; 131*f126890aSEmmanuel Vadot interrupt-parent = <&gpio2>; 132*f126890aSEmmanuel Vadot interrupts = <7 IRQ_TYPE_EDGE_FALLING>; 133*f126890aSEmmanuel Vadot interrupts-extended = <&gpio2 7 IRQ_TYPE_EDGE_FALLING>; 134*f126890aSEmmanuel Vadot clocks = <&clks IMX6UL_CLK_ENET_REF>; 135*f126890aSEmmanuel Vadot clock-names = "rmii-ref"; 136*f126890aSEmmanuel Vadot max-speed = <100>; 137*f126890aSEmmanuel Vadot smsc,disable-energy-detect; 138*f126890aSEmmanuel Vadot }; 139*f126890aSEmmanuel Vadot }; 140*f126890aSEmmanuel Vadot}; 141*f126890aSEmmanuel Vadot 142*f126890aSEmmanuel Vadot&gpio1 { 143*f126890aSEmmanuel Vadot gpio-line-names = "", /* 0 */ 144*f126890aSEmmanuel Vadot "", 145*f126890aSEmmanuel Vadot "", 146*f126890aSEmmanuel Vadot "", 147*f126890aSEmmanuel Vadot "", 148*f126890aSEmmanuel Vadot "", /* 5 */ 149*f126890aSEmmanuel Vadot "", 150*f126890aSEmmanuel Vadot "", 151*f126890aSEmmanuel Vadot "", 152*f126890aSEmmanuel Vadot "", 153*f126890aSEmmanuel Vadot "", /* 10 */ 154*f126890aSEmmanuel Vadot "", 155*f126890aSEmmanuel Vadot "", 156*f126890aSEmmanuel Vadot "CP_INVERT", 157*f126890aSEmmanuel Vadot "", 158*f126890aSEmmanuel Vadot "", /* 15 */ 159*f126890aSEmmanuel Vadot "", 160*f126890aSEmmanuel Vadot "", 161*f126890aSEmmanuel Vadot "", 162*f126890aSEmmanuel Vadot "MOTOR_1_FAULT_N", 163*f126890aSEmmanuel Vadot "", /* 20 */ 164*f126890aSEmmanuel Vadot "", 165*f126890aSEmmanuel Vadot "ROTARY_SWITCH_1_2_N", 166*f126890aSEmmanuel Vadot "ROTARY_SWITCH_1_4_N", 167*f126890aSEmmanuel Vadot "ROTARY_SWITCH_1_8_N", 168*f126890aSEmmanuel Vadot "MOTOR_2_FAULT_N"; /* 25 */ 169*f126890aSEmmanuel Vadot}; 170*f126890aSEmmanuel Vadot 171*f126890aSEmmanuel Vadot&gpio3 { 172*f126890aSEmmanuel Vadot gpio-line-names = "", /* 0 */ 173*f126890aSEmmanuel Vadot "", 174*f126890aSEmmanuel Vadot "", 175*f126890aSEmmanuel Vadot "", 176*f126890aSEmmanuel Vadot "", 177*f126890aSEmmanuel Vadot "", /* 5 */ 178*f126890aSEmmanuel Vadot "EXT_GPIO", 179*f126890aSEmmanuel Vadot "MOTOR_1_DRIVER_IN1_N", 180*f126890aSEmmanuel Vadot "MOTOR_1_DRIVER_IN2", 181*f126890aSEmmanuel Vadot "MOTOR_2_DRIVER_IN1", 182*f126890aSEmmanuel Vadot "STM32_BOOT0", /* 10 */ 183*f126890aSEmmanuel Vadot "STM32_RST_N", 184*f126890aSEmmanuel Vadot "RELAY_1_ENABLE", 185*f126890aSEmmanuel Vadot "RELAY_2_ENABLE", 186*f126890aSEmmanuel Vadot "", 187*f126890aSEmmanuel Vadot "", /* 15 */ 188*f126890aSEmmanuel Vadot "QCA700X_MAINS_BOOTLOADER_N", 189*f126890aSEmmanuel Vadot "QCA700X_CP_RST_N", 190*f126890aSEmmanuel Vadot "QCA700X_CP_BOOTLOADER_N", 191*f126890aSEmmanuel Vadot "", 192*f126890aSEmmanuel Vadot "DIGITAL_OUT_1", /* 20 */ 193*f126890aSEmmanuel Vadot "DIGITAL_OUT_2", 194*f126890aSEmmanuel Vadot "DIGITAL_OUT_3", 195*f126890aSEmmanuel Vadot "DIGITAL_OUT_4", 196*f126890aSEmmanuel Vadot "DIGITAL_OUT_5", 197*f126890aSEmmanuel Vadot "DIGITAL_OUT_6", /* 25 */ 198*f126890aSEmmanuel Vadot "ROTARY_SWITCH_2_8_N", 199*f126890aSEmmanuel Vadot "ROTARY_SWITCH_2_4_N", 200*f126890aSEmmanuel Vadot "ROTARY_SWITCH_2_2_N"; 201*f126890aSEmmanuel Vadot}; 202*f126890aSEmmanuel Vadot 203*f126890aSEmmanuel Vadot&gpio4 { 204*f126890aSEmmanuel Vadot pinctrl-names = "default"; 205*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pmic>; 206*f126890aSEmmanuel Vadot 207*f126890aSEmmanuel Vadot gpio-line-names = "", /* 0 */ 208*f126890aSEmmanuel Vadot "", 209*f126890aSEmmanuel Vadot "", 210*f126890aSEmmanuel Vadot "", 211*f126890aSEmmanuel Vadot "", 212*f126890aSEmmanuel Vadot "", /* 5 */ 213*f126890aSEmmanuel Vadot "", 214*f126890aSEmmanuel Vadot "", 215*f126890aSEmmanuel Vadot "", 216*f126890aSEmmanuel Vadot "", 217*f126890aSEmmanuel Vadot "", /* 10 */ 218*f126890aSEmmanuel Vadot "", 219*f126890aSEmmanuel Vadot "", 220*f126890aSEmmanuel Vadot "BOARD_VARIANT_1", 221*f126890aSEmmanuel Vadot "BOARD_VARIANT_2", 222*f126890aSEmmanuel Vadot "BOARD_VARIANT_0", /* 15 */ 223*f126890aSEmmanuel Vadot "BOARD_VARIANT_3", 224*f126890aSEmmanuel Vadot "", 225*f126890aSEmmanuel Vadot "ROTARY_SWITCH_2_1_N", 226*f126890aSEmmanuel Vadot "", 227*f126890aSEmmanuel Vadot "DIGITAL_IN_5", /* 20 */ 228*f126890aSEmmanuel Vadot "", 229*f126890aSEmmanuel Vadot "", 230*f126890aSEmmanuel Vadot "DIGITAL_IN_6", 231*f126890aSEmmanuel Vadot "", 232*f126890aSEmmanuel Vadot "DIGITAL_IN_1", /* 25 */ 233*f126890aSEmmanuel Vadot "DIGITAL_IN_2", 234*f126890aSEmmanuel Vadot "DIGITAL_IN_4", 235*f126890aSEmmanuel Vadot "DIGITAL_IN_3"; 236*f126890aSEmmanuel Vadot 237*f126890aSEmmanuel Vadot pmic-int-hog { 238*f126890aSEmmanuel Vadot gpio-hog; 239*f126890aSEmmanuel Vadot gpios = <19 0>; 240*f126890aSEmmanuel Vadot input; 241*f126890aSEmmanuel Vadot }; 242*f126890aSEmmanuel Vadot}; 243*f126890aSEmmanuel Vadot 244*f126890aSEmmanuel Vadot&gpio5 { 245*f126890aSEmmanuel Vadot gpio-line-names = "ROTARY_SWITCH_1_1_N", /* 0 */ 246*f126890aSEmmanuel Vadot "", 247*f126890aSEmmanuel Vadot "RELAY_2_SENSE", 248*f126890aSEmmanuel Vadot "RELAY_1_SENSE", 249*f126890aSEmmanuel Vadot "", 250*f126890aSEmmanuel Vadot "", /* 5 */ 251*f126890aSEmmanuel Vadot "", 252*f126890aSEmmanuel Vadot "QCA700X_MAINS_RST_N", 253*f126890aSEmmanuel Vadot "MOTOR_2_DRIVER_IN2", 254*f126890aSEmmanuel Vadot "", 255*f126890aSEmmanuel Vadot "CP_POSITIVE_PEAK_RST", /* 10 */ 256*f126890aSEmmanuel Vadot "CP_NEGATIVE_PEAK_RST"; 257*f126890aSEmmanuel Vadot}; 258*f126890aSEmmanuel Vadot 259*f126890aSEmmanuel Vadot&i2c4 { 260*f126890aSEmmanuel Vadot clock-frequency = <100000>; 261*f126890aSEmmanuel Vadot pinctrl-names = "default", "gpio"; 262*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c4>; 263*f126890aSEmmanuel Vadot pinctrl-1 = <&pinctrl_i2c4_gpio>; 264*f126890aSEmmanuel Vadot scl-gpios = <&gpio1 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 265*f126890aSEmmanuel Vadot sda-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 266*f126890aSEmmanuel Vadot status = "okay"; 267*f126890aSEmmanuel Vadot 268*f126890aSEmmanuel Vadot pfuze3001: pmic@8 { 269*f126890aSEmmanuel Vadot compatible = "fsl,pfuze3001"; 270*f126890aSEmmanuel Vadot reg = <0x08>; 271*f126890aSEmmanuel Vadot 272*f126890aSEmmanuel Vadot regulators { 273*f126890aSEmmanuel Vadot sw1_reg: sw1 { 274*f126890aSEmmanuel Vadot regulator-name = "SW1"; 275*f126890aSEmmanuel Vadot regulator-min-microvolt = <700000>; 276*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 277*f126890aSEmmanuel Vadot regulator-boot-on; 278*f126890aSEmmanuel Vadot regulator-always-on; 279*f126890aSEmmanuel Vadot }; 280*f126890aSEmmanuel Vadot 281*f126890aSEmmanuel Vadot sw2_reg: sw2 { 282*f126890aSEmmanuel Vadot regulator-name = "SW2"; 283*f126890aSEmmanuel Vadot regulator-min-microvolt = <1500000>; 284*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 285*f126890aSEmmanuel Vadot regulator-boot-on; 286*f126890aSEmmanuel Vadot regulator-always-on; 287*f126890aSEmmanuel Vadot }; 288*f126890aSEmmanuel Vadot 289*f126890aSEmmanuel Vadot sw3_reg: sw3 { 290*f126890aSEmmanuel Vadot regulator-name = "SW3"; 291*f126890aSEmmanuel Vadot regulator-min-microvolt = <900000>; 292*f126890aSEmmanuel Vadot regulator-max-microvolt = <1650000>; 293*f126890aSEmmanuel Vadot regulator-boot-on; 294*f126890aSEmmanuel Vadot regulator-always-on; 295*f126890aSEmmanuel Vadot }; 296*f126890aSEmmanuel Vadot 297*f126890aSEmmanuel Vadot snvs_reg: vsnvs { 298*f126890aSEmmanuel Vadot regulator-name = "VSNVS"; 299*f126890aSEmmanuel Vadot regulator-min-microvolt = <1000000>; 300*f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 301*f126890aSEmmanuel Vadot regulator-boot-on; 302*f126890aSEmmanuel Vadot regulator-always-on; 303*f126890aSEmmanuel Vadot }; 304*f126890aSEmmanuel Vadot 305*f126890aSEmmanuel Vadot vgen1_reg: vldo1 { 306*f126890aSEmmanuel Vadot regulator-name = "VLDO1"; 307*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 308*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 309*f126890aSEmmanuel Vadot regulator-always-on; 310*f126890aSEmmanuel Vadot }; 311*f126890aSEmmanuel Vadot 312*f126890aSEmmanuel Vadot vgen2_reg: vldo2 { 313*f126890aSEmmanuel Vadot regulator-name = "VLDO2"; 314*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 315*f126890aSEmmanuel Vadot regulator-max-microvolt = <1550000>; 316*f126890aSEmmanuel Vadot regulator-always-on; 317*f126890aSEmmanuel Vadot }; 318*f126890aSEmmanuel Vadot 319*f126890aSEmmanuel Vadot vgen3_reg: vccsd { 320*f126890aSEmmanuel Vadot regulator-name = "VCCSD"; 321*f126890aSEmmanuel Vadot regulator-min-microvolt = <2850000>; 322*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 323*f126890aSEmmanuel Vadot regulator-always-on; 324*f126890aSEmmanuel Vadot }; 325*f126890aSEmmanuel Vadot 326*f126890aSEmmanuel Vadot vgen4_reg: v33 { 327*f126890aSEmmanuel Vadot regulator-name = "V33"; 328*f126890aSEmmanuel Vadot regulator-min-microvolt = <2850000>; 329*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 330*f126890aSEmmanuel Vadot regulator-always-on; 331*f126890aSEmmanuel Vadot }; 332*f126890aSEmmanuel Vadot 333*f126890aSEmmanuel Vadot vgen5_reg: vldo3 { 334*f126890aSEmmanuel Vadot regulator-name = "VLDO3"; 335*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 336*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 337*f126890aSEmmanuel Vadot regulator-always-on; 338*f126890aSEmmanuel Vadot }; 339*f126890aSEmmanuel Vadot 340*f126890aSEmmanuel Vadot vgen6_reg: vldo4 { 341*f126890aSEmmanuel Vadot regulator-name = "VLDO4"; 342*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 343*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 344*f126890aSEmmanuel Vadot regulator-always-on; 345*f126890aSEmmanuel Vadot }; 346*f126890aSEmmanuel Vadot }; 347*f126890aSEmmanuel Vadot }; 348*f126890aSEmmanuel Vadot 349*f126890aSEmmanuel Vadot onewire@18 { 350*f126890aSEmmanuel Vadot compatible = "maxim,ds2484"; 351*f126890aSEmmanuel Vadot reg = <0x18>; 352*f126890aSEmmanuel Vadot }; 353*f126890aSEmmanuel Vadot 354*f126890aSEmmanuel Vadot accelerometer@19 { 355*f126890aSEmmanuel Vadot compatible = "st,iis328dq", "st,h3lis331dl-accel"; 356*f126890aSEmmanuel Vadot reg = <0x19>; 357*f126890aSEmmanuel Vadot pinctrl-names = "default"; 358*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_accelerometer_int1_snvs>; 359*f126890aSEmmanuel Vadot vdd-supply = <®_dcdc_3v3>; 360*f126890aSEmmanuel Vadot vddio-supply = <®_dcdc_3v3>; 361*f126890aSEmmanuel Vadot st,drdy-int-pin = <1>; 362*f126890aSEmmanuel Vadot interrupt-parent = <&gpio5>; 363*f126890aSEmmanuel Vadot interrupts = <5 IRQ_TYPE_EDGE_RISING>; 364*f126890aSEmmanuel Vadot }; 365*f126890aSEmmanuel Vadot}; 366*f126890aSEmmanuel Vadot 367*f126890aSEmmanuel Vadot&iomuxc { 368*f126890aSEmmanuel Vadot pinctrl-names = "default"; 369*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_board_var 370*f126890aSEmmanuel Vadot &pinctrl_digital_input 371*f126890aSEmmanuel Vadot &pinctrl_digital_output 372*f126890aSEmmanuel Vadot &pinctrl_gpio_motor 373*f126890aSEmmanuel Vadot &pinctrl_hog_pins 374*f126890aSEmmanuel Vadot &pinctrl_rotary_switch1 375*f126890aSEmmanuel Vadot &pinctrl_rotary_switch2>; 376*f126890aSEmmanuel Vadot 377*f126890aSEmmanuel Vadot pinctrl_adc_cp: adc-cpgrp { 378*f126890aSEmmanuel Vadot fsl,pins = < 379*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 380*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 381*f126890aSEmmanuel Vadot >; 382*f126890aSEmmanuel Vadot }; 383*f126890aSEmmanuel Vadot 384*f126890aSEmmanuel Vadot pinctrl_adc_motor: adc-motorgrp { 385*f126890aSEmmanuel Vadot fsl,pins = < 386*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0xb0 387*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 388*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 389*f126890aSEmmanuel Vadot >; 390*f126890aSEmmanuel Vadot }; 391*f126890aSEmmanuel Vadot 392*f126890aSEmmanuel Vadot pinctrl_adc_pp: adc-ppgrp { 393*f126890aSEmmanuel Vadot fsl,pins = < 394*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0xb0 395*f126890aSEmmanuel Vadot >; 396*f126890aSEmmanuel Vadot }; 397*f126890aSEmmanuel Vadot 398*f126890aSEmmanuel Vadot pinctrl_board_var: board-vargrp { 399*f126890aSEmmanuel Vadot fsl,pins = < 400*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_CLE__GPIO4_IO15 0xb0 401*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0xb0 402*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0xb0 403*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DQS__GPIO4_IO16 0xb0 404*f126890aSEmmanuel Vadot >; 405*f126890aSEmmanuel Vadot }; 406*f126890aSEmmanuel Vadot 407*f126890aSEmmanuel Vadot pinctrl_digital_input: digital-inputgrp { 408*f126890aSEmmanuel Vadot fsl,pins = < 409*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0xb0 410*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0xb0 411*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0xb0 412*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA06__GPIO4_IO27 0xb0 413*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0xb0 414*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0xb0 415*f126890aSEmmanuel Vadot >; 416*f126890aSEmmanuel Vadot }; 417*f126890aSEmmanuel Vadot 418*f126890aSEmmanuel Vadot pinctrl_digital_output: digital-outputgrp { 419*f126890aSEmmanuel Vadot fsl,pins = < 420*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0x400000b0 421*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA16__GPIO3_IO21 0x400000b0 422*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA17__GPIO3_IO22 0x400000b0 423*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x400000b0 424*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x400000b0 425*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA20__GPIO3_IO25 0x400000b0 426*f126890aSEmmanuel Vadot >; 427*f126890aSEmmanuel Vadot }; 428*f126890aSEmmanuel Vadot 429*f126890aSEmmanuel Vadot pinctrl_ecspi2: ecspi2grp { 430*f126890aSEmmanuel Vadot fsl,pins = < 431*f126890aSEmmanuel Vadot MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x10b0 432*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_HSYNC__GPIO3_IO02 0xb0 433*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_RESET__GPIO3_IO04 0xb0 434*f126890aSEmmanuel Vadot MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK 0x10b0 435*f126890aSEmmanuel Vadot MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO 0x10b0 436*f126890aSEmmanuel Vadot MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI 0x10b0 437*f126890aSEmmanuel Vadot >; 438*f126890aSEmmanuel Vadot }; 439*f126890aSEmmanuel Vadot 440*f126890aSEmmanuel Vadot pinctrl_ecspi4: ecspi4grp { 441*f126890aSEmmanuel Vadot fsl,pins = < 442*f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x10b0 443*f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_TX_DATA1__ECSPI4_SCLK 0x10b0 444*f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_TX_CLK__ECSPI4_MISO 0x10b0 445*f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_TX_EN__ECSPI4_MOSI 0x10b0 446*f126890aSEmmanuel Vadot >; 447*f126890aSEmmanuel Vadot }; 448*f126890aSEmmanuel Vadot 449*f126890aSEmmanuel Vadot pinctrl_emmc_rst: emmc-rstgrp { 450*f126890aSEmmanuel Vadot fsl,pins = < 451*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x400010b0 452*f126890aSEmmanuel Vadot >; 453*f126890aSEmmanuel Vadot }; 454*f126890aSEmmanuel Vadot 455*f126890aSEmmanuel Vadot pinctrl_enet_mdio: enet-mdiogrp { 456*f126890aSEmmanuel Vadot fsl,pins = < 457*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x10b0 458*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x10b0 459*f126890aSEmmanuel Vadot >; 460*f126890aSEmmanuel Vadot }; 461*f126890aSEmmanuel Vadot 462*f126890aSEmmanuel Vadot pinctrl_enet1_phy_int: enet1-phy-intgrp { 463*f126890aSEmmanuel Vadot fsl,pins = < 464*f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07 0x10b0 465*f126890aSEmmanuel Vadot >; 466*f126890aSEmmanuel Vadot }; 467*f126890aSEmmanuel Vadot 468*f126890aSEmmanuel Vadot pinctrl_enet1: enet1grp { 469*f126890aSEmmanuel Vadot fsl,pins = < 470*f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x100b0 471*f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x100b0 472*f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x100b0 473*f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x400000b1 474*f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0xb0 475*f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0xb0 476*f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0xb0 477*f126890aSEmmanuel Vadot >; 478*f126890aSEmmanuel Vadot }; 479*f126890aSEmmanuel Vadot 480*f126890aSEmmanuel Vadot pinctrl_ext_uart: ext-uartgrp { 481*f126890aSEmmanuel Vadot fsl,pins = < 482*f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_TX_DATA0__UART7_DCE_RX 0xb0 483*f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_RX_EN__UART7_DCE_TX 0xb0 484*f126890aSEmmanuel Vadot >; 485*f126890aSEmmanuel Vadot }; 486*f126890aSEmmanuel Vadot 487*f126890aSEmmanuel Vadot pinctrl_fan_enable: fan-enablegrp { 488*f126890aSEmmanuel Vadot fsl,pins = < 489*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA00__GPIO3_IO05 0x400000b0 490*f126890aSEmmanuel Vadot >; 491*f126890aSEmmanuel Vadot }; 492*f126890aSEmmanuel Vadot 493*f126890aSEmmanuel Vadot pinctrl_gpio_motor: gpio-motorgrp { 494*f126890aSEmmanuel Vadot fsl,pins = < 495*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0x400000b0 496*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0x400000b0 497*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0x400000b0 498*f126890aSEmmanuel Vadot MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0xb0 499*f126890aSEmmanuel Vadot MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0xb0 500*f126890aSEmmanuel Vadot >; 501*f126890aSEmmanuel Vadot }; 502*f126890aSEmmanuel Vadot 503*f126890aSEmmanuel Vadot pinctrl_hog_pins: hog-pinsgrp { 504*f126890aSEmmanuel Vadot fsl,pins = < 505*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0x400000b0 506*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA08__GPIO3_IO13 0x400000b0 507*f126890aSEmmanuel Vadot MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x400070a0 508*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x400000b0 509*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x400000b0 510*f126890aSEmmanuel Vadot >; 511*f126890aSEmmanuel Vadot }; 512*f126890aSEmmanuel Vadot 513*f126890aSEmmanuel Vadot pinctrl_i2c4: i2c4grp { 514*f126890aSEmmanuel Vadot fsl,pins = < 515*f126890aSEmmanuel Vadot MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x400008b0 516*f126890aSEmmanuel Vadot MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x400008b0 517*f126890aSEmmanuel Vadot >; 518*f126890aSEmmanuel Vadot }; 519*f126890aSEmmanuel Vadot 520*f126890aSEmmanuel Vadot pinctrl_i2c4_gpio: i2c4-gpiogrp { 521*f126890aSEmmanuel Vadot fsl,pins = < 522*f126890aSEmmanuel Vadot MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21 0x400008b0 523*f126890aSEmmanuel Vadot MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x400008b0 524*f126890aSEmmanuel Vadot >; 525*f126890aSEmmanuel Vadot }; 526*f126890aSEmmanuel Vadot 527*f126890aSEmmanuel Vadot pinctrl_pmic: pmicgrp { 528*f126890aSEmmanuel Vadot fsl,pins = < 529*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO08__USDHC2_VSELECT 0x70b1 530*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0xb0 531*f126890aSEmmanuel Vadot >; 532*f126890aSEmmanuel Vadot }; 533*f126890aSEmmanuel Vadot 534*f126890aSEmmanuel Vadot pinctrl_pwm_cp: pinctrl-pwm-cpgrp { 535*f126890aSEmmanuel Vadot fsl,pins = < 536*f126890aSEmmanuel Vadot MX6UL_PAD_JTAG_TRST_B__PWM8_OUT 0x60a0 537*f126890aSEmmanuel Vadot >; 538*f126890aSEmmanuel Vadot }; 539*f126890aSEmmanuel Vadot 540*f126890aSEmmanuel Vadot pinctrl_pwm_digital_input_ref: pwm-digital-input-refgrp { 541*f126890aSEmmanuel Vadot fsl,pins = < 542*f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0xb0 543*f126890aSEmmanuel Vadot >; 544*f126890aSEmmanuel Vadot }; 545*f126890aSEmmanuel Vadot 546*f126890aSEmmanuel Vadot pinctrl_pwm_fan: pwm-fangrp { 547*f126890aSEmmanuel Vadot fsl,pins = < 548*f126890aSEmmanuel Vadot MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x60a0 549*f126890aSEmmanuel Vadot >; 550*f126890aSEmmanuel Vadot }; 551*f126890aSEmmanuel Vadot 552*f126890aSEmmanuel Vadot pinctrl_qca700x_cp_btld: qca700x-cp-btldgrp { 553*f126890aSEmmanuel Vadot fsl,pins = < 554*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0x400000b0 555*f126890aSEmmanuel Vadot >; 556*f126890aSEmmanuel Vadot }; 557*f126890aSEmmanuel Vadot 558*f126890aSEmmanuel Vadot pinctrl_qca700x_cp_int: qca700x-cp-intgrp { 559*f126890aSEmmanuel Vadot fsl,pins = < 560*f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA1__GPIO2_IO19 0x10b0 561*f126890aSEmmanuel Vadot >; 562*f126890aSEmmanuel Vadot }; 563*f126890aSEmmanuel Vadot 564*f126890aSEmmanuel Vadot pinctrl_qca700x_cp_rst: qca700x-cp-rstgrp { 565*f126890aSEmmanuel Vadot fsl,pins = < 566*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x400000b0 567*f126890aSEmmanuel Vadot >; 568*f126890aSEmmanuel Vadot }; 569*f126890aSEmmanuel Vadot 570*f126890aSEmmanuel Vadot pinctrl_qca700x_mains_btld: qca700x-mains-btldgrp { 571*f126890aSEmmanuel Vadot fsl,pins = < 572*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA11__GPIO3_IO16 0x400000b0 573*f126890aSEmmanuel Vadot >; 574*f126890aSEmmanuel Vadot }; 575*f126890aSEmmanuel Vadot 576*f126890aSEmmanuel Vadot pinctrl_rotary_switch1: rotary-switch1grp { 577*f126890aSEmmanuel Vadot fsl,pins = < 578*f126890aSEmmanuel Vadot MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0xb0 579*f126890aSEmmanuel Vadot MX6UL_PAD_UART2_RTS_B__GPIO1_IO23 0xb0 580*f126890aSEmmanuel Vadot MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0xb0 581*f126890aSEmmanuel Vadot >; 582*f126890aSEmmanuel Vadot }; 583*f126890aSEmmanuel Vadot 584*f126890aSEmmanuel Vadot pinctrl_rotary_switch2: rotary-switch2grp { 585*f126890aSEmmanuel Vadot fsl,pins = < 586*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18 0xb0 587*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA23__GPIO3_IO28 0xb0 588*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA22__GPIO3_IO27 0xb0 589*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0xb0 590*f126890aSEmmanuel Vadot >; 591*f126890aSEmmanuel Vadot }; 592*f126890aSEmmanuel Vadot 593*f126890aSEmmanuel Vadot pinctrl_rs485_1: rs485-1grp { 594*f126890aSEmmanuel Vadot fsl,pins = < 595*f126890aSEmmanuel Vadot MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0xb0 596*f126890aSEmmanuel Vadot MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0xb0 597*f126890aSEmmanuel Vadot MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0xb0 598*f126890aSEmmanuel Vadot >; 599*f126890aSEmmanuel Vadot }; 600*f126890aSEmmanuel Vadot 601*f126890aSEmmanuel Vadot pinctrl_rs485_2: rs485-2grp { 602*f126890aSEmmanuel Vadot fsl,pins = < 603*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x10b0 604*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA01__UART5_DCE_RX 0x10b0 605*f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA00__UART5_DCE_TX 0x10b0 606*f126890aSEmmanuel Vadot >; 607*f126890aSEmmanuel Vadot }; 608*f126890aSEmmanuel Vadot 609*f126890aSEmmanuel Vadot pinctrl_status_leds: status-ledsgrp { 610*f126890aSEmmanuel Vadot fsl,pins = < 611*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA09__GPIO3_IO14 0xb0 612*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA10__GPIO3_IO15 0xb0 613*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0xb0 614*f126890aSEmmanuel Vadot >; 615*f126890aSEmmanuel Vadot }; 616*f126890aSEmmanuel Vadot 617*f126890aSEmmanuel Vadot pinctrl_stm32: stm32grp { 618*f126890aSEmmanuel Vadot fsl,pins = < 619*f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_RX_DATA1__UART6_DCE_RX 0x10b0 620*f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_RX_DATA0__UART6_DCE_TX 0x10b0 621*f126890aSEmmanuel Vadot >; 622*f126890aSEmmanuel Vadot }; 623*f126890aSEmmanuel Vadot 624*f126890aSEmmanuel Vadot pinctrl_uart4: uart4grp { 625*f126890aSEmmanuel Vadot fsl,pins = < 626*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_CLK__UART4_DTE_RX 0xb0 627*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_ENABLE__UART4_DTE_TX 0xb0 628*f126890aSEmmanuel Vadot >; 629*f126890aSEmmanuel Vadot }; 630*f126890aSEmmanuel Vadot 631*f126890aSEmmanuel Vadot pinctrl_usb: usbgrp { 632*f126890aSEmmanuel Vadot fsl,pins = < 633*f126890aSEmmanuel Vadot MX6UL_PAD_SD1_CLK__USB_OTG1_OC 0x70b0 634*f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA0__ANATOP_OTG1_ID 0x70b0 635*f126890aSEmmanuel Vadot >; 636*f126890aSEmmanuel Vadot }; 637*f126890aSEmmanuel Vadot 638*f126890aSEmmanuel Vadot pinctrl_usb_pwr: usb-pwrgrp { 639*f126890aSEmmanuel Vadot fsl,pins = < 640*f126890aSEmmanuel Vadot MX6UL_PAD_SD1_CMD__USB_OTG1_PWR 0xb0 641*f126890aSEmmanuel Vadot >; 642*f126890aSEmmanuel Vadot }; 643*f126890aSEmmanuel Vadot 644*f126890aSEmmanuel Vadot pinctrl_usdhc2: usdhc2grp { 645*f126890aSEmmanuel Vadot fsl,pins = < 646*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x7071 647*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x7071 648*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x7071 649*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x7071 650*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x7071 651*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x7071 652*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x7071 653*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x7071 654*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x7071 655*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x7071 656*f126890aSEmmanuel Vadot >; 657*f126890aSEmmanuel Vadot }; 658*f126890aSEmmanuel Vadot 659*f126890aSEmmanuel Vadot pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 660*f126890aSEmmanuel Vadot fsl,pins = < 661*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x70b1 662*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x70b1 663*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x70b1 664*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x70b1 665*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x70b1 666*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x70b1 667*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x70b1 668*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x70b1 669*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x70b1 670*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x70b1 671*f126890aSEmmanuel Vadot >; 672*f126890aSEmmanuel Vadot }; 673*f126890aSEmmanuel Vadot 674*f126890aSEmmanuel Vadot pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 675*f126890aSEmmanuel Vadot fsl,pins = < 676*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x70f1 677*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x70f1 678*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x70f1 679*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x70f1 680*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x70f1 681*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x70f1 682*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x70f1 683*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x70f1 684*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x70f1 685*f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x70f1 686*f126890aSEmmanuel Vadot >; 687*f126890aSEmmanuel Vadot }; 688*f126890aSEmmanuel Vadot 689*f126890aSEmmanuel Vadot pinctrl_wdog2: wdoggrp { 690*f126890aSEmmanuel Vadot fsl,pins = < 691*f126890aSEmmanuel Vadot MX6UL_PAD_LCD_VSYNC__WDOG2_WDOG_B 0x10b0 692*f126890aSEmmanuel Vadot >; 693*f126890aSEmmanuel Vadot }; 694*f126890aSEmmanuel Vadot}; 695*f126890aSEmmanuel Vadot 696*f126890aSEmmanuel Vadot&iomuxc_snvs { 697*f126890aSEmmanuel Vadot pinctrl-names = "default_snvs"; 698*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_cp_peak_snvs 699*f126890aSEmmanuel Vadot &pinctrl_gpio_motor_snvs 700*f126890aSEmmanuel Vadot &pinctrl_relay_sense_snvs 701*f126890aSEmmanuel Vadot &pinctrl_rotary_switch1_snvs>; 702*f126890aSEmmanuel Vadot 703*f126890aSEmmanuel Vadot pinctrl_accelerometer_int1_snvs: accelerometer-int1-snvsgrp { 704*f126890aSEmmanuel Vadot fsl,pins = < 705*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x130a0 706*f126890aSEmmanuel Vadot >; 707*f126890aSEmmanuel Vadot }; 708*f126890aSEmmanuel Vadot 709*f126890aSEmmanuel Vadot pinctrl_cp_peak_snvs: cp-peak-snvsgrp { 710*f126890aSEmmanuel Vadot fsl,pins = < 711*f126890aSEmmanuel Vadot MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x130a0 712*f126890aSEmmanuel Vadot MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x130a0 713*f126890aSEmmanuel Vadot >; 714*f126890aSEmmanuel Vadot }; 715*f126890aSEmmanuel Vadot 716*f126890aSEmmanuel Vadot pinctrl_enet1_phy_rst: enet1-phy-rstgrp { 717*f126890aSEmmanuel Vadot fsl,pins = < 718*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x100a0 719*f126890aSEmmanuel Vadot >; 720*f126890aSEmmanuel Vadot }; 721*f126890aSEmmanuel Vadot 722*f126890aSEmmanuel Vadot pinctrl_fan_sense_snvs: fan-sense-snvsgrp { 723*f126890aSEmmanuel Vadot fsl,pins = < 724*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x100a0 725*f126890aSEmmanuel Vadot >; 726*f126890aSEmmanuel Vadot }; 727*f126890aSEmmanuel Vadot 728*f126890aSEmmanuel Vadot pinctrl_gpio_motor_snvs: gpio-motor-snvsgrp { 729*f126890aSEmmanuel Vadot fsl,pins = < 730*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x110a0 731*f126890aSEmmanuel Vadot >; 732*f126890aSEmmanuel Vadot }; 733*f126890aSEmmanuel Vadot 734*f126890aSEmmanuel Vadot pinctrl_qca700x_mains_int: qca700x-mains-intgrp { 735*f126890aSEmmanuel Vadot fsl,pins = < 736*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x130a0 737*f126890aSEmmanuel Vadot >; 738*f126890aSEmmanuel Vadot }; 739*f126890aSEmmanuel Vadot 740*f126890aSEmmanuel Vadot pinctrl_qca700x_mains_rst: qca700x-mains-rstgrp { 741*f126890aSEmmanuel Vadot fsl,pins = < 742*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x400100a0 743*f126890aSEmmanuel Vadot >; 744*f126890aSEmmanuel Vadot }; 745*f126890aSEmmanuel Vadot 746*f126890aSEmmanuel Vadot pinctrl_relay_sense_snvs: relay-sense-snvsgrp { 747*f126890aSEmmanuel Vadot fsl,pins = < 748*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x100a0 749*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x100a0 750*f126890aSEmmanuel Vadot >; 751*f126890aSEmmanuel Vadot }; 752*f126890aSEmmanuel Vadot 753*f126890aSEmmanuel Vadot pinctrl_rotary_switch1_snvs: rotary-switch1-snvsgrp { 754*f126890aSEmmanuel Vadot fsl,pins = < 755*f126890aSEmmanuel Vadot MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x110a0 756*f126890aSEmmanuel Vadot >; 757*f126890aSEmmanuel Vadot }; 758*f126890aSEmmanuel Vadot}; 759*f126890aSEmmanuel Vadot 760*f126890aSEmmanuel Vadot&pwm2 { 761*f126890aSEmmanuel Vadot pinctrl-names = "default"; 762*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm_digital_input_ref>; 763*f126890aSEmmanuel Vadot status = "okay"; 764*f126890aSEmmanuel Vadot}; 765*f126890aSEmmanuel Vadot 766*f126890aSEmmanuel Vadot&pwm8 { 767*f126890aSEmmanuel Vadot pinctrl-names = "default"; 768*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm_cp>; 769*f126890aSEmmanuel Vadot status = "okay"; 770*f126890aSEmmanuel Vadot}; 771*f126890aSEmmanuel Vadot 772*f126890aSEmmanuel Vadot&uart1 { 773*f126890aSEmmanuel Vadot pinctrl-names = "default"; 774*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_rs485_1>; 775*f126890aSEmmanuel Vadot status = "okay"; 776*f126890aSEmmanuel Vadot}; 777*f126890aSEmmanuel Vadot 778*f126890aSEmmanuel Vadot&uart4 { 779*f126890aSEmmanuel Vadot pinctrl-names = "default"; 780*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4>; 781*f126890aSEmmanuel Vadot fsl,dte-mode; 782*f126890aSEmmanuel Vadot status = "okay"; 783*f126890aSEmmanuel Vadot}; 784*f126890aSEmmanuel Vadot 785*f126890aSEmmanuel Vadot&uart5 { 786*f126890aSEmmanuel Vadot pinctrl-names = "default"; 787*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_rs485_2>; 788*f126890aSEmmanuel Vadot}; 789*f126890aSEmmanuel Vadot 790*f126890aSEmmanuel Vadot&uart6 { 791*f126890aSEmmanuel Vadot pinctrl-names = "default"; 792*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_stm32>; 793*f126890aSEmmanuel Vadot status = "okay"; 794*f126890aSEmmanuel Vadot}; 795*f126890aSEmmanuel Vadot 796*f126890aSEmmanuel Vadot&uart7 { 797*f126890aSEmmanuel Vadot pinctrl-names = "default"; 798*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ext_uart>; 799*f126890aSEmmanuel Vadot status = "okay"; 800*f126890aSEmmanuel Vadot}; 801*f126890aSEmmanuel Vadot 802*f126890aSEmmanuel Vadot&usbotg1 { 803*f126890aSEmmanuel Vadot pinctrl-names = "default"; 804*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usb 805*f126890aSEmmanuel Vadot &pinctrl_usb_pwr>; 806*f126890aSEmmanuel Vadot dr_mode = "host"; 807*f126890aSEmmanuel Vadot power-active-high; 808*f126890aSEmmanuel Vadot disable-over-current; 809*f126890aSEmmanuel Vadot status = "okay"; 810*f126890aSEmmanuel Vadot}; 811*f126890aSEmmanuel Vadot 812*f126890aSEmmanuel Vadot&usbotg2 { 813*f126890aSEmmanuel Vadot dr_mode = "host"; 814*f126890aSEmmanuel Vadot disable-over-current; 815*f126890aSEmmanuel Vadot status = "okay"; 816*f126890aSEmmanuel Vadot}; 817*f126890aSEmmanuel Vadot 818*f126890aSEmmanuel Vadot&usbphy1 { 819*f126890aSEmmanuel Vadot fsl,tx-cal-45-dn-ohms = <35>; 820*f126890aSEmmanuel Vadot fsl,tx-cal-45-dp-ohms = <35>; 821*f126890aSEmmanuel Vadot}; 822*f126890aSEmmanuel Vadot 823*f126890aSEmmanuel Vadot&usbphy2 { 824*f126890aSEmmanuel Vadot fsl,tx-cal-45-dn-ohms = <35>; 825*f126890aSEmmanuel Vadot fsl,tx-cal-45-dp-ohms = <35>; 826*f126890aSEmmanuel Vadot}; 827*f126890aSEmmanuel Vadot 828*f126890aSEmmanuel Vadot&usdhc2 { 829*f126890aSEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 830*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc2>; 831*f126890aSEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 832*f126890aSEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 833*f126890aSEmmanuel Vadot vmmc-supply = <&sw2_reg>; 834*f126890aSEmmanuel Vadot vqmmc-supply = <®_1v8>; 835*f126890aSEmmanuel Vadot mmc-pwrseq = <&emmc_pwrseq>; 836*f126890aSEmmanuel Vadot bus-width = <8>; 837*f126890aSEmmanuel Vadot non-removable; 838*f126890aSEmmanuel Vadot no-sd; 839*f126890aSEmmanuel Vadot no-sdio; 840*f126890aSEmmanuel Vadot status = "okay"; 841*f126890aSEmmanuel Vadot}; 842*f126890aSEmmanuel Vadot 843*f126890aSEmmanuel Vadot&wdog1 { 844*f126890aSEmmanuel Vadot status = "disabled"; 845*f126890aSEmmanuel Vadot}; 846*f126890aSEmmanuel Vadot 847*f126890aSEmmanuel Vadot&wdog2 { 848*f126890aSEmmanuel Vadot pinctrl-names = "default"; 849*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog2>; 850*f126890aSEmmanuel Vadot fsl,ext-reset-output; 851*f126890aSEmmanuel Vadot status = "okay"; 852*f126890aSEmmanuel Vadot}; 853