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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v5.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lpieralisi@kernel.org>
11 - Marc Zyngier <maz@kernel.org>
21 - one or more IRS (Interrupt Routing Service)
22 - zero or more ITS (Interrupt Translation Service)
25 - PE-Private Peripheral Interrupts (PPI)
26 - Shared Peripheral Interrupts (SPI)
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/linux/Documentation/devicetree/bindings/firmware/
H A Dintel,stratix10-svc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dinh Nguyen <dinguyen@kernel.org>
11 - Mahesh Rao <mahesh.rao@altera.com>
14 Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
21 communication with SDM, only the secure world of software (EL3, Exception
23 exception layers must channel through the EL3 software whenever it needs
30 code running in EL3.
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/linux/Documentation/translations/zh_TW/arch/arm64/
H A Dbooting.txt1 SPDX-License-Identifier: GPL-2.0
15 ---------------------------------------------------------------------
30 ---------------------------------------------------------------------
40 AArch64 異常模型由多個異常級（EL0 - EL3）組成，對於 EL0 和 EL1 異常級
42 EL3 是最高特權級，且僅存在於安全模式下。
58 -----------------
69 ---------------
81 -------------
91 -------------
111 - 自 v3.17 起，除非另有說明，所有域都是小端模式。
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/linux/Documentation/translations/zh_CN/arch/arm64/
H A Dbooting.txt12 ---------------------------------------------------------------------
26 ---------------------------------------------------------------------
36 AArch64 异常模型由多个异常级（EL0 - EL3）组成，对于 EL0 和 EL1 异常级
38 EL3 是最高特权级，且仅存在于安全模式下。
54 -----------------
65 ---------------
77 -------------
87 -------------
107 - 自 v3.17 起，除非另有说明，所有域都是小端模式。
109 - code0/code1 负责跳转到 stext.
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/linux/include/linux/firmware/intel/
H A Dstratix10-smc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
10 #include <linux/arm-smccc.h>
16 * monitor software in Secure Monitor Exception Level 3 (EL3).
20 * An ARM SMC instruction takes a function identifier and up to 6 64-bit
21 * register values as arguments, and can return up to 4 64-bit register
25 * EL1 and EL3 communicates pointer as physical address rather than the
32 * STD call starts a operation which can be preempted by a non-secure
86 * Sync call used by service driver at EL1 to request the FPGA in EL3 to
93 * a2-7: not used.
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H A Dstratix10-svc-client.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
81 * enum stratix10_svc_command_code - supported service commands
83 * @COMMAND_NOOP: do 'dummy' request for integration/debug/trouble-shooting
88 * @COMMAND_RECONFIG_DATA_SUBMIT: submit buffer(s) of bit-stream data for the
122 * @COMMAND_SMC_SVC_VERSION: Non-mailbox SMC SVC API Version,
186 /* Non-mailbox SMC Call */
194 * struct stratix10_svc_client_msg - message sent by client to service
212 * struct stratix10_svc_command_config_type - config type
220 * struct stratix10_svc_cb_data - callback data structure from service layer
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/linux/Documentation/driver-api/firmware/
H A Dother_interfaces.rst5 --------------
7 .. kernel-doc:: drivers/firmware/dmi_scan.c
11 --------------
13 .. kernel-doc:: drivers/firmware/edd.c
17 -------------------------------------
19 .. kernel-doc:: drivers/firmware/sysfb.c
23 ---------------------------------
28 Exception Level 3 (EL3).
33 of the requests on to a secure monitor (EL3).
35 .. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
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/linux/drivers/net/ethernet/3com/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 config EL3 config
62 3C990-TX, 3CR990-TX-95, 3CR990-TX-97, 3CR990-FX-95, 3CR990-FX-97,
63 3CR990SVR, 3CR990SVR95, 3CR990SVR97, 3CR990-FX-95 Server,
64 3CR990-FX-97 Server, 3C990B-TX-M, 3C990BSVR
H A D3c509.c1 // SPDX-License-Identifier: GPL-2.0
4 * Written 1993-2000 by Donald Becker.
6 * Copyright 1994-2000 by Donald Becker.
21 * a priori which of several ISA-mode cards will be detected first.
37 * detected, other cleanups. -djb
40 * v1.13 9/8/97 Made 'max_interrupt_work' an insmod-settable
41 * variable. -djb
43 * machines. -djb
44 * v1.15 1/31/98 Faster recovery for Tx errors. -djb
46 * cards. -djb
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H A D3c59x.c3 Written 1996-1999 by Donald Becker.
43 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
48 /* ARM systems perform better by disregarding the bus-master
49 transfer capability of these cards. -- rmk */
98 This is only in the support-all-kernels source code. */
117 The Boomerang size is twice as large as the Vortex -- it has additional
124 code size of a per-interface flag is not worthwhile. */
145 II. Board-specific settings
151 The EEPROM settings for media type and forced-full-duplex are observed.
158 series. The primary interface is two programmed-I/O FIFOs, with an
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/linux/tools/perf/util/kvm-stat-arch/
H A Darm64_exception_types.h1 // SPDX-License-Identifier: GPL-2.0
13 /* The hyp-stub will return this for any kvm_call_hyp() call */
39 /* Unallocated EC: 0x0F - 0x10 */
54 #define ESR_ELx_EC_IMP_DEF (0x1f) /* EL3 only */
64 /* Unallocated EC: 0x29 - 0x2B */
75 /* Unallocated EC: 0x36 - 0x37 */
81 /* Unallocated EC: 0x3D - 0x3F */
/linux/drivers/firmware/
H A Dstratix10-svc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017-2018, Intel Corporation
23 #include <linux/firmware/intel/stratix10-smc.h>
24 #include <linux/firmware/intel/stratix10-svc-client.h>
28 * SVC_NUM_DATA_IN_FIFO - number of struct stratix10_svc_data in the FIFO
30 * SVC_NUM_CHANNEL - number of channel supported by service layer driver
32 * FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS - claim back the submitted buffer(s)
34 * when all bit-stream data had be send.
36 * FPGA_CONFIG_STATUS_TIMEOUT_SEC - poll the FPGA configuration status,
47 #define STRATIX10_RSU "stratix10-rsu"
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/linux/drivers/soc/samsung/
H A Dgs101-pmu.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/arm-smccc.h>
10 #include <linux/soc/samsung/exynos-pmu.h>
11 #include <linux/soc/samsung/exynos-regs-pmu.h>
14 #include "exynos-pmu.h"
334 * from EL3, but are still read accessible. As Linux needs to write some of
351 /* returns -EINVAL if access isn't allowed or 0 */ in tensor_sec_reg_write()
368 /* returns -EINVAL if access isn't allowed or 0 */ in tensor_sec_reg_rmw()
/linux/arch/arm64/kvm/
H A Dpmu-emul.c1 // SPDX-License-Identifier: GPL-2.0-only
35 return container_of(pmc, struct kvm_vcpu, arch.pmu.pmc[pmc->idx]); in kvm_pmc_to_vcpu()
40 return &vcpu->arch.pmu.pmc[cnt_idx]; in kvm_vcpu_idx_to_pmc()
75 if (kvm_has_feat(kvm, ID_AA64PFR0_EL1, EL3, IMP)) in kvm_pmu_evtyper_mask()
84 * kvm_pmc_is_64bit - determine if counter is 64bit
91 return (pmc->idx == ARMV8_PMU_CYCLE_IDX || in kvm_pmc_is_64bit()
92 kvm_has_feat(vcpu->kvm, ID_AA64DFR0_EL1, PMUVer, V3P5)); in kvm_pmc_is_64bit()
100 if (kvm_pmu_counter_is_hyp(vcpu, pmc->idx)) in kvm_pmc_has_64bit_overflow()
103 return (pmc->idx < ARMV8_PMU_CYCLE_IDX && (val & ARMV8_PMU_PMCR_LP)) || in kvm_pmc_has_64bit_overflow()
104 (pmc->idx == ARMV8_PMU_CYCLE_IDX && (val & ARMV8_PMU_PMCR_LC)); in kvm_pmc_has_64bit_overflow()
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H A Dsys_regs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012,2013 - ARM Ltd
7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
20 #include <linux/irqchip/arm-gic-v3.h>
25 #include <asm/debug-monitors.h>
74 "sys_reg read to write-only register"); in read_from_write_only()
82 "sys_reg write to read-only register"); in write_to_read_only()
142 /* Non-mapped EL2 registers are by definition in memory. */ in locate_direct_register()
154 loc->loc = SR_LOC_MEMORY; in locate_mapped_el2_register()
158 loc->loc = SR_LOC_LOADED | SR_LOC_MAPPED; in locate_mapped_el2_register()
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H A Dconfig.c1 // SPDX-License-Identifier: GPL-2.0-only
28 #define REQUIRES_E2H1 BIT(5) /* Add HCR_EL2.E2H RES1 as a pre-condition */
108 * Declare the dependency between a non-FGT register, a set of features,
145 #define FEAT_AA64EL3 ID_AA64PFR0_EL1, EL3, IMP
285 * Revisit this if KVM ever supports SME -- this really should in feat_sme_smps()
297 * Revisit this if KVM ever supports SPE -- this really should in feat_spe_fds()
307 * Revisit this if KVM ever supports SPE -- this really should in feat_spe_fne()
317 * Revisit this if KVM ever supports both MPAM and TRBE -- in feat_trbe_mpam()
1363 return map->flags & MASKS_POINTER ? (map->masks->mask | map->masks->nmask) : map->bits; in reg_feat_map_bits()
1368 check_feat_map(r->bit_feat_map, r->bit_feat_map_sz, in check_reg_desc()
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H A Dnested.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 - Columbia University and Linaro Ltd.
28 /* -1 when not mapped on a CPU */
39 * Ratio of live shadow S2 MMU per vcpu. This is a trade-off between
48 kvm->arch.nested_mmus = NULL; in kvm_init_nested()
49 kvm->arch.nested_mmus_size = 0; in kvm_init_nested()
50 atomic_set(&kvm->arch.vncr_map_count, 0); in kvm_init_nested()
70 struct kvm *kvm = vcpu->kvm; in kvm_vcpu_init_nested()
74 if (test_bit(KVM_ARM_VCPU_HAS_EL2_E2H0, kvm->arch.vcpu_features) && in kvm_vcpu_init_nested()
76 return -EINVAL; in kvm_vcpu_init_nested()
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/linux/tools/arch/arm64/include/asm/
H A Desr.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2013 - ARM Ltd
22 /* Unallocated EC: 0x0A - 0x0B */
26 /* Unallocated EC: 0x0F - 0x10 */
41 #define ESR_ELx_EC_IMP_DEF UL(0x1f) /* EL3 only */
51 /* Unallocated EC: 0x29 - 0x2B */
53 /* Unallocated EC: 0x2D - 0x2E */
61 /* Unallocated EC: 0x36 - 0x37 */
67 /* Unallocated EC: 0x3D - 0x3F */
175 #define ESR_ELx_xVC_IMM_MASK ((UL(1) << 16) - 1)
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/linux/tools/testing/selftests/kvm/arm64/
H A Dset_id_regs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * set_id_regs - Test for setting ID register from usersapce.
148 REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, EL3, 1),
280 u64 ftr_max = ftr_bits->mask >> ftr_bits->shift; in get_safe_value()
284 if (ftr_bits->sign == FTR_UNSIGNED) { in get_safe_value()
285 switch (ftr_bits->type) { in get_safe_value()
287 ftr = ftr_bits->safe_val; in get_safe_value()
290 if (ftr > ftr_bits->safe_val) in get_safe_value()
291 ftr--; in get_safe_value()
307 switch (ftr_bits->type) { in get_safe_value()
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/linux/drivers/tee/optee/
H A Dsmc_abi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2021, 2023 Linaro Limited
9 #include <linux/arm-smccc.h>
39 * OP-TEE OS via raw SMCs.
50 * A typical OP-TEE private shm allocation is 224 bytes (argument struct
90 p->attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT + in from_msg_param_tmp_mem()
91 attr - OPTEE_MSG_ATTR_TYPE_TMEM_INPUT; in from_msg_param_tmp_mem()
92 p->u.memref.size = mp->u.tmem.size; in from_msg_param_tmp_mem()
93 shm = (struct tee_shm *)(unsigned long)mp->u.tmem.shm_ref; in from_msg_param_tmp_mem()
95 p->u.memref.shm_offs = 0; in from_msg_param_tmp_mem()
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/linux/drivers/pci/controller/
H A Dpci-aardvark.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/irqchip/irq-msi-lib.h>
21 #include <linux/pci-ecam.h>
30 #include "../pci-bridge-emul.h"
140 #define OB_WIN_DEFAULT_ACTIONS (OB_WIN_ACTIONS(OB_WIN_COUNT-1) + 0x4)
294 writel(val, pcie->base + reg); in advk_writel()
299 return readl(pcie->base + reg); in advk_readl()
314 /* check if LTSSM is in normal operation - some L* state */ in advk_pcie_link_up()
322 * According to PCIe Base specification 3.0, Table 4-14: Link in advk_pcie_link_active()
336 * According to PCIe Base specification 3.0, Table 4-14: Link in advk_pcie_link_training()
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/linux/drivers/firmware/xilinx/
H A Dzynqmp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2022 Xilinx, Inc.
6 * Copyright (C) 2022 - 2025 Advanced Micro Devices, Inc.
14 #include <linux/arm-smccc.h>
28 #include <linux/firmware/xlnx-zynqmp.h>
29 #include <linux/firmware/xlnx-event-manager.h>
30 #include "zynqmp-debug.h"
37 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */
39 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
54 * struct zynqmp_devinfo - Structure for Zynqmp device instance
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/linux/arch/arm64/kernel/
H A Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * there's a little bit of over-abstraction that tends to obscure what's going
14 * user-visible instructions are available only on a subset of the available
18 * snapshot state to indicate the lowest-common denominator of the feature,
31 * - Mismatched features are *always* sanitised to a "safe" value, which
34 * - A mismatched feature marked with FTR_STRICT will cause a "SANITY CHECK"
38 * - Features marked as FTR_VISIBLE have their sanitised value visible to
43 * - A "feature" is typically a 4-bit register field. A "capability" is the
44 * high-level description derived from the sanitised field value.
46 * - Read the Arm ARM (DDI 0487F.a) section D13.1.3 ("Principles of the ID
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/linux/sound/hda/codecs/realtek/
H A Dalc269.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 /* different alc269-variants */
55 struct alc_spec *spec = codec->spec; in alc269_parse_auto_config()
58 switch (spec->codec_variant) { in alc269_parse_auto_config()
106 if (jack->unsol_res & (7 << 13)) in alc_headset_btn_callback()
109 if (jack->unsol_res & (1 << 16 | 3 << 8)) in alc_headset_btn_callback()
113 if (jack->unsol_res & (7 << 23)) in alc_headset_btn_callback()
117 if (jack->unsol_res & (7 << 10)) in alc_headset_btn_callback()
120 snd_hda_jack_set_button_state(codec, jack->nid, report); in alc_headset_btn_callback()
125 struct alc_spec *spec = codec->spec; in alc_disable_headset_jack_key()
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