Lines Matching +full:el3 +full:-

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Dinh Nguyen <dinguyen@kernel.org>
11   - Mahesh Rao <mahesh.rao@altera.com>
14   Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
21   communication with SDM, only the secure world of software (EL3, Exception
23   exception layers must channel through the EL3 software whenever it needs
30   code running in EL3.
35       - intel,stratix10-svc
36       - intel,agilex-svc
43       - "smc" : SMC #0, following the SMCCC
44       - "hvc" : HVC #0, following the SMCCC
46     $ref: /schemas/types.yaml#/definitions/string-array
48       - smc
49       - hvc
51   memory-region:
57   fpga-mgr:
58     $ref: /schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml
62   - compatible
63   - method
64   - memory-region
69   - |
70     reserved-memory {
71       #address-cells = <2>;
72       #size-cells = <2>;
75               compatible = "shared-dma-pool";
78               no-map;
84         compatible = "intel,stratix10-svc";
86         memory-region = <&service_reserved>;
88         fpga-mgr {
89           compatible = "intel,stratix10-soc-fpga-mgr";