| /linux/arch/x86/pci/ |
| H A D | intel_mid.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Intel MID PCI support
8 * - configuration space is memory mapped (as defined by MCFG)
9 * - Lincroft devices also have a real, type 1 configuration space
10 * - Early Lincroft silicon has a type 1 access bug that will cause
11 * a hang if non-existent devices are accessed
12 * - some devices have the "fixed BAR" capability, which means
17 * Lincroft writes to type 1 space. But only read/write if the device
36 #include <asm/intel-family.h>
37 #include <asm/intel-mid.h>
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| /linux/arch/sparc/kernel/ |
| H A D | smp_32.c | 1 // SPDX-License-Identifier: GPL-2.0
52 * compared to the Alpha and the Intel no? Most Sparcs have 'swap'
59 int mid; in smp_store_cpu_info() local
65 "clock-frequency", 0); in smp_store_cpu_info()
67 mid = cpu_get_hwmid(cpu_node); in smp_store_cpu_info()
69 if (mid < 0) { in smp_store_cpu_info()
70 printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08x", id, cpu_node); in smp_store_cpu_info()
71 mid = 0; in smp_store_cpu_info()
73 cpu_data(id).mid = mid; in smp_store_cpu_info()
127 * a single CPU. The trap handler needs only to do trap entry/return in arch_smp_send_reschedule()
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| /linux/arch/x86/platform/intel-mid/ |
| H A D | intel-mid.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel MID platform setup code
27 #include <asm/intel-mid.h>
69 * Intel MID platforms are using explicitly defined regulators. in intel_mid_arch_setup()
79 * Moorestown does not have external NMI source nor port 0x61 to report
90 * Moorestown specific x86_init function overrides and early setup
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| /linux/arch/sparc/include/asm/ |
| H A D | oplib_32.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
19 /* Enumeration to describe the prom major version we have detected. */
22 PROM_V2, /* sun4c and early sun4m V2 prom */
23 PROM_V3, /* sun4m and later, up to sun4d/sun4e machines V3 */
36 /* Pointer to prom structure containing the device tree traversal
37 * and usage utility functions. Only prom-lib should use these,
45 * preferably as early as possible. Pass it the romvec pointer.
65 /* Enter the prom, with no chance of continuation for the stand-alone
70 /* Set the PROM 'sync' callback function to the passed function pointer.
74 * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX
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| /linux/drivers/net/wireless/ath/wil6210/ |
| H A D | rx_reorder.c | 1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2014-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
15 return ((sq1 - sq2) & SEQ_MASK) > (SEQ_MODULO >> 1); in seq_less()
25 return (sq1 - sq2) & SEQ_MASK; in seq_sub()
30 return seq_sub(seq, r->ssn) % r->buf_size; in reorder_index()
37 struct sk_buff *skb = r->reorder_buf[index]; in wil_release_reorder_frame()
43 r->stored_mpdu_num--; in wil_release_reorder_frame()
44 r->reorder_buf[index] = NULL; in wil_release_reorder_frame()
48 r->head_seq_num = seq_inc(r->head_seq_num); in wil_release_reorder_frame()
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| /linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | micrel,ks8995.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
14 the early-to-mid 2000s. The chip features a CPU port and four outgoing ports,
16 PHYs need to be accessed from an external MDIO channel.
19 fabric, connected to an external MII interface name MII-P5. This is
20 unrelated from the CPU-facing port 5 which is used for DSA MII traffic.
25 - micrel,ks8995
26 - micrel,ksz8795
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| H A D | vitesse,vsc73xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Vitesse DSA Switches were produced in the early-to-mid 2000s.
19 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
20 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
21 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
22 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
27 reside inside a SPI bus device tree node, see spi/spi-bus.txt
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| /linux/arch/parisc/kernel/ |
| H A D | unwind.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * (c) 2002-2004 Randolph Chung <tausq@debian.org>
7 * Derived partially from the IA64 implementation. The PA-RISC
8 * Runtime Architecture Document is also a useful reference to
21 #include <asm/asm-offsets.h>
44 * we can call unwind_init as early in the bootup process as
54 unsigned long lo, hi, mid; in find_unwind_entry_in_table() local
57 hi = table->length - 1; in find_unwind_entry_in_table()
60 mid = (hi - lo) / 2 + lo; in find_unwind_entry_in_table()
61 e = &table->table[mid]; in find_unwind_entry_in_table()
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| /linux/mm/ |
| H A D | memblock.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
45 * Memblock is a method of managing memory regions during the early
52 * * ``memory`` - describes the physical memory available to the
56 * * ``reserved`` - describes the regions that were allocated
57 * * ``physmem`` - describes the actual physical memory available during
67 * initialized at build time. The region arrays are initially sized to
70 * for "physmem" is initially sized to %INIT_PHYSMEM_REGIONS.
76 * The early architecture setup should tell memblock what the physical
78 * functions. The first function does not assign the region to a NUMA
79 * node and it is appropriate for UMA systems. Yet, it is possible to
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| /linux/arch/x86/xen/ |
| H A D | p2m.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Xen leaves the responsibility for maintaining p2m mappings to the
8 * The logical flat p2m table is mapped to a linear kernel memory area.
9 * For accesses by Xen a three-level tree linked via mfns only is set up to
10 * allow the address space to be sparse.
22 * The p2m_top_mfn level is limited to 1 page, so the maximum representable
23 * pseudo-physical address space is:
27 * unsigned long (8 bytes on 64-bit, 4 bytes on 32), leading to
40 * We also have the possibility of setting 1-1 mappings on certain regions, so
44 * The benefit of this is, that we can assume for non-RAM regions (think
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| /linux/tools/perf/pmu-events/ |
| H A D | jevents.py | 2 # SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
3 """Convert directories of JSON events to C code."""
26 # Map from an event name to an architecture standard
30 # Events to write out when the table is closed
32 # Name of events table to be written out
34 # Metrics to write out when the table is closed
36 # Name of metrics table to be written out
40 # Map from the name of a metric group to a description of the group.
46 # Seems useful, put it early.
50 # Retirement latency specific to Intel granite rapids currently.
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| /linux/drivers/tty/serial/ |
| H A D | pmac_zilog.c | 1 // SPDX-License-Identifier: GPL-2.0+
13 * merging back those though. The DMA code still has to get in
14 * and once done, I expect that driver to remain fairly stable in
17 * 2004-08-06 Harald Welte <laforge@gnumonks.org>
18 * - Enable BREAK interrupt
19 * - Add support for sysreq
21 * TODO: - Add DMA support
22 * - Defer port shutdown to a few seconds after close
23 * - maybe put something right into uap->clk_divisor
80 #define pmz_debug(fmt, arg...) pr_debug("ttyPZ%d: " fmt, uap->port.line, ## arg)
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| /linux/drivers/net/wireless/ath/ath5k/ |
| H A D | ani.c | 4 * Permission to use, copy, modify, and/or distribute this software for any
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
33 * - "noise immunity"
35 * - "spur immunity"
37 * - "firstep level"
39 * - "OFDM weak signal detection"
41 * - "CCK weak signal detection"
61 * ath5k_ani_set_noise_immunity_level() - Set noise immunity level
69 * ANI documents suggest the following five levels to use, but the HAL in ath5k_ani_set_noise_immunity_level()
75 static const s8 lo[] = { -52, -56, -60, -64, -70 }; in ath5k_ani_set_noise_immunity_level()
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| /linux/Documentation/usb/ |
| H A D | ehci.rst | 5 27-Dec-2002
7 The EHCI driver is used to talk to high speed USB 2.0 devices using
8 USB 2.0-capable host controller hardware. The USB 2.0 standard is
11 - "High Speed" 480 Mbit/sec (60 MByte/sec)
12 - "Full Speed" 12 Mbit/sec (1.5 MByte/sec)
13 - "Low Speed" 1.5 Mbit/sec
16 can be used on USB 1.1 systems, but they slow down to USB 1.1 speeds.
19 into an EHCI controller, they are given to a USB 1.1 "companion"
26 At this writing, this driver has been seen to work with implementations
29 you should expect this driver to work with them too.
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| /linux/include/drm/ |
| H A D | drm_encoder.h | 4 * Permission to use, copy, modify, distribute, and sell this software and its
9 * publicity pertaining to distribution of the software without specific,
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
36 * struct drm_encoder_funcs - encoder controls
44 * Reset encoder hardware and software state to off. This function isn't
62 * This optional hook can be used to register additional userspace
63 * interfaces attached to the encoder.
77 * This optional hook should be used to unregister the additional
78 * userspace interfaces attached to the encoder from
80 * early in the driver unload sequence to disable userspace access
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| /linux/sound/firewire/dice/ |
| H A D | dice-interface.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 * block read transactions with at least quadlet-aligned offset and length.
12 * Writes are not allowed except where noted; quadlet-sized registers must be
15 * All values are in big endian. The DICE firmware runs on a little-endian CPU
16 * and just byte-swaps _all_ quadlets on the bus, so values without endianness
17 * (e.g. strings) get scrambled and must be byte-swapped again by the driver.
28 * separately to allow them to be extended individually. Whether a register is
31 * The section offset values are relative to DICE_PRIVATE_SPACE; the offset/
32 * size values are measured in quadlets. Read-only.
50 * Stores the full 64-bit address (node ID and offset in the node's address
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| /linux/kernel/cgroup/ |
| H A D | cgroup-v1.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 #include "cgroup-internal.h"
40 * pidlist destructions need to be flushed on cgroup destruction. Use a
45 /* protects cgroup_subsys->release_agent_path */
55 /* Check also dfl_cftypes for file-less controllers, i.e. perf_event */ in cgroup1_subsys_absent()
56 return ss->legacy_cftypes == NULL && ss->dfl_cftypes; in cgroup1_subsys_absent()
60 * cgroup_attach_task_all - attach task 'tsk' to all cgroups of task 'from'
61 * @from: attach to all cgroups of a given task
62 * @tsk: the task to be attached
92 * cgroup_transfer_tasks - move tasks from one cgroup to another
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| /linux/drivers/tty/serial/8250/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
13 This selects whether you want to include the driver for the standard
17 serial mouse and don't intend to use their machine's standard serial
20 To compile this driver as a module, choose M here: the
23 non-standard serial ports, since the configuration information will
30 BTW2: If you intend to use a software modem (also called Winmodem)
35 modems and similar devices connecting to the standard serial ports.
42 In 3.7 we renamed 8250 to 8250_core by mistake, so now we have to
44 8250.nr_uarts=4. We now renamed the module back to 8250, but if
45 anybody noticed in 3.7 and changed their userspace we still have to
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| /linux/drivers/staging/gpib/agilent_82350b/ |
| H A D | agilent_82350b.c | 1 // SPDX-License-Identifier: GPL-2.0
37 struct agilent_82350b_priv *a_priv = board->private_data; in agilent_82350b_accel_read()
38 struct tms9914_priv *tms_priv = &a_priv->tms9914_priv; in agilent_82350b_accel_read()
42 /* hardware doesn't support checking for end-of-string character when using fifo */ in agilent_82350b_accel_read()
43 if (tms_priv->eos_flags & REOS) in agilent_82350b_accel_read()
46 clear_bit(DEV_CLEAR_BN, &tms_priv->state); in agilent_82350b_accel_read()
54 writeb(DIRECTION_GPIB_TO_HOST, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG); in agilent_82350b_accel_read()
55 /* handle corner case of board not in holdoff and one byte might slip in early */ in agilent_82350b_accel_read()
56 if (tms_priv->holdoff_active == 0 && length > 1) { in agilent_82350b_accel_read()
64 --length; in agilent_82350b_accel_read()
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| /linux/drivers/infiniband/hw/hfi1/ |
| H A D | pio_copy.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
8 /* additive distance between non-SOP and SOP space */
10 #define PIO_BLOCK_MASK (PIO_BLOCK_SIZE - 1)
15 * pio_copy - copy data block to MMIO space
18 * @pbc: PBC to send
20 * @count: number of DWORD (32-bit) quantities to copy from source
22 * Copy data from source to PIO Send Buffer memory, 8 bytes at a time.
24 * be written to the corresponding SOP=1 address.
27 * o pbuf->start always starts on a block boundary
33 void __iomem *dest = pbuf->start + SOP_DISTANCE; in pio_copy()
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| /linux/arch/powerpc/kernel/ |
| H A D | pci_of_scan.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Helper routines to scan the device tree for PCI devices and busses
17 #include <asm/pci-bridge.h>
20 * get_int_prop - Decode a u32 from a device tree property
34 * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
38 * PCI Bus Binding to IEEE Std 1275-1994
43 * phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh
49 * t is 1 if the address is aliased (for non-relocatable I/O),
54 * 10 denotes 32-bit-address Memory Space
55 * 11 denotes 64-bit-address Memory Space
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| /linux/drivers/md/persistent-data/ |
| H A D | dm-btree.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include "dm-btree-internal.h"
9 #include "dm-space-map.h"
10 #include "dm-transaction-manager.h"
13 #include <linux/device-mapper.h>
18 *--------------------------------------------------------------
20 *--------------------------------------------------------------
36 (nr_elts - index) * elt_size); in array_insert()
41 /*----------------------------------------------------------------*/
46 int lo = -1, hi = le32_to_cpu(n->header.nr_entries); in bsearch()
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-fs-f2fs | 28 gc_idle = 3 will select the age-threshold based approach.
34 Description: This parameter controls the number of prefree segments to be
36 the number of segments in the proportion to the percentage
37 over total volume size, f2fs tries to conduct checkpoint to
38 reclaim the prefree segments to free segments.
49 Description: Controls the in-place-update policy.
66 0x80 HONOR_OPU_WRITE use OPU write prior to IPU write if inode has
75 Description: Controls the FS utilization condition for the in-place-update
81 Description: Controls the dirty page count condition for the in-place-update
98 Description: Controls the free section threshold to trigger SSR allocation.
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| /linux/sound/soc/codecs/ |
| H A D | ssm2602.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
85 48, 127, TLV_DB_SCALE_ITEM(-7400, 100, 0)
88 static const DECLARE_TLV_DB_SCALE(ssm260x_inpga_tlv, -3450, 150, 0);
89 static const DECLARE_TLV_DB_SCALE(ssm260x_sidetone_tlv, -1500, 300, 0);
99 SOC_ENUM("Playback De-emphasis", ssm2602_enum[1]),
132 * According to the ssm2603 data sheet (control register sequencing), in ssm2602_mic_switch_event()
136 * is activated too early, or even before the ADC is powered up, audible in ssm2602_mic_switch_event()
178 ARRAY_SIZE(ssm260x_output_mixer_controls) - 1), /* Last element is the mic */
302 return -EINVAL; in ssm2602_get_coeff()
309 struct snd_soc_component *component = dai->component; in ssm2602_hw_params()
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| /linux/drivers/scsi/ |
| H A D | esp_scsi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
12 #define ESP_TCMED 0x01UL /* rw Mid bits transfer count 0x04 */
40 /* ESP config reg 1, read-write, found on all ESP chips */
48 /* ESP config reg 2, read-write, found only on esp100a+esp200+esp236 chips */
52 #define ESP_CONFIG2_SCSI2ENAB 0x08 /* Enable SCSI-2 features (tgtmode) */
55 #define ESP_CONFIG2_BCM 0x20 /* Enable byte-ctrl (236) */
58 #define ESP_CONFIG2_SPL 0x40 /* Enable status-phase latch (236) */
63 /* ESP config register 3 read-write, found only esp236+fas236+fas100a+hme chips */
65 #define ESP_CONFIG3_TEM 0x01 /* Enable thresh-8 mode (esp/fas236) */
67 #define ESP_CONFIG3_ADMA 0x02 /* Enable alternate-dma (esp/fas236) */
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