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/linux/Documentation/devicetree/bindings/regulator/
H A Drohm,bd71828-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71828-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
25 "^LDO[1-7]$":
32 regulator-name:
33 pattern: "^ldo[1-7]$"
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H A Drohm,bd71847-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must
23 voltage monitoring for LDO5/LDO6 can cause PMIC to reset.
30 "^LDO[1-6]$":
37 regulator-name:
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H A Drohm,bd71837-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
21 regulator-boot-on at least for BUCK6 and BUCK7 so that those are not
23 if they are disabled at startup the voltage monitoring for LDO5/LDO6 will
31 "^LDO[1-7]$":
38 regulator-name:
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-pico-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <32768>;
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H A Dimx8mq-phanbell.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
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H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
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H A Dimx8mq-librem5-devkit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
17 compatible = "purism,librem5-devkit", "fsl,imx8mq";
19 backlight_dsi: backlight-dsi {
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H A Dimx8mq-librem5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
18 chassis-type = "handset";
20 backlight_dsi: backlight-dsi {
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H A Dimx8mn-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mn-overdrive.dtsi"
16 compatible = "mmc-pwrseq-simple";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
19 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
21 clock-names = "ext_clock";
22 post-power-on-delay-ms = <80>;
32 cpu-supply = <&buck2_reg>;
36 cpu-supply = <&buck2_reg>;
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H A Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mm-overdrive.dtsi"
15 compatible = "mmc-pwrseq-simple";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
18 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
20 clock-names = "ext_clock";
21 post-power-on-delay-ms = <80>;
31 cpu-supply = <&buck2_reg>;
35 cpu-supply = <&buck2_reg>;
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H A Dimx8mm-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
13 stdout-path = &uart4;
21 reg_eth_phy: regulator-eth-phy {
22 compatible = "regulator-fixed";
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_reg_eth_phy>;
25 regulator-name = "eth_phy_pwr";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
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H A Dimx8mm-emcon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
13 stdout-path = &uart1;
17 compatible = "gpio-leds";
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_gpio_led>;
21 led-green {
24 default-state = "on";
25 linux,default-trigger = "heartbeat";
28 led-red {
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H A Dimx8mn-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2020 Variscite Ltd.
11 model = "Variscite VAR-SOM-MX8MN module";
12 compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
15 stdout-path = &uart4;
23 reg_eth_phy: regulator-eth-phy {
24 compatible = "regulator-fixed";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
27 regulator-name = "eth_phy_pwr";
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H A Dimx8mm-ucm-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
18 stdout-path = &uart3;
22 compatible = "pwm-backlight";
24 brightness-levels = <0 255>;
25 num-interpolated-steps = <255>;
26 default-brightness-level = <222>;
31 compatible = "gpio-leds";
32 pinctrl-names = "default";
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H A Dimx8mm-venice-gw7904.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";
25 stdout-path = &uart2;
33 gpio-keys {
34 compatible = "gpio-keys";
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H A Dimx8mm-venice-gw7903.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7903", "fsl,imx8mm";
27 stdout-path = &uart2;
35 gpio-keys {
36 compatible = "gpio-keys";
[all …]
H A Dimx8mn-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
17 compatible = "gw,imx8mn-gw7902", "fsl,imx8mn";
26 stdout-path = &uart2;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
H A Dimx8mm-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
29 stdout-path = &uart2;
38 compatible = "fixed-clock";
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H A Dimx8mm-venice-gw7901.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm";
32 stdout-path = &uart2;
40 gpio-keys {
41 compatible = "gpio-keys";
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H A Dimx8mm-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
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/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
25 - rohm,bd71850
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/linux/include/linux/mfd/
H A Drohm-generic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
40 * struct rohm_dvs_config - dynamic voltage scaling register descriptions
42 * @level_map: bitmap representing supported run-levels for this
47 * @idle_reg: register address for regulator config at 'idle' state
48 * @idle_mask: value mask for regulator voltages at 'idle' state
49 * @idle_on_mask: enable mask for regulator at 'idle' state
57 * Description of ROHM PMICs voltage configuration registers for different
81 int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs,
/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210-goni.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/input/input.h>
38 pmic_ap_clk: clock-0 {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <32768>;
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/linux/drivers/regulator/
H A Dbd718x7-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 // bd71837-regulator.c ROHM BD71837MWV/BD71847MWV regulator driver
10 #include <linux/mfd/rohm-bd718x7.h>
51 * controlled by software - or by PMIC internal HW state machine. Whether
52 * regulator should be under SW or HW control can be defined from device-tree.
89 * BUCK1RAMPRATE[1:0] BUCK1 DVS ramp rate setting
99 * status. Most of the regulators have fixed ON or OFF state at RUN/IDLE so for
103 * Note for next hacker - these PMICs have a register where the HW state can be
104 * read. If assuming RUN appears to be false in your use-case - you can
123 ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); in bd71837_get_buck34_enable_hwctrl()
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