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/linux/drivers/ptp/
H A Dptp_dfl_tod.c77 * and TOD_ADJUST_COUNT register for in hardware. The dt->tod_lock spinlock must be
80 static int fine_adjust_tod_clock(struct dfl_tod *dt, u32 adjust_period, in fine_adjust_tod_clock() argument
83 void __iomem *base = dt->tod_ctrl; in fine_adjust_tod_clock()
98 static int coarse_adjust_tod_clock(struct dfl_tod *dt, s64 delta) in coarse_adjust_tod_clock() argument
101 void __iomem *base = dt->tod_ctrl; in coarse_adjust_tod_clock()
128 struct dfl_tod *dt = container_of(ptp, struct dfl_tod, ptp_clock_ops); in dfl_tod_adjust_fine() local
130 void __iomem *base = dt->tod_ctrl; in dfl_tod_adjust_fine()
160 spin_lock_irqsave(&dt->tod_lock, flags); in dfl_tod_adjust_fine()
166 spin_unlock_irqrestore(&dt->tod_lock, flags); in dfl_tod_adjust_fine()
173 struct dfl_tod *dt = container_of(ptp, struct dfl_tod, ptp_clock_ops); in dfl_tod_adjust_time() local
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/linux/drivers/video/
H A Dof_display_timing.c55 * @dt: display_timing that contains the result. I may be partially written in case of errors
58 struct display_timing *dt) in of_parse_display_timing() argument
63 memset(dt, 0, sizeof(*dt)); in of_parse_display_timing()
65 ret |= parse_timing_property(np, "hback-porch", &dt->hback_porch); in of_parse_display_timing()
66 ret |= parse_timing_property(np, "hfront-porch", &dt->hfront_porch); in of_parse_display_timing()
67 ret |= parse_timing_property(np, "hactive", &dt->hactive); in of_parse_display_timing()
68 ret |= parse_timing_property(np, "hsync-len", &dt->hsync_len); in of_parse_display_timing()
69 ret |= parse_timing_property(np, "vback-porch", &dt->vback_porch); in of_parse_display_timing()
70 ret |= parse_timing_property(np, "vfront-porch", &dt->vfront_porch); in of_parse_display_timing()
71 ret |= parse_timing_property(np, "vactive", &dt->vactive); in of_parse_display_timing()
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H A Dvideomode.c13 void videomode_from_timing(const struct display_timing *dt, in videomode_from_timing() argument
16 vm->pixelclock = dt->pixelclock.typ; in videomode_from_timing()
17 vm->hactive = dt->hactive.typ; in videomode_from_timing()
18 vm->hfront_porch = dt->hfront_porch.typ; in videomode_from_timing()
19 vm->hback_porch = dt->hback_porch.typ; in videomode_from_timing()
20 vm->hsync_len = dt->hsync_len.typ; in videomode_from_timing()
22 vm->vactive = dt->vactive.typ; in videomode_from_timing()
23 vm->vfront_porch = dt->vfront_porch.typ; in videomode_from_timing()
24 vm->vback_porch = dt->vback_porch.typ; in videomode_from_timing()
25 vm->vsync_len = dt->vsync_len.typ; in videomode_from_timing()
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/linux/drivers/rtc/
H A Drtc-max6902.c52 static int max6902_read_time(struct device *dev, struct rtc_time *dt) in max6902_read_time() argument
66 dt->tm_sec = bcd2bin(buf[0]); in max6902_read_time()
67 dt->tm_min = bcd2bin(buf[1]); in max6902_read_time()
68 dt->tm_hour = bcd2bin(buf[2]); in max6902_read_time()
69 dt->tm_mday = bcd2bin(buf[3]); in max6902_read_time()
70 dt->tm_mon = bcd2bin(buf[4]) - 1; in max6902_read_time()
71 dt->tm_wday = bcd2bin(buf[5]); in max6902_read_time()
72 dt->tm_year = bcd2bin(buf[6]); in max6902_read_time()
81 dt->tm_year += century; in max6902_read_time()
82 dt->tm_year -= 1900; in max6902_read_time()
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H A Drtc-max6916.c53 static int max6916_read_time(struct device *dev, struct rtc_time *dt) in max6916_read_time() argument
66 dt->tm_sec = bcd2bin(buf[0]); in max6916_read_time()
67 dt->tm_min = bcd2bin(buf[1]); in max6916_read_time()
68 dt->tm_hour = bcd2bin(buf[2] & 0x3F); in max6916_read_time()
69 dt->tm_mday = bcd2bin(buf[3]); in max6916_read_time()
70 dt->tm_mon = bcd2bin(buf[4]) - 1; in max6916_read_time()
71 dt->tm_wday = bcd2bin(buf[5]) - 1; in max6916_read_time()
72 dt->tm_year = bcd2bin(buf[6]) + 100; in max6916_read_time()
77 static int max6916_set_time(struct device *dev, struct rtc_time *dt) in max6916_set_time() argument
82 if (dt->tm_year < 100 || dt->tm_year > 199) { in max6916_set_time()
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H A Drtc-ds1347.c50 static int ds1347_read_time(struct device *dev, struct rtc_time *dt) in ds1347_read_time() argument
78 dt->tm_sec = bcd2bin(buf[0]); in ds1347_read_time()
79 dt->tm_min = bcd2bin(buf[1] & 0x7f); in ds1347_read_time()
80 dt->tm_hour = bcd2bin(buf[2] & 0x3F); in ds1347_read_time()
81 dt->tm_mday = bcd2bin(buf[3]); in ds1347_read_time()
82 dt->tm_mon = bcd2bin(buf[4]) - 1; in ds1347_read_time()
83 dt->tm_wday = bcd2bin(buf[5]) - 1; in ds1347_read_time()
84 dt->tm_year = (bcd2bin(century) * 100) + bcd2bin(buf[6]) - 1900; in ds1347_read_time()
89 static int ds1347_set_time(struct device *dev, struct rtc_time *dt) in ds1347_set_time() argument
101 buf[0] = bin2bcd(dt->tm_sec); in ds1347_set_time()
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H A Drtc-ds1390.c117 "Unsupported ohm value %02ux in dt\n", ohms); in ds1390_trickle_of_init()
127 static int ds1390_read_time(struct device *dev, struct rtc_time *dt) in ds1390_read_time() argument
143 dt->tm_sec = bcd2bin(chip->txrx_buf[0]); in ds1390_read_time()
144 dt->tm_min = bcd2bin(chip->txrx_buf[1]); in ds1390_read_time()
145 dt->tm_hour = bcd2bin(chip->txrx_buf[2]); in ds1390_read_time()
146 dt->tm_wday = bcd2bin(chip->txrx_buf[3]); in ds1390_read_time()
147 dt->tm_mday = bcd2bin(chip->txrx_buf[4]); in ds1390_read_time()
149 dt->tm_mon = bcd2bin(chip->txrx_buf[5] & 0x7f) - 1; in ds1390_read_time()
151 dt->tm_year = bcd2bin(chip->txrx_buf[6]) + ((chip->txrx_buf[5] & 0x80) ? 100 : 0); in ds1390_read_time()
156 static int ds1390_set_time(struct device *dev, struct rtc_time *dt) in ds1390_set_time() argument
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H A Drtc-r9701.c68 static int r9701_get_datetime(struct device *dev, struct rtc_time *dt) in r9701_get_datetime() argument
78 dt->tm_sec = bcd2bin(buf[0]); /* RSECCNT */ in r9701_get_datetime()
79 dt->tm_min = bcd2bin(buf[1]); /* RMINCNT */ in r9701_get_datetime()
80 dt->tm_hour = bcd2bin(buf[2]); /* RHRCNT */ in r9701_get_datetime()
82 dt->tm_mday = bcd2bin(buf[3]); /* RDAYCNT */ in r9701_get_datetime()
83 dt->tm_mon = bcd2bin(buf[4]) - 1; /* RMONCNT */ in r9701_get_datetime()
84 dt->tm_year = bcd2bin(buf[5]) + 100; /* RYRCNT */ in r9701_get_datetime()
89 static int r9701_set_datetime(struct device *dev, struct rtc_time *dt) in r9701_set_datetime() argument
93 ret = write_reg(dev, RHRCNT, bin2bcd(dt->tm_hour)); in r9701_set_datetime()
94 ret = ret ? ret : write_reg(dev, RMINCNT, bin2bcd(dt->tm_min)); in r9701_set_datetime()
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H A Drtc-pcf8583.c49 static int pcf8583_get_datetime(struct i2c_client *client, struct rtc_time *dt) in pcf8583_get_datetime() argument
71 dt->tm_year = buf[4] >> 6; in pcf8583_get_datetime()
72 dt->tm_wday = buf[5] >> 5; in pcf8583_get_datetime()
77 dt->tm_sec = bcd2bin(buf[1]); in pcf8583_get_datetime()
78 dt->tm_min = bcd2bin(buf[2]); in pcf8583_get_datetime()
79 dt->tm_hour = bcd2bin(buf[3]); in pcf8583_get_datetime()
80 dt->tm_mday = bcd2bin(buf[4]); in pcf8583_get_datetime()
81 dt->tm_mon = bcd2bin(buf[5]) - 1; in pcf8583_get_datetime()
87 static int pcf8583_set_datetime(struct i2c_client *client, struct rtc_time *dt, int datetoo) in pcf8583_set_datetime() argument
95 buf[3] = bin2bcd(dt->tm_sec); in pcf8583_set_datetime()
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H A Drtc-rx8010.c107 static int rx8010_get_time(struct device *dev, struct rtc_time *dt) in rx8010_get_time() argument
126 dt->tm_sec = bcd2bin(date[RX8010_SEC - RX8010_SEC] & 0x7f); in rx8010_get_time()
127 dt->tm_min = bcd2bin(date[RX8010_MIN - RX8010_SEC] & 0x7f); in rx8010_get_time()
128 dt->tm_hour = bcd2bin(date[RX8010_HOUR - RX8010_SEC] & 0x3f); in rx8010_get_time()
129 dt->tm_mday = bcd2bin(date[RX8010_MDAY - RX8010_SEC] & 0x3f); in rx8010_get_time()
130 dt->tm_mon = bcd2bin(date[RX8010_MONTH - RX8010_SEC] & 0x1f) - 1; in rx8010_get_time()
131 dt->tm_year = bcd2bin(date[RX8010_YEAR - RX8010_SEC]) + 100; in rx8010_get_time()
132 dt->tm_wday = ffs(date[RX8010_WDAY - RX8010_SEC] & 0x7f); in rx8010_get_time()
137 static int rx8010_set_time(struct device *dev, struct rtc_time *dt) in rx8010_set_time() argument
148 date[RX8010_SEC - RX8010_SEC] = bin2bcd(dt->tm_sec); in rx8010_set_time()
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H A Drtc-rx8025.c214 static int rx8025_get_time(struct device *dev, struct rtc_time *dt) in rx8025_get_time() argument
231 dt->tm_sec = bcd2bin(date[RX8025_REG_SEC] & 0x7f); in rx8025_get_time()
232 dt->tm_min = bcd2bin(date[RX8025_REG_MIN] & 0x7f); in rx8025_get_time()
234 dt->tm_hour = bcd2bin(date[RX8025_REG_HOUR] & 0x3f); in rx8025_get_time()
236 dt->tm_hour = bcd2bin(date[RX8025_REG_HOUR] & 0x1f) % 12 in rx8025_get_time()
239 dt->tm_mday = bcd2bin(date[RX8025_REG_MDAY] & 0x3f); in rx8025_get_time()
240 dt->tm_mon = bcd2bin(date[RX8025_REG_MONTH] & 0x1f) - 1; in rx8025_get_time()
241 dt->tm_year = bcd2bin(date[RX8025_REG_YEAR]) + 100; in rx8025_get_time()
243 dev_dbg(dev, "%s: date %ptRr\n", __func__, dt); in rx8025_get_time()
248 static int rx8025_set_time(struct device *dev, struct rtc_time *dt) in rx8025_set_time() argument
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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8450-gpucc.yaml18 include/dt-bindings/clock/qcom,glymur-gpucc.h
19 include/dt-bindings/clock/qcom,kaanapali-gpucc.h
20 include/dt-bindings/clock/qcom,milos-gpucc.h
21 include/dt-bindings/clock/qcom,nord-gpu2cc.h
22 include/dt-bindings/clock/qcom,nord-gpucc.h
23 include/dt-bindings/clock/qcom,sar2130p-gpucc.h
24 include/dt-bindings/clock/qcom,sm4450-gpucc.h
25 include/dt-bindings/clock/qcom,sm8450-gpucc.h
26 include/dt-bindings/clock/qcom,sm8550-gpucc.h
27 include/dt-bindings/reset/qcom,sm8450-gpucc.h
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H A Dqcom,sm8450-videocc.yaml18 include/dt-bindings/clock/qcom,glymur-videocc.h
19 include/dt-bindings/clock/qcom,hawi-videocc.h
20 include/dt-bindings/clock/qcom,kaanapali-videocc.h
21 include/dt-bindings/clock/qcom,maili-videocc.h
22 include/dt-bindings/clock/qcom,sm8450-videocc.h
23 include/dt-bindings/clock/qcom,sm8650-videocc.h
24 include/dt-bindings/clock/qcom,sm8750-videocc.h
25 include/dt-bindings/clock/qcom,x1p42100-videocc.h
85 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
86 #include <dt-bindings/clock/qcom,rpmh.h>
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H A Dqcom,sm8450-camcc.yaml19 include/dt-bindings/clock/qcom,kaanapali-camcc.h
20 include/dt-bindings/clock/qcom,kaanapali-cambistmclkcc.h
21 include/dt-bindings/clock/qcom,sm8450-camcc.h
22 include/dt-bindings/clock/qcom,sm8550-camcc.h
23 include/dt-bindings/clock/qcom,sm8650-camcc.h
24 include/dt-bindings/clock/qcom,sm8750-cambistmclkcc.h
25 include/dt-bindings/clock/qcom,sm8750-camcc.h
86 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
87 #include <dt-bindings/clock/qcom,rpmh.h>
88 #include <dt-bindings/power/qcom,rpmhpd.h>
H A Dqcom,sm8550-dispcc.yaml18 - include/dt-bindings/clock/qcom,kaanapali-dispcc.h
19 - include/dt-bindings/clock/qcom,nord-dispcc.h
20 - include/dt-bindings/clock/qcom,sm8550-dispcc.h
21 - include/dt-bindings/clock/qcom,sm8650-dispcc.h
22 - include/dt-bindings/clock/qcom,sm8750-dispcc.h
23 - include/dt-bindings/clock/qcom,x1e80100-dispcc.h
78 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
79 #include <dt-bindings/clock/qcom,rpmh.h>
80 #include <dt-bindings/power/qcom,rpmhpd.h>
H A Dqcom,sm8550-tcsr.yaml18 - include/dt-bindings/clock/qcom,eliza-tcsr.h
19 - include/dt-bindings/clock/qcom,hawi-tcsrcc.h
20 - include/dt-bindings/clock/qcom,nord-tcsrcc.h
21 - include/dt-bindings/clock/qcom,sm8550-tcsr.h
22 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
23 - include/dt-bindings/clock/qcom,sm8750-tcsr.h
68 #include <dt-bindings/clock/qcom,rpmh.h>
/linux/drivers/perf/
H A Darm-ccn.c119 #define CCN_NUM_XP_WATCHPOINTS 2 /* See DT.dbg_id.num_watchpoints */
120 #define CCN_NUM_PMU_EVENT_COUNTERS 8 /* See DT.dbg_id.num_pmucntr */
142 struct arm_ccn_dt, pmu), struct arm_ccn, dt)
182 struct arm_ccn_dt dt; member
450 return &ccn->dt.cmp_mask[i].l; in arm_ccn_pmu_get_cmp_mask()
452 return &ccn->dt.cmp_mask[i].h; in arm_ccn_pmu_get_cmp_mask()
540 return sysfs_emit(buf, "%*pbl\n", cpumask_pr_args(cpumask_of(ccn->dt.cpu))); in arm_ccn_pmu_cpumask_show()
636 ccn->dt.pmu_counters_mask)) in arm_ccn_pmu_event_alloc()
640 ccn->dt.pmu_counters[CCN_IDX_PMU_CYCLE_COUNTER].event = event; in arm_ccn_pmu_event_alloc()
646 hw->idx = arm_ccn_pmu_alloc_bit(ccn->dt.pmu_counters_mask, in arm_ccn_pmu_event_alloc()
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/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_gt_pm.c55 ktime_t dt[5]; in measure_clocks() local
62 dt[i] = ktime_get(); in measure_clocks()
67 dt[i] = ktime_sub(ktime_get(), dt[i]); in measure_clocks()
71 /* Use the median of both cycle/dt; close enough */ in measure_clocks()
75 sort(dt, 5, sizeof(*dt), cmp_u64, NULL); in measure_clocks()
76 *out_dt = div_u64(dt[1] + 2 * dt[2] + dt[3], 4); in measure_clocks()
102 u64 dt; in live_gt_clocks() local
107 measure_clocks(engine, &cycles, &dt); in live_gt_clocks()
110 expected = intel_gt_ns_to_clock_interval(engine->gt, dt); in live_gt_clocks()
113 engine->name, cycles, time, dt, expected, in live_gt_clocks()
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H A Dselftest_engine_pm.c74 u64 *dt, u64 *d_ring, u64 *d_ctx) in __measure_timestamps() argument
119 *dt = local_clock(); in __measure_timestamps()
121 *dt = local_clock() - *dt; in __measure_timestamps()
141 u64 s_ring[COUNT], s_ctx[COUNT], st[COUNT], d_ring, d_ctx, dt; in __live_engine_timestamps() local
158 dt = trifilter(st); in __live_engine_timestamps()
163 engine->name, dt, in __live_engine_timestamps()
168 if (3 * dt > 4 * d_ring || 4 * dt < 3 * d_ring) { in __live_engine_timestamps()
221 ktime_t start, unused, dt; in __spin_until_busier() local
233 dt = ktime_get() - start; in __spin_until_busier()
234 if (dt > 10000000) { in __spin_until_busier()
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/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml133 dt-binding/memory/mediatek,mt8188-memory-port.h for mt8188,
134 dt-binding/memory/mediatek,mt8189-memory-port.h for mt8189,
135 dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623,
136 dt-binding/memory/mt2712-larb-port.h for mt2712,
137 dt-binding/memory/mt6779-larb-port.h for mt6779,
138 dt-binding/memory/mt6795-larb-port.h for mt6795,
139 dt-binding/memory/mediatek,mt6893-memory-port.h for mt6893,
140 dt-binding/memory/mt8167-larb-port.h for mt8167,
141 dt-binding/memory/mt8173-larb-port.h for mt8173,
142 dt-binding/memory/mt8183-larb-port.h for mt8183,
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/linux/drivers/clocksource/
H A Dtimer-digicolor.c71 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_disable() local
72 writeb(CONTROL_DISABLE, dt->base + CONTROL(dt->timer_id)); in dc_timer_disable()
77 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_enable() local
78 writeb(CONTROL_ENABLE | mode, dt->base + CONTROL(dt->timer_id)); in dc_timer_enable()
84 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_set_count() local
85 writel(count, dt->base + COUNT(dt->timer_id)); in dc_timer_set_count()
103 struct digicolor_timer *dt = dc_timer(ce); in digicolor_clkevt_set_periodic() local
106 dc_timer_set_count(ce, dt->ticks_per_jiffy); in digicolor_clkevt_set_periodic()
/linux/tools/testing/selftests/bpf/progs/
H A Dnetcnt_prog.c30 __u64 ts, dt; in bpf_nextcnt() local
50 dt = ts - percpu_cnt->prev_ts; in bpf_nextcnt()
52 dt *= MAX_BPS; in bpf_nextcnt()
53 dt /= NS_PER_SEC; in bpf_nextcnt()
55 if (cnt->bytes + percpu_cnt->bytes - percpu_cnt->prev_bytes < dt) in bpf_nextcnt()
60 if (dt > REFRESH_TIME_NS) { in bpf_nextcnt()
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,padding.yaml47 2. Sub-system ID defined in the dt-binding like a user ID
48 (Please refer to include/dt-bindings/gce/<chip>-gce.h)
55 - description: Subsys ID defined in the dt-binding
71 #include <dt-bindings/interrupt-controller/arm-gic.h>
72 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
73 #include <dt-bindings/power/mediatek,mt8188-power.h>
74 #include <dt-bindings/gce/mt8195-gce.h>
/linux/arch/microblaze/
H A DMakefile81 echo ' simpleImage.<dt> - Create the following images with <dt>.dtb linked in'
82 echo ' simpleImage.<dt> : raw image'
83 echo ' simpleImage.<dt>.ub : raw image with U-Boot header'
84 echo ' simpleImage.<dt>.unstrip: ELF (identical to vmlinux)'
85 echo ' simpleImage.<dt>.strip : stripped ELF'
86 echo ' Targets with <dt> embed a device tree blob inside the image'
88 echo ' support passing a device tree directly. Replace <dt> with the'
/linux/drivers/media/dvb-frontends/
H A Ddrxd_firm.c36 0x60, 0x04, /* r0rami.dt -> ring.xba; */
37 0x61, 0x04, /* r0rami.dt -> ring.xad; */
40 0x64, 0x04, /* r0rami.dt -> ring.len; */
41 0x65, 0x04, /* r0rami.dt -> ring.ctl; */
56 0xC8, 0x07, 0x01, 0x00, /* MASK -> reg0.dt; */
65 0xC0, 0x07, 0xFF, 0x0F, /* -1 -> w0ram.dt; */
77 0x0F, 0x04, /* r0ram.dt -> and.op; */
78 0x1C, 0x06, /* reg0.dt -> and.tr; */
82 0xC8, 0x04, /* add.rs -> reg0.dt; */
83 0x60, 0x00, /* reg0.dt -> w0ram.dt; */
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